Lines Matching +full:speed +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
24 int addr = chip->info->port_base_addr + port; in mv88e6xxx_port_read()
32 int addr = chip->info->port_base_addr + port; in mv88e6xxx_port_wait_bit()
40 int addr = chip->info->port_base_addr + port; in mv88e6xxx_port_write()
72 * For port's MAC speed, ForceSpd (or SpdValue) bits 1:0 program the value.
111 dev_dbg(chip->dev, "p%d: delay RXCLK %s, TXCLK %s\n", port, in mv88e6xxx_port_set_rgmii_delay()
122 return -EOPNOTSUPP; in mv88e6352_port_set_rgmii_delay()
131 return -EOPNOTSUPP; in mv88e6390_port_set_rgmii_delay()
140 return -EOPNOTSUPP; in mv88e6320_port_set_rgmii_delay()
169 return -EINVAL; in mv88e6xxx_port_set_link()
176 dev_dbg(chip->dev, "p%d: %s link %s\n", port, in mv88e6xxx_port_set_link()
185 const struct mv88e6xxx_ops *ops = chip->info->ops; in mv88e6xxx_port_sync_link()
194 if (ops->port_set_link) in mv88e6xxx_port_sync_link()
195 err = ops->port_set_link(chip, port, link); in mv88e6xxx_port_sync_link()
202 const struct mv88e6xxx_ops *ops = chip->info->ops; in mv88e6185_port_sync_link()
213 if (ops->port_set_link) in mv88e6185_port_sync_link()
214 err = ops->port_set_link(chip, port, link); in mv88e6185_port_sync_link()
220 int port, int speed, bool alt_bit, in mv88e6xxx_port_set_speed_duplex() argument
226 switch (speed) { in mv88e6xxx_port_set_speed_duplex()
256 return -EOPNOTSUPP; in mv88e6xxx_port_set_speed_duplex()
271 return -EOPNOTSUPP; in mv88e6xxx_port_set_speed_duplex()
286 if (speed != SPEED_UNFORCED) in mv88e6xxx_port_set_speed_duplex()
295 if (speed != SPEED_UNFORCED) in mv88e6xxx_port_set_speed_duplex()
296 dev_dbg(chip->dev, "p%d: Speed set to %d Mbps\n", port, speed); in mv88e6xxx_port_set_speed_duplex()
298 dev_dbg(chip->dev, "p%d: Speed unforced\n", port); in mv88e6xxx_port_set_speed_duplex()
299 dev_dbg(chip->dev, "p%d: %s %s duplex\n", port, in mv88e6xxx_port_set_speed_duplex()
308 int speed, int duplex) in mv88e6185_port_set_speed_duplex() argument
310 if (speed == 200 || speed > 1000) in mv88e6185_port_set_speed_duplex()
311 return -EOPNOTSUPP; in mv88e6185_port_set_speed_duplex()
313 return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false, in mv88e6185_port_set_speed_duplex()
319 int speed, int duplex) in mv88e6250_port_set_speed_duplex() argument
321 if (speed > 100) in mv88e6250_port_set_speed_duplex()
322 return -EOPNOTSUPP; in mv88e6250_port_set_speed_duplex()
324 return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false, in mv88e6250_port_set_speed_duplex()
330 int speed, int duplex) in mv88e6341_port_set_speed_duplex() argument
332 if (speed > 2500) in mv88e6341_port_set_speed_duplex()
333 return -EOPNOTSUPP; in mv88e6341_port_set_speed_duplex()
335 if (speed == 200 && port != 0) in mv88e6341_port_set_speed_duplex()
336 return -EOPNOTSUPP; in mv88e6341_port_set_speed_duplex()
338 if (speed == 2500 && port < 5) in mv88e6341_port_set_speed_duplex()
339 return -EOPNOTSUPP; in mv88e6341_port_set_speed_duplex()
341 return mv88e6xxx_port_set_speed_duplex(chip, port, speed, !port, true, in mv88e6341_port_set_speed_duplex()
356 int speed, int duplex) in mv88e6352_port_set_speed_duplex() argument
358 if (speed > 1000) in mv88e6352_port_set_speed_duplex()
359 return -EOPNOTSUPP; in mv88e6352_port_set_speed_duplex()
361 if (speed == 200 && port < 5) in mv88e6352_port_set_speed_duplex()
362 return -EOPNOTSUPP; in mv88e6352_port_set_speed_duplex()
364 return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, false, in mv88e6352_port_set_speed_duplex()
370 int speed, int duplex) in mv88e6390_port_set_speed_duplex() argument
372 if (speed > 2500) in mv88e6390_port_set_speed_duplex()
373 return -EOPNOTSUPP; in mv88e6390_port_set_speed_duplex()
375 if (speed == 200 && port != 0) in mv88e6390_port_set_speed_duplex()
376 return -EOPNOTSUPP; in mv88e6390_port_set_speed_duplex()
378 if (speed == 2500 && port < 9) in mv88e6390_port_set_speed_duplex()
379 return -EOPNOTSUPP; in mv88e6390_port_set_speed_duplex()
381 return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true, in mv88e6390_port_set_speed_duplex()
396 int speed, int duplex) in mv88e6390x_port_set_speed_duplex() argument
398 if (speed == 200 && port != 0) in mv88e6390x_port_set_speed_duplex()
399 return -EOPNOTSUPP; in mv88e6390x_port_set_speed_duplex()
401 if (speed >= 2500 && port < 9) in mv88e6390x_port_set_speed_duplex()
402 return -EOPNOTSUPP; in mv88e6390x_port_set_speed_duplex()
404 return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true, in mv88e6390x_port_set_speed_duplex()
422 int speed, int duplex) in mv88e6393x_port_set_speed_duplex() argument
427 if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361 && in mv88e6393x_port_set_speed_duplex()
428 speed > 2500) in mv88e6393x_port_set_speed_duplex()
429 return -EOPNOTSUPP; in mv88e6393x_port_set_speed_duplex()
431 if (speed == 200 && port != 0) in mv88e6393x_port_set_speed_duplex()
432 return -EOPNOTSUPP; in mv88e6393x_port_set_speed_duplex()
434 if (speed >= 2500 && port > 0 && port < 9) in mv88e6393x_port_set_speed_duplex()
435 return -EOPNOTSUPP; in mv88e6393x_port_set_speed_duplex()
437 switch (speed) { in mv88e6393x_port_set_speed_duplex()
464 return -EOPNOTSUPP; in mv88e6393x_port_set_speed_duplex()
479 return -EOPNOTSUPP; in mv88e6393x_port_set_speed_duplex()
490 if (speed != SPEED_UNFORCED) in mv88e6393x_port_set_speed_duplex()
499 if (speed != SPEED_UNFORCED) in mv88e6393x_port_set_speed_duplex()
500 dev_dbg(chip->dev, "p%d: Speed set to %d Mbps\n", port, speed); in mv88e6393x_port_set_speed_duplex()
502 dev_dbg(chip->dev, "p%d: Speed unforced\n", port); in mv88e6393x_port_set_speed_duplex()
503 dev_dbg(chip->dev, "p%d: %s %s duplex\n", port, in mv88e6393x_port_set_speed_duplex()
517 if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361) in mv88e6393x_port_max_speed_mode()
576 if (cmode == chip->ports[port].cmode && !force) in mv88e6xxx_port_set_cmode()
579 chip->ports[port].cmode = 0; in mv88e6xxx_port_set_cmode()
593 chip->ports[port].cmode = cmode; in mv88e6xxx_port_set_cmode()
603 return -EOPNOTSUPP; in mv88e6390x_port_set_cmode()
612 return -EOPNOTSUPP; in mv88e6390_port_set_cmode()
620 return -EINVAL; in mv88e6390_port_set_cmode()
635 return -EOPNOTSUPP; in mv88e6393x_port_set_cmode()
644 return -EINVAL; in mv88e6393x_port_set_cmode()
671 return -EOPNOTSUPP; in mv88e6341_port_set_cmode_writable()
673 addr = chip->info->port_base_addr + port; in mv88e6341_port_set_cmode_writable()
695 return -EOPNOTSUPP; in mv88e6341_port_set_cmode()
703 return -EINVAL; in mv88e6341_port_set_cmode()
807 return -EINVAL; in mv88e6xxx_port_set_state()
816 dev_dbg(chip->dev, "p%d: PortState set to %s\n", port, in mv88e6xxx_port_set_state()
848 return -EINVAL; in mv88e6xxx_port_set_egress_mode()
874 return -EINVAL; in mv88e6085_port_set_frame_mode()
906 return -EINVAL; in mv88e6351_port_set_frame_mode()
1007 /* Offset 0x06: Port Based VLAN Map */
1009 int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map) in mv88e6xxx_port_set_vlan_map() argument
1020 reg |= map & mask; in mv88e6xxx_port_set_vlan_map()
1026 dev_dbg(chip->dev, "p%d: VLANTable set to %.3x\n", port, map); in mv88e6xxx_port_set_vlan_map()
1033 const u16 upper_mask = (mv88e6xxx_num_databases(chip) - 1) >> 4; in mv88e6xxx_port_get_fid()
1059 const u16 upper_mask = (mv88e6xxx_num_databases(chip) - 1) >> 4; in mv88e6xxx_port_set_fid()
1064 return -EINVAL; in mv88e6xxx_port_set_fid()
1094 dev_dbg(chip->dev, "p%d: FID set to %u\n", port, fid); in mv88e6xxx_port_set_fid()
1134 dev_dbg(chip->dev, "p%d: DefaultVID set to %u\n", port, pvid); in mv88e6xxx_port_set_pvid()
1198 mirror_port = &chip->ports[port].mirror_ingress; in mv88e6xxx_port_set_mirror()
1202 mirror_port = &chip->ports[port].mirror_egress; in mv88e6xxx_port_set_mirror()
1205 return -EINVAL; in mv88e6xxx_port_set_mirror()
1265 dev_dbg(chip->dev, "p%d: 802.1QMode set to %s\n", port, in mv88e6xxx_port_set_8021q_mode()
1292 int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port, bool map) in mv88e6xxx_port_set_map_da() argument
1301 if (map) in mv88e6xxx_port_set_map_da()
1330 return -ERANGE; in mv88e6165_port_set_jumbo_size()
1424 if (dsa_is_unused_port(chip->ds, port)) in mv88e6393x_port_policy_write_all()
1542 /* Offset 0x18: Port IEEE Priority Remapping Registers [0-3]
1543 * Offset 0x19: Port IEEE Priority Remapping Registers [4-7]
1647 return -EOPNOTSUPP; in mv88e6xxx_port_policy_mapping_get_pos()
1664 return -EOPNOTSUPP; in mv88e6xxx_port_policy_mapping_get_pos()
1708 /* The 16-bit Port Policy CTL register from older chips is on 6393x in mv88e6393x_port_set_policy()
1710 * indirectly. The original 16-bit value is divided into two 8-bit in mv88e6393x_port_set_policy()