dsa/mv88e6xxx/chip.h

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * Marvell 88E6xxx Ethernet switch single-chip definition
28 /* PVT limits for 4-bit port and 5-bit switch */
110  * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level
111  * @MV88E6XXX_EDSA_UNSUPPORTED:  Device has no support for EDSA tags
149 	 * ports 2-4 are not routet to pins.
152 	/* Multi-chip Addressing Mode.
154 	 * when it is non-zero, and use indirect access to internal registers.
157 	/* Dual-chip Addressing Mode
159 	 * allowing two to coexist on the same SMI interface.
354 	/* Handles automatic disabling and re-enabling of the PHY
424 	/* Per-port timestamping resources. */
501 #define LINK_UNFORCED		-2
520 #define SPEED_UNFORCED		-2
521 #define DUPLEX_UNFORCED		-2
694 	/* Access port-scoped Precision Time Protocol registers */
744 	return chip->info->max_sid > 0 &&  in mv88e6xxx_has_stu()
745 		chip->info->ops->stu_loadpurge &&  in mv88e6xxx_has_stu()
746 		chip->info->ops->stu_getnext;  in mv88e6xxx_has_stu()
751 	return chip->info->pvt;  in mv88e6xxx_has_pvt()
756 	return !!chip->info->global2_addr;  in mv88e6xxx_has_lag()
761 	return chip->info->num_databases;  in mv88e6xxx_num_databases()
766 	return chip->info->num_macs;  in mv88e6xxx_num_macs()
771 	return chip->info->num_ports;  in mv88e6xxx_num_ports()
776 	return chip->info->max_vid;  in mv88e6xxx_max_vid()
781 	return chip->info->max_sid;  in mv88e6xxx_max_sid()
786 	return GENMASK((s32)mv88e6xxx_num_ports(chip) - 1, 0);  in mv88e6xxx_port_mask()
791 	return chip->info->num_gpio;  in mv88e6xxx_num_gpio()
796 	return (chip->info->invalid_port_mask & BIT(port)) != 0;  in mv88e6xxx_is_invalid_port()
802 	chip->ports[port].mab = mab;  in mv88e6xxx_port_set_mab()
815 	mutex_lock(&chip->reg_lock);  in mv88e6xxx_reg_lock()
820 	mutex_unlock(&chip->reg_lock);  in mv88e6xxx_reg_unlock()