Lines Matching +full:chip +full:- +full:to +full:- +full:chip
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Marvell 88E6xxx Ethernet switch single-chip definition
28 /* PVT limits for 4-bit port and 5-bit switch */
110 * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level
149 * ports 2-4 are not routet to pins.
152 /* Multi-chip Addressing Mode.
153 * Some chips respond to only 2 registers of its own SMI device address
154 * when it is non-zero, and use indirect access to internal registers.
157 /* Dual-chip Addressing Mode
158 * Some chips respond to only half of the 32 SMI addresses,
159 * allowing two to coexist on the same SMI interface.
212 struct irq_chip chip; member
276 struct mv88e6xxx_chip *chip; member
338 /* The dsa_switch this private structure is related to */
341 /* The device this structure is associated to */
344 /* This mutex protects the access to the switch registers */
347 /* The MII bus and the address on the bus that is used to
354 /* Handles automatic disabling and re-enabling of the PHY
363 /* This mutex serialises access to the statistics unit.
368 /* A switch may have a GPIO line tied to its reset pin. Parse
374 /* set to size of eeprom if supported by the switch */
424 /* Per-port timestamping resources. */
433 /* Bridge MST to SID mappings */
438 int (*read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);
439 int (*write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
440 int (*init)(struct mv88e6xxx_chip *chip);
445 struct mv88e6xxx_chip *chip; member
451 /* Switch Setup Errata, called early in the switch setup to
452 * allow any errata actions to be performed
454 int (*setup_errata)(struct mv88e6xxx_chip *chip);
456 int (*ieee_pri_map)(struct mv88e6xxx_chip *chip);
457 int (*ip_pri_map)(struct mv88e6xxx_chip *chip);
460 int (*irl_init_all)(struct mv88e6xxx_chip *chip, int port);
462 int (*get_eeprom)(struct mv88e6xxx_chip *chip,
464 int (*set_eeprom)(struct mv88e6xxx_chip *chip,
467 int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr);
469 int (*phy_read)(struct mv88e6xxx_chip *chip,
472 int (*phy_write)(struct mv88e6xxx_chip *chip,
476 int (*phy_read_c45)(struct mv88e6xxx_chip *chip,
479 int (*phy_write_c45)(struct mv88e6xxx_chip *chip,
484 int (*pot_clear)(struct mv88e6xxx_chip *chip);
487 int (*ppu_enable)(struct mv88e6xxx_chip *chip);
488 int (*ppu_disable)(struct mv88e6xxx_chip *chip);
491 int (*reset)(struct mv88e6xxx_chip *chip);
496 int (*port_set_rgmii_delay)(struct mv88e6xxx_chip *chip, int port,
501 #define LINK_UNFORCED -2
504 * Use LINK_FORCED_UP or LINK_FORCED_DOWN to force link up or down,
507 int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);
511 int (*port_sync_link)(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);
517 int (*port_set_pause)(struct mv88e6xxx_chip *chip, int port,
520 #define SPEED_UNFORCED -2
521 #define DUPLEX_UNFORCED -2
525 * Depending on the chip, 10, 100, 200, 1000, 2500, 10000 are valid.
528 * Use DUPLEX_HALF or DUPLEX_FULL to force half or full duplex,
531 int (*port_set_speed_duplex)(struct mv88e6xxx_chip *chip, int port,
535 phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
538 int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
540 int (*port_set_policy)(struct mv88e6xxx_chip *chip, int port,
544 int (*port_set_frame_mode)(struct mv88e6xxx_chip *chip, int port,
546 int (*port_set_ucast_flood)(struct mv88e6xxx_chip *chip, int port,
548 int (*port_set_mcast_flood)(struct mv88e6xxx_chip *chip, int port,
550 int (*port_set_ether_type)(struct mv88e6xxx_chip *chip, int port,
552 int (*port_set_jumbo_size)(struct mv88e6xxx_chip *chip, int port,
555 int (*port_egress_rate_limiting)(struct mv88e6xxx_chip *chip, int port);
556 int (*port_pause_limit)(struct mv88e6xxx_chip *chip, int port, u8 in,
558 int (*port_disable_learn_limit)(struct mv88e6xxx_chip *chip, int port);
559 int (*port_disable_pri_override)(struct mv88e6xxx_chip *chip, int port);
560 int (*port_setup_message_port)(struct mv88e6xxx_chip *chip, int port);
563 * Some chips allow this to be configured on specific ports.
565 int (*port_set_cmode)(struct mv88e6xxx_chip *chip, int port,
567 int (*port_get_cmode)(struct mv88e6xxx_chip *chip, int port, u8 *cmode);
570 * the upstream port this port should forward to.
572 int (*port_set_upstream_port)(struct mv88e6xxx_chip *chip, int port,
578 int (*stats_snapshot)(struct mv88e6xxx_chip *chip, int port);
583 int (*stats_set_histogram)(struct mv88e6xxx_chip *chip);
586 int (*stats_get_sset_count)(struct mv88e6xxx_chip *chip);
587 int (*stats_get_strings)(struct mv88e6xxx_chip *chip, uint8_t *data);
588 size_t (*stats_get_stat)(struct mv88e6xxx_chip *chip, int port,
591 int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
592 int (*set_egress_port)(struct mv88e6xxx_chip *chip,
599 int (*set_cascade_port)(struct mv88e6xxx_chip *chip, int port);
603 int (*mgmt_rsvd2cpu)(struct mv88e6xxx_chip *chip);
606 int (*serdes_get_lane)(struct mv88e6xxx_chip *chip, int port);
609 unsigned int (*serdes_irq_mapping)(struct mv88e6xxx_chip *chip,
613 int (*serdes_get_sset_count)(struct mv88e6xxx_chip *chip, int port);
614 int (*serdes_get_strings)(struct mv88e6xxx_chip *chip, int port,
616 size_t (*serdes_get_stats)(struct mv88e6xxx_chip *chip, int port,
620 int (*serdes_get_regs_len)(struct mv88e6xxx_chip *chip, int port);
621 void (*serdes_get_regs)(struct mv88e6xxx_chip *chip, int port,
625 int (*serdes_set_tx_amplitude)(struct mv88e6xxx_chip *chip, int port,
629 int (*atu_get_hash)(struct mv88e6xxx_chip *chip, u8 *hash);
630 int (*atu_set_hash)(struct mv88e6xxx_chip *chip, u8 hash);
633 int (*vtu_getnext)(struct mv88e6xxx_chip *chip,
635 int (*vtu_loadpurge)(struct mv88e6xxx_chip *chip,
639 int (*stu_getnext)(struct mv88e6xxx_chip *chip,
641 int (*stu_loadpurge)(struct mv88e6xxx_chip *chip,
647 /* Interface to the AVB/PTP registers */
651 int (*rmu_disable)(struct mv88e6xxx_chip *chip);
657 void (*phylink_get_caps)(struct mv88e6xxx_chip *chip, int port,
663 int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu);
667 /* Action to be performed when the interrupt happens */
668 int (*irq_action)(struct mv88e6xxx_chip *chip, int irq);
669 /* Setup the hardware to generate the interrupt */
670 int (*irq_setup)(struct mv88e6xxx_chip *chip);
671 /* Reset the hardware to stop generating the interrupt */
672 void (*irq_free)(struct mv88e6xxx_chip *chip);
677 int (*get_data)(struct mv88e6xxx_chip *chip, unsigned int pin);
678 int (*set_data)(struct mv88e6xxx_chip *chip, unsigned int pin,
682 int (*get_dir)(struct mv88e6xxx_chip *chip, unsigned int pin);
683 int (*set_dir)(struct mv88e6xxx_chip *chip, unsigned int pin,
687 int (*get_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
689 int (*set_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
694 /* Access port-scoped Precision Time Protocol registers */
695 int (*port_ptp_read)(struct mv88e6xxx_chip *chip, int port, int addr,
697 int (*port_ptp_write)(struct mv88e6xxx_chip *chip, int port, int addr,
701 int (*ptp_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,
703 int (*ptp_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);
706 int (*tai_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,
708 int (*tai_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);
718 int (*port_enable)(struct mv88e6xxx_chip *chip, int port);
719 int (*port_disable)(struct mv88e6xxx_chip *chip, int port);
720 int (*global_enable)(struct mv88e6xxx_chip *chip);
721 int (*global_disable)(struct mv88e6xxx_chip *chip);
722 int (*set_ptp_cpu_port)(struct mv88e6xxx_chip *chip, int port);
735 int (*pcs_init)(struct mv88e6xxx_chip *chip, int port);
736 void (*pcs_teardown)(struct mv88e6xxx_chip *chip, int port);
737 struct phylink_pcs *(*pcs_select)(struct mv88e6xxx_chip *chip, int port,
742 static inline bool mv88e6xxx_has_stu(struct mv88e6xxx_chip *chip) in mv88e6xxx_has_stu() argument
744 return chip->info->max_sid > 0 && in mv88e6xxx_has_stu()
745 chip->info->ops->stu_loadpurge && in mv88e6xxx_has_stu()
746 chip->info->ops->stu_getnext; in mv88e6xxx_has_stu()
749 static inline bool mv88e6xxx_has_pvt(struct mv88e6xxx_chip *chip) in mv88e6xxx_has_pvt() argument
751 return chip->info->pvt; in mv88e6xxx_has_pvt()
754 static inline bool mv88e6xxx_has_lag(struct mv88e6xxx_chip *chip) in mv88e6xxx_has_lag() argument
756 return !!chip->info->global2_addr; in mv88e6xxx_has_lag()
759 static inline unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_databases() argument
761 return chip->info->num_databases; in mv88e6xxx_num_databases()
764 static inline unsigned int mv88e6xxx_num_macs(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_macs() argument
766 return chip->info->num_macs; in mv88e6xxx_num_macs()
769 static inline unsigned int mv88e6xxx_num_ports(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_ports() argument
771 return chip->info->num_ports; in mv88e6xxx_num_ports()
774 static inline unsigned int mv88e6xxx_max_vid(struct mv88e6xxx_chip *chip) in mv88e6xxx_max_vid() argument
776 return chip->info->max_vid; in mv88e6xxx_max_vid()
779 static inline unsigned int mv88e6xxx_max_sid(struct mv88e6xxx_chip *chip) in mv88e6xxx_max_sid() argument
781 return chip->info->max_sid; in mv88e6xxx_max_sid()
784 static inline u16 mv88e6xxx_port_mask(struct mv88e6xxx_chip *chip) in mv88e6xxx_port_mask() argument
786 return GENMASK((s32)mv88e6xxx_num_ports(chip) - 1, 0); in mv88e6xxx_port_mask()
789 static inline unsigned int mv88e6xxx_num_gpio(struct mv88e6xxx_chip *chip) in mv88e6xxx_num_gpio() argument
791 return chip->info->num_gpio; in mv88e6xxx_num_gpio()
794 static inline bool mv88e6xxx_is_invalid_port(struct mv88e6xxx_chip *chip, int port) in mv88e6xxx_is_invalid_port() argument
796 return (chip->info->invalid_port_mask & BIT(port)) != 0; in mv88e6xxx_is_invalid_port()
799 static inline void mv88e6xxx_port_set_mab(struct mv88e6xxx_chip *chip, in mv88e6xxx_port_set_mab() argument
802 chip->ports[port].mab = mab; in mv88e6xxx_port_set_mab()
805 int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);
806 int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
807 int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg,
809 int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg,
811 struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip);
813 static inline void mv88e6xxx_reg_lock(struct mv88e6xxx_chip *chip) in mv88e6xxx_reg_lock() argument
815 mutex_lock(&chip->reg_lock); in mv88e6xxx_reg_lock()
818 static inline void mv88e6xxx_reg_unlock(struct mv88e6xxx_chip *chip) in mv88e6xxx_reg_unlock() argument
820 mutex_unlock(&chip->reg_lock); in mv88e6xxx_reg_unlock()
823 int mv88e6xxx_vtu_walk(struct mv88e6xxx_chip *chip,
824 int (*cb)(struct mv88e6xxx_chip *chip,
829 int mv88e6xxx_fid_map(struct mv88e6xxx_chip *chip, unsigned long *bitmap);