Lines Matching full:bit
43 #define PME_ENABLE BIT(1)
44 #define PME_POLARITY BIT(0)
48 #define SW_GIGABIT_ABLE BIT(6)
49 #define SW_REDUNDANCY_ABLE BIT(5)
50 #define SW_AVB_ABLE BIT(4)
68 #define SW_QW_ABLE BIT(5)
74 #define LUE_INT BIT(31)
75 #define TRIG_TS_INT BIT(30)
76 #define APB_TIMEOUT_INT BIT(29)
87 #define SW_SPARE_REG_2 BIT(7)
88 #define SW_SPARE_REG_1 BIT(6)
89 #define SW_SPARE_REG_0 BIT(5)
90 #define SW_BIG_ENDIAN BIT(4)
91 #define SPI_AUTO_EDGE_DETECTION BIT(1)
92 #define SPI_CLOCK_OUT_RISING_EDGE BIT(0)
95 #define SW_ENABLE_REFCLKO BIT(1)
96 #define SW_REFCLKO_IS_125MHZ BIT(0)
100 #define SW_IBA_ENABLE BIT(31)
101 #define SW_IBA_DA_MATCH BIT(30)
102 #define SW_IBA_INIT BIT(29)
111 #define APB_TIMEOUT_ACKNOWLEDGE BIT(31)
117 #define SW_IBA_REQ BIT(31)
118 #define SW_IBA_RESP BIT(30)
119 #define SW_IBA_DA_MISMATCH BIT(14)
120 #define SW_IBA_FMT_MISMATCH BIT(13)
121 #define SW_IBA_CODE_ERROR BIT(12)
122 #define SW_IBA_CMD_ERROR BIT(11)
123 #define SW_IBA_CMD_LOC_M (BIT(6) - 1)
139 #define SW_IBA_RETRY_CNT_M (BIT(5) - 1)
144 #define SW_PLL_POWER_DOWN BIT(5)
153 #define SW_DOUBLE_TAG BIT(7)
154 #define SW_RESET BIT(1)
165 #define SW_SHAPING_CREDIT_ACCT BIT(1)
166 #define SW_POLICING_CREDIT_ACCT BIT(0)
170 #define SW_VLAN_ENABLE BIT(7)
171 #define SW_DROP_INVALID_VID BIT(6)
175 #define SW_RESV_MCAST_ENABLE BIT(2)
183 #define UNICAST_LEARN_DISABLE BIT(7)
184 #define SW_SRC_ADDR_FILTER BIT(6)
185 #define SW_FLUSH_STP_TABLE BIT(5)
186 #define SW_FLUSH_MSTP_TABLE BIT(4)
187 #define SW_FWD_MCAST_SRC_ADDR BIT(3)
188 #define SW_AGING_ENABLE BIT(2)
189 #define SW_FAST_AGING BIT(1)
190 #define SW_LINK_AUTO_AGING BIT(0)
194 #define SW_TRAP_DOUBLE_TAG BIT(6)
195 #define SW_EGRESS_VLAN_FILTER_DYN BIT(5)
196 #define SW_EGRESS_VLAN_FILTER_STA BIT(4)
214 #define LEARN_FAIL_INT BIT(2)
215 #define ALMOST_FULL_INT BIT(1)
216 #define WRITE_FAIL_INT BIT(0)
230 #define SW_UNK_UCAST_ENABLE BIT(31)
234 #define SW_UNK_MCAST_ENABLE BIT(31)
238 #define SW_UNK_VID_ENABLE BIT(31)
242 #define SW_NEW_BACKOFF BIT(7)
243 #define SW_CHECK_LENGTH BIT(3)
244 #define SW_PAUSE_UNH_MODE BIT(1)
245 #define SW_AGGR_BACKOFF BIT(0)
249 #define SW_BACK_PRESSURE BIT(5)
250 #define FAIR_FLOW_CTRL BIT(4)
251 #define NO_EXC_COLLISION_DROP BIT(3)
252 #define SW_JUMBO_PACKET BIT(2)
253 #define SW_LEGAL_PACKET_DISABLE BIT(1)
254 #define SW_PASS_SHORT_FRAME BIT(0)
258 #define SW_REPLACE_VID BIT(3)
264 #define SW_PASS_PAUSE BIT(3)
268 #define SW_OUT_RATE_LIMIT_QUEUE_BASED BIT(3)
272 #define SW_MIB_COUNTER_FLUSH BIT(7)
273 #define SW_MIB_COUNTER_FREEZE BIT(6)
287 #define SW_TOS_DSCP_REMARK BIT(1)
288 #define SW_TOS_DSCP_REMAP BIT(0)
325 #define SW_IGMP_SNOOP BIT(6)
326 #define SW_IPV6_MLD_OPTION BIT(3)
327 #define SW_IPV6_MLD_SNOOP BIT(2)
328 #define SW_MIRROR_RX_TX BIT(0)
332 #define SW_CLASS_D_IP_ENABLE BIT(31)
349 #define UNICAST_VLAN_BOUNDARY BIT(1)
358 #define VLAN_VALID BIT(31)
359 #define VLAN_FORWARD_OPTION BIT(27)
375 #define VLAN_START BIT(7)
388 #define ALU_DIRECT_INDEX_M (BIT(12) - 1)
392 #define ALU_VALID_CNT_M (BIT(14) - 1)
394 #define ALU_START BIT(7)
395 #define ALU_VALID BIT(6)
396 #define ALU_DIRECT BIT(2)
404 #define ALU_RESV_MCAST_INDEX_M (BIT(6) - 1)
405 #define ALU_STAT_START BIT(7)
406 #define ALU_RESV_MCAST_ADDR BIT(1)
410 #define ALU_V_STATIC_VALID BIT(31)
411 #define ALU_V_SRC_FILTER BIT(30)
412 #define ALU_V_DST_FILTER BIT(29)
413 #define ALU_V_PRIO_AGE_CNT_M (BIT(3) - 1)
419 #define ALU_V_OVERRIDE BIT(31)
420 #define ALU_V_USE_FID BIT(30)
421 #define ALU_V_PORT_MAP (BIT(24) - 1)
425 #define ALU_V_FID_M (BIT(16) - 1)
440 #define HSR_INDEX_MAX BIT(9)
445 #define HSR_PATH_INDEX_M (BIT(4) - 1)
449 #define HSR_VALID_CNT_M (BIT(14) - 1)
451 #define HSR_START BIT(7)
452 #define HSR_VALID BIT(6)
453 #define HSR_SEARCH_END BIT(5)
454 #define HSR_DIRECT BIT(2)
462 #define HSR_V_STATIC_VALID BIT(31)
463 #define HSR_V_AGE_CNT_M (BIT(3) - 1)
465 #define HSR_V_PATH_ID_M (BIT(4) - 1)
491 #define HSR_V_SEQ_M (BIT(16) - 1)
496 #define PTP_STEP_ADJ BIT(6)
497 #define PTP_STEP_DIR BIT(5)
498 #define PTP_READ_TIME BIT(4)
499 #define PTP_LOAD_TIME BIT(3)
500 #define PTP_CLK_ADJ_ENABLE BIT(2)
501 #define PTP_CLK_ENABLE BIT(1)
502 #define PTP_CLK_RESET BIT(0)
519 #define PTP_RATE_DIR BIT(31)
520 #define PTP_TMP_RATE_ENABLE BIT(30)
530 #define PTP_802_1AS BIT(7)
531 #define PTP_ENABLE BIT(6)
532 #define PTP_ETH_ENABLE BIT(5)
533 #define PTP_IPV4_UDP_ENABLE BIT(4)
534 #define PTP_IPV6_UDP_ENABLE BIT(3)
535 #define PTP_TC_P2P BIT(2)
536 #define PTP_MASTER BIT(1)
537 #define PTP_1STEP BIT(0)
541 #define PTP_UNICAST_ENABLE BIT(12)
542 #define PTP_ALTERNATE_MASTER BIT(11)
543 #define PTP_ALL_HIGH_PRIO BIT(10)
544 #define PTP_SYNC_CHECK BIT(9)
545 #define PTP_DELAY_CHECK BIT(8)
546 #define PTP_PDELAY_CHECK BIT(7)
547 #define PTP_DROP_SYNC_DELAY_REQ BIT(5)
548 #define PTP_DOMAIN_CHECK BIT(4)
549 #define PTP_UDP_CHECKSUM BIT(2)
578 #define GPIO_IN BIT(7)
579 #define GPIO_OUT BIT(6)
580 #define TS_INT_ENABLE BIT(5)
581 #define TRIG_ACTIVE BIT(4)
582 #define TRIG_ENABLE BIT(3)
583 #define TRIG_RESET BIT(2)
584 #define TS_ENABLE BIT(1)
585 #define TS_RESET BIT(0)
600 #define TRIG_CASCADE_ENABLE BIT(31)
601 #define TRIG_CASCADE_TAIL BIT(30)
604 #define TRIG_NOW BIT(25)
605 #define TRIG_NOTIFY BIT(24)
606 #define TRIG_EDGE BIT(23)
638 #define TS_EVENT_OVERFLOW BIT(16)
641 #define TS_DETECT_RISE BIT(7)
642 #define TS_DETECT_FALL BIT(6)
644 #define TS_CASCADE_TAIL BIT(5)
647 #define TS_CASCADE_ENABLE BIT(0)
686 #define TS_EVENT_NANOSEC_M (BIT(30) - 1)
700 #define DLR_SRC_PORT_UNICAST BIT(31)
709 #define DLR_RESET_SEQ_ID BIT(3)
710 #define DLR_BACKUP_AUTO_ON BIT(2)
711 #define DLR_BEACON_TX_ENABLE BIT(1)
712 #define DLR_ASSIST_ENABLE BIT(0)
732 #define DLR_TIMEOUT_WINDOW_M (BIT(22) - 1)
736 #define DLR_VLAN_ID_M (BIT(12) - 1)
756 #define HSR_DUPLICATE_DISCARD BIT(7)
757 #define HSR_NODE_UNICAST BIT(6)
760 #define HSR_LEARN_MCAST_DISABLE BIT(2)
769 #define HSR_LEARN_UCAST_DISABLE BIT(7)
770 #define HSR_FLUSH_TABLE BIT(5)
771 #define HSR_PROC_MCAST_SRC BIT(3)
772 #define HSR_AGING_ENABLE BIT(2)
781 #define HSR_WINDOW_OVERFLOW_INT BIT(3)
782 #define HSR_LEARN_FAIL_INT BIT(2)
783 #define HSR_ALMOST_FULL_INT BIT(1)
784 #define HSR_WRITE_FAIL_INT BIT(0)
788 #define HSR_ENTRY_INDEX_M (BIT(10) - 1)
789 #define HSR_FAIL_INDEX_M (BIT(8) - 1)
793 #define HSR_FAIL_LEARN_INDEX_M (BIT(8) - 1)
797 #define HSR_CPU_ACCESS_ENTRY_INDEX_M (BIT(8) - 1)
812 #define PME_WOL_MAGICPKT BIT(2)
813 #define PME_WOL_LINKUP BIT(1)
814 #define PME_WOL_ENERGY BIT(0)
819 #define PORT_SGMII_INT BIT(3)
820 #define PORT_PTP_INT BIT(2)
821 #define PORT_PHY_INT BIT(1)
822 #define PORT_ACL_INT BIT(0)
829 #define PORT_MAC_LOOPBACK BIT(7)
830 #define PORT_FORCE_TX_FLOW_CTRL BIT(4)
831 #define PORT_FORCE_RX_FLOW_CTRL BIT(3)
832 #define PORT_TAIL_TAG_ENABLE BIT(2)
847 #define PORT_INTF_FULL_DUPLEX BIT(2)
848 #define PORT_TX_FLOW_CTRL BIT(1)
849 #define PORT_RX_FLOW_CTRL BIT(0)
856 #define PORT_PHY_RESET BIT(15)
857 #define PORT_PHY_LOOPBACK BIT(14)
858 #define PORT_SPEED_100MBIT BIT(13)
859 #define PORT_AUTO_NEG_ENABLE BIT(12)
860 #define PORT_POWER_DOWN BIT(11)
861 #define PORT_ISOLATE BIT(10)
862 #define PORT_AUTO_NEG_RESTART BIT(9)
863 #define PORT_FULL_DUPLEX BIT(8)
864 #define PORT_COLLISION_TEST BIT(7)
865 #define PORT_SPEED_1000MBIT BIT(6)
869 #define PORT_100BT4_CAPABLE BIT(15)
870 #define PORT_100BTX_FD_CAPABLE BIT(14)
871 #define PORT_100BTX_CAPABLE BIT(13)
872 #define PORT_10BT_FD_CAPABLE BIT(12)
873 #define PORT_10BT_CAPABLE BIT(11)
874 #define PORT_EXTENDED_STATUS BIT(8)
875 #define PORT_MII_SUPPRESS_CAPABLE BIT(6)
876 #define PORT_AUTO_NEG_ACKNOWLEDGE BIT(5)
877 #define PORT_REMOTE_FAULT BIT(4)
878 #define PORT_AUTO_NEG_CAPABLE BIT(3)
879 #define PORT_LINK_STATUS BIT(2)
880 #define PORT_JABBER_DETECT BIT(1)
881 #define PORT_EXTENDED_CAPABILITY BIT(0)
891 #define PORT_AUTO_NEG_NEXT_PAGE BIT(15)
892 #define PORT_AUTO_NEG_REMOTE_FAULT BIT(13)
893 #define PORT_AUTO_NEG_ASYM_PAUSE BIT(11)
894 #define PORT_AUTO_NEG_SYM_PAUSE BIT(10)
895 #define PORT_AUTO_NEG_100BT4 BIT(9)
896 #define PORT_AUTO_NEG_100BTX_FD BIT(8)
897 #define PORT_AUTO_NEG_100BTX BIT(7)
898 #define PORT_AUTO_NEG_10BT_FD BIT(6)
899 #define PORT_AUTO_NEG_10BT BIT(5)
908 #define PORT_REMOTE_NEXT_PAGE BIT(15)
909 #define PORT_REMOTE_ACKNOWLEDGE BIT(14)
910 #define PORT_REMOTE_REMOTE_FAULT BIT(13)
911 #define PORT_REMOTE_ASYM_PAUSE BIT(11)
912 #define PORT_REMOTE_SYM_PAUSE BIT(10)
913 #define PORT_REMOTE_100BTX_FD BIT(8)
914 #define PORT_REMOTE_100BTX BIT(7)
915 #define PORT_REMOTE_10BT_FD BIT(6)
916 #define PORT_REMOTE_10BT BIT(5)
920 #define PORT_AUTO_NEG_MANUAL BIT(12)
921 #define PORT_AUTO_NEG_MASTER BIT(11)
922 #define PORT_AUTO_NEG_MASTER_PREFERRED BIT(10)
923 #define PORT_AUTO_NEG_1000BT_FD BIT(9)
924 #define PORT_AUTO_NEG_1000BT BIT(8)
928 #define PORT_MASTER_FAULT BIT(15)
929 #define PORT_LOCAL_MASTER BIT(14)
930 #define PORT_LOCAL_RX_OK BIT(13)
931 #define PORT_REMOTE_RX_OK BIT(12)
932 #define PORT_REMOTE_1000BT_FD BIT(11)
933 #define PORT_REMOTE_1000BT BIT(10)
964 #define DSP_SQI_ERR_DETECTED BIT(15)
972 #define EEE_ADV_100MBIT BIT(1)
973 #define EEE_ADV_1GBIT BIT(2)
982 #define PORT_100BTX_FD_ABLE BIT(15)
983 #define PORT_100BTX_ABLE BIT(14)
984 #define PORT_10BT_FD_ABLE BIT(13)
985 #define PORT_10BT_ABLE BIT(12)
988 #define PORT_SGMII_AUTO_INCR BIT(23)
991 #define PORT_SGMII_ADDR_M (BIT(21) - 1)
994 #define PORT_SGMII_DATA_M (BIT(16) - 1)
1008 #define SR_MII_RESET BIT(15)
1009 #define SR_MII_LOOPBACK BIT(14)
1010 #define SR_MII_SPEED_100MBIT BIT(13)
1011 #define SR_MII_AUTO_NEG_ENABLE BIT(12)
1012 #define SR_MII_POWER_DOWN BIT(11)
1013 #define SR_MII_AUTO_NEG_RESTART BIT(9)
1014 #define SR_MII_FULL_DUPLEX BIT(8)
1015 #define SR_MII_SPEED_1000MBIT BIT(6)
1022 #define SR_MII_AUTO_NEG_NEXT_PAGE BIT(15)
1035 #define SR_MII_AUTO_NEG_HALF_DUPLEX BIT(6)
1036 #define SR_MII_AUTO_NEG_FULL_DUPLEX BIT(5)
1046 #define SR_MII_8_BIT BIT(8)
1047 #define SR_MII_SGMII_LINK_UP BIT(4)
1048 #define SR_MII_TX_CFG_PHY_MASTER BIT(3)
1052 #define SR_MII_AUTO_NEG_COMPLETE_INTR BIT(0)
1056 #define SR_MII_STAT_LINK_UP BIT(4)
1062 #define SR_MII_STAT_FULL_DUPLEX BIT(1)
1068 #define SR_MII_PHY_WRITE BIT(1)
1069 #define SR_MII_PHY_START_BUSY BIT(0)
1073 #define SR_MII_PHY_ADDR_M (BIT(16) - 1)
1077 #define SR_MII_PHY_DATA_M (BIT(16) - 1)
1084 #define PORT_REMOTE_LOOPBACK BIT(8)
1087 #define PORT_LED_CTRL_TEST BIT(3)
1088 #define PORT_10BT_PREAMBLE BIT(2)
1089 #define PORT_LINK_MD_10BT_ENABLE BIT(1)
1090 #define PORT_LINK_MD_PASS BIT(0)
1094 #define PORT_START_CABLE_DIAG BIT(15)
1095 #define PORT_TX_DISABLE BIT(14)
1110 #define PORT_1000_LINK_GOOD BIT(1)
1111 #define PORT_100_LINK_GOOD BIT(0)
1115 #define PORT_LINK_DETECT BIT(14)
1116 #define PORT_SIGNAL_DETECT BIT(13)
1117 #define PORT_PHY_STAT_MDI BIT(12)
1118 #define PORT_PHY_STAT_MASTER BIT(11)
1125 #define JABBER_INT BIT(7)
1126 #define RX_ERR_INT BIT(6)
1127 #define PAGE_RX_INT BIT(5)
1128 #define PARALLEL_DETECT_FAULT_INT BIT(4)
1129 #define LINK_PARTNER_ACK_INT BIT(3)
1130 #define LINK_DOWN_INT BIT(2)
1131 #define REMOTE_FAULT_INT BIT(1)
1132 #define LINK_UP_INT BIT(0)
1136 #define PORT_REG_CLK_SPEED_25_MHZ BIT(14)
1137 #define PORT_PHY_FORCE_MDI BIT(7)
1138 #define PORT_PHY_AUTO_MDIX_DISABLE BIT(6)
1141 #define PORT_PHY_PCS_LOOPBACK BIT(0)
1147 #define PORT_100BT_FIXED_LATENCY BIT(15)
1151 #define PORT_INT_PIN_HIGH BIT(14)
1152 #define PORT_ENABLE_JABBER BIT(9)
1153 #define PORT_STAT_SPEED_1000MBIT BIT(6)
1154 #define PORT_STAT_SPEED_100MBIT BIT(5)
1155 #define PORT_STAT_SPEED_10MBIT BIT(4)
1156 #define PORT_STAT_FULL_DUPLEX BIT(3)
1159 #define PORT_STAT_MASTER BIT(2)
1160 #define PORT_RESET BIT(1)
1161 #define PORT_LINK_STATUS_FAIL BIT(0)
1164 #define PORT_SGMII_SEL BIT(7)
1165 #define PORT_GRXC_ENABLE BIT(0)
1167 #define PORT_RMII_CLK_SEL BIT(7)
1168 #define PORT_MII_SEL_EDGE BIT(5)
1173 #define PORT_BROADCAST_STORM BIT(1)
1174 #define PORT_JUMBO_FRAME BIT(0)
1178 #define PORT_BACK_PRESSURE BIT(3)
1179 #define PORT_PASS_ALL BIT(0)
1183 #define PORT_100BT_EEE_DISABLE BIT(7)
1184 #define PORT_1000BT_EEE_DISABLE BIT(6)
1193 #define PORT_IN_PORT_BASED BIT(6)
1194 #define PORT_IN_PACKET_BASED BIT(5)
1195 #define PORT_IN_FLOW_CTRL BIT(4)
1202 #define PORT_COUNT_IFG BIT(1)
1203 #define PORT_COUNT_PREAMBLE BIT(0)
1219 #define PORT_RATE_LIMIT_M (BIT(7) - 1)
1224 #define MIB_COUNTER_READ BIT(25)
1225 #define MIB_COUNTER_FLUSH_FREEZE BIT(24)
1226 #define MIB_COUNTER_INDEX_M (BIT(8) - 1)
1257 #define ACL_SRC BIT(1)
1258 #define ACL_EQUAL BIT(0)
1284 #define ACL_TCP_FLAG_ENABLE BIT(0)
1306 #define ACL_VLAN_PRIO_REPLACE BIT(2)
1321 #define ACL_CNT_M (BIT(11) - 1)
1327 #define ACL_MSEC_UNIT BIT(6)
1328 #define ACL_INTR_MODE BIT(5)
1351 #define PORT_ACL_WRITE_DONE BIT(6)
1352 #define PORT_ACL_READ_DONE BIT(5)
1353 #define PORT_ACL_WRITE BIT(4)
1361 #define PORT_MIRROR_RX BIT(6)
1362 #define PORT_MIRROR_TX BIT(5)
1363 #define PORT_MIRROR_SNIFFER BIT(1)
1367 #define PORT_HIGHEST_PRIO BIT(7)
1368 #define PORT_OR_PRIO BIT(6)
1369 #define PORT_MAC_PRIO_ENABLE BIT(4)
1370 #define PORT_VLAN_PRIO_ENABLE BIT(3)
1371 #define PORT_802_1P_PRIO_ENABLE BIT(2)
1372 #define PORT_DIFFSERV_PRIO_ENABLE BIT(1)
1373 #define PORT_ACL_PRIO_ENABLE BIT(0)
1377 #define PORT_USER_PRIO_CEILING BIT(7)
1378 #define PORT_DROP_NON_VLAN BIT(4)
1379 #define PORT_DROP_TAG BIT(3)
1385 #define PORT_ACL_ENABLE BIT(2)
1405 #define POLICE_DROP_ALL BIT(10)
1412 #define PORT_BASED_POLICING BIT(7)
1415 #define COLOR_MARK_ENABLE BIT(4)
1416 #define COLOR_REMAP_ENABLE BIT(3)
1417 #define POLICE_DROP_SRP BIT(2)
1418 #define POLICE_COLOR_NOT_AWARE BIT(1)
1419 #define POLICE_ENABLE BIT(0)
1427 #define POLICE_COLOR_MAP_M (BIT(POLICE_COLOR_MAP_S) - 1)
1442 #define WRED_PM_CTRL_M (BIT(11) - 1)
1457 #define WRED_RANDOM_DROP_ENABLE BIT(31)
1458 #define WRED_PMON_FLUSH BIT(30)
1459 #define WRED_DROP_GYR_DISABLE BIT(29)
1460 #define WRED_DROP_YR_DISABLE BIT(28)
1461 #define WRED_DROP_R_DISABLE BIT(27)
1462 #define WRED_DROP_ALL BIT(26)
1463 #define WRED_PMON_M (BIT(24) - 1)
1469 #define MTI_PVID_REPLACE BIT(0)
1485 #define PORT_QM_MIN_RESV_SPACE_M (BIT(11) - 1)
1491 #define PORT_QM_WATER_MARK_M (BIT(11) - 1)
1496 #define PORT_QM_TX_CNT_M (BIT(11) - 1)
1506 #define PORT_VLAN_LOOKUP_VID_0 BIT(7)
1507 #define PORT_INGRESS_FILTER BIT(6)
1508 #define PORT_DISCARD_NON_VID BIT(5)
1509 #define PORT_MAC_BASED_802_1X BIT(4)
1510 #define PORT_SRC_ADDR_FILTER BIT(3)
1537 #define PTP_PORT_SYNC_INT BIT(15)
1538 #define PTP_PORT_XDELAY_REQ_INT BIT(14)
1539 #define PTP_PORT_PDELAY_RESP_INT BIT(13)
1576 #define PTP_TRIG_UNIT_M (BIT(MAX_TRIG_UNIT) - 1)
1577 #define PTP_TS_UNIT_M (BIT(MAX_TIMESTAMP_UNIT) - 1)