Lines Matching +full:stm32mp1 +full:- +full:fmc2 +full:- +full:nfc
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/dma-mapping.h>
54 /* FMC2 Controller Registers */
283 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init() local
285 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()
289 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
291 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()
292 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()
295 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()
296 pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
297 pmem |= FIELD_PREP(FMC2_PMEM_MEMHOLD, timings->thold_mem); in stm32_fmc2_nfc_timings_init()
298 pmem |= FIELD_PREP(FMC2_PMEM_MEMHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
299 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
302 patt = FIELD_PREP(FMC2_PATT_ATTSET, timings->tset_att); in stm32_fmc2_nfc_timings_init()
303 patt |= FIELD_PREP(FMC2_PATT_ATTWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
304 patt |= FIELD_PREP(FMC2_PATT_ATTHOLD, timings->thold_att); in stm32_fmc2_nfc_timings_init()
305 patt |= FIELD_PREP(FMC2_PATT_ATTHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
306 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
311 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup() local
317 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_setup()
320 } else if (chip->ecc.strength == FMC2_ECC_BCH4) { in stm32_fmc2_nfc_setup()
326 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_setup()
333 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
338 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip() local
343 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
346 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
350 if (nfc->dma_tx_ch && nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
352 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
353 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
359 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
361 dev_err(nfc->dev, "tx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
365 ret = dmaengine_slave_config(nfc->dma_rx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
367 dev_err(nfc->dev, "rx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
372 if (nfc->dma_ecc_ch) { in stm32_fmc2_nfc_select_chip()
378 dma_cfg.src_addr = nfc->io_phys_addr; in stm32_fmc2_nfc_select_chip()
379 dma_cfg.src_addr += chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
383 ret = dmaengine_slave_config(nfc->dma_ecc_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
385 dev_err(nfc->dev, "ECC DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
390 nfc->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
397 static void stm32_fmc2_nfc_set_buswidth_16(struct stm32_fmc2_nfc *nfc, bool set) in stm32_fmc2_nfc_set_buswidth_16() argument
404 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_PWID, pcr); in stm32_fmc2_nfc_set_buswidth_16()
407 static void stm32_fmc2_nfc_set_ecc(struct stm32_fmc2_nfc *nfc, bool enable) in stm32_fmc2_nfc_set_ecc() argument
409 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_ECCEN, in stm32_fmc2_nfc_set_ecc()
413 static void stm32_fmc2_nfc_enable_seq_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_enable_seq_irq() argument
415 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
417 regmap_update_bits(nfc->regmap, FMC2_CSQIER, in stm32_fmc2_nfc_enable_seq_irq()
421 static void stm32_fmc2_nfc_disable_seq_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_disable_seq_irq() argument
423 regmap_update_bits(nfc->regmap, FMC2_CSQIER, FMC2_CSQIER_TCIE, 0); in stm32_fmc2_nfc_disable_seq_irq()
425 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
428 static void stm32_fmc2_nfc_clear_seq_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_clear_seq_irq() argument
430 regmap_write(nfc->regmap, FMC2_CSQICR, FMC2_CSQICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_seq_irq()
433 static void stm32_fmc2_nfc_enable_bch_irq(struct stm32_fmc2_nfc *nfc, int mode) in stm32_fmc2_nfc_enable_bch_irq() argument
435 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
438 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
441 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
445 static void stm32_fmc2_nfc_disable_bch_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_disable_bch_irq() argument
447 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_disable_bch_irq()
450 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
453 static void stm32_fmc2_nfc_clear_bch_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_clear_bch_irq() argument
455 regmap_write(nfc->regmap, FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_bch_irq()
464 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_hwctl() local
466 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_hwctl()
468 if (chip->ecc.strength != FMC2_ECC_HAM) { in stm32_fmc2_nfc_hwctl()
469 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_hwctl()
472 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_hwctl()
473 stm32_fmc2_nfc_clear_bch_irq(nfc); in stm32_fmc2_nfc_hwctl()
474 stm32_fmc2_nfc_enable_bch_irq(nfc, mode); in stm32_fmc2_nfc_hwctl()
477 stm32_fmc2_nfc_set_ecc(nfc, true); in stm32_fmc2_nfc_hwctl()
483 * max of 1-bit)
495 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_ham_calculate() local
499 ret = regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_ham_calculate()
503 dev_err(nfc->dev, "ham timeout\n"); in stm32_fmc2_nfc_ham_calculate()
507 regmap_read(nfc->regmap, FMC2_HECCR, &heccr); in stm32_fmc2_nfc_ham_calculate()
509 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_ham_calculate()
540 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
556 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
571 * max of 4-bit/8-bit)
576 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_calculate() local
580 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_calculate()
582 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_calculate()
583 stm32_fmc2_nfc_disable_bch_irq(nfc); in stm32_fmc2_nfc_bch_calculate()
584 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_calculate()
588 regmap_read(nfc->regmap, FMC2_BCHPBR1, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
594 regmap_read(nfc->regmap, FMC2_BCHPBR2, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
599 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_bch_calculate()
602 regmap_read(nfc->regmap, FMC2_BCHPBR3, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
608 regmap_read(nfc->regmap, FMC2_BCHPBR4, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
612 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_bch_calculate()
634 return -EBADMSG; in stm32_fmc2_nfc_bch_decode()
659 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_correct() local
663 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_correct()
665 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_correct()
666 stm32_fmc2_nfc_disable_bch_irq(nfc); in stm32_fmc2_nfc_bch_correct()
667 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_correct()
670 regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5); in stm32_fmc2_nfc_bch_correct()
672 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_bch_correct()
674 return stm32_fmc2_nfc_bch_decode(chip->ecc.size, dat, ecc_sta); in stm32_fmc2_nfc_bch_correct()
681 int ret, i, s, stat, eccsize = chip->ecc.size; in stm32_fmc2_nfc_read_page()
682 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_read_page()
683 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_read_page()
684 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_read_page()
686 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_read_page()
687 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_read_page()
694 for (i = mtd->writesize + FMC2_BBM_LEN, s = 0; s < eccsteps; in stm32_fmc2_nfc_read_page()
696 chip->ecc.hwctl(chip, NAND_ECC_READ); in stm32_fmc2_nfc_read_page()
711 stat = chip->ecc.correct(chip, p, ecc_code, ecc_calc); in stm32_fmc2_nfc_read_page()
712 if (stat == -EBADMSG) in stm32_fmc2_nfc_read_page()
720 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_read_page()
722 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_read_page()
729 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_read_page()
730 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_read_page()
743 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_rw_page_init() local
745 u32 ecc_offset = mtd->writesize + FMC2_BBM_LEN; in stm32_fmc2_nfc_rw_page_init()
752 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_rw_page_init()
756 * - Set Program Page/Page Read command in stm32_fmc2_nfc_rw_page_init()
757 * - Enable DMA request data in stm32_fmc2_nfc_rw_page_init()
758 * - Set timings in stm32_fmc2_nfc_rw_page_init()
770 * - Set Random Data Input/Random Data Read command in stm32_fmc2_nfc_rw_page_init()
771 * - Enable the sequencer to access the Spare data area in stm32_fmc2_nfc_rw_page_init()
772 * - Enable DMA request status decoding for read in stm32_fmc2_nfc_rw_page_init()
773 * - Set timings in stm32_fmc2_nfc_rw_page_init()
789 * - Set the number of sectors to be written in stm32_fmc2_nfc_rw_page_init()
790 * - Set timings in stm32_fmc2_nfc_rw_page_init()
792 cfg[2] = FIELD_PREP(FMC2_CSQCFGR3_SNBR, chip->ecc.steps - 1); in stm32_fmc2_nfc_rw_page_init()
795 if (chip->options & NAND_ROW_ADDR_3) in stm32_fmc2_nfc_rw_page_init()
810 * - Set chip enable number in stm32_fmc2_nfc_rw_page_init()
811 * - Set ECC byte offset in the spare area in stm32_fmc2_nfc_rw_page_init()
812 * - Calculate the number of address cycles to be issued in stm32_fmc2_nfc_rw_page_init()
813 * - Set byte 5 of address cycle if needed in stm32_fmc2_nfc_rw_page_init()
815 cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel); in stm32_fmc2_nfc_rw_page_init()
816 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_rw_page_init()
820 if (chip->options & NAND_ROW_ADDR_3) { in stm32_fmc2_nfc_rw_page_init()
827 regmap_bulk_write(nfc->regmap, FMC2_CSQCFGR1, cfg, 5); in stm32_fmc2_nfc_rw_page_init()
839 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_xfer() local
842 struct dma_chan *dma_ch = nfc->dma_rx_ch; in stm32_fmc2_nfc_xfer()
845 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_xfer()
846 int eccsize = chip->ecc.size; in stm32_fmc2_nfc_xfer()
855 dma_ch = nfc->dma_tx_ch; in stm32_fmc2_nfc_xfer()
858 for_each_sg(nfc->dma_data_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
863 ret = dma_map_sg(nfc->dev, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
866 return -EIO; in stm32_fmc2_nfc_xfer()
868 desc_data = dmaengine_prep_slave_sg(dma_ch, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
872 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
876 reinit_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_xfer()
877 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_xfer()
878 desc_data->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
879 desc_data->callback_param = &nfc->dma_data_complete; in stm32_fmc2_nfc_xfer()
888 p = nfc->ecc_buf; in stm32_fmc2_nfc_xfer()
889 for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
890 sg_set_buf(sg, p, nfc->dma_ecc_len); in stm32_fmc2_nfc_xfer()
891 p += nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
894 ret = dma_map_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
897 ret = -EIO; in stm32_fmc2_nfc_xfer()
901 desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch, in stm32_fmc2_nfc_xfer()
902 nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
906 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
910 reinit_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_xfer()
911 desc_ecc->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
912 desc_ecc->callback_param = &nfc->dma_ecc_complete; in stm32_fmc2_nfc_xfer()
917 dma_async_issue_pending(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
920 stm32_fmc2_nfc_clear_seq_irq(nfc); in stm32_fmc2_nfc_xfer()
921 stm32_fmc2_nfc_enable_seq_irq(nfc); in stm32_fmc2_nfc_xfer()
924 regmap_update_bits(nfc->regmap, FMC2_CSQCR, in stm32_fmc2_nfc_xfer()
928 if (!wait_for_completion_timeout(&nfc->complete, timeout)) { in stm32_fmc2_nfc_xfer()
929 dev_err(nfc->dev, "seq timeout\n"); in stm32_fmc2_nfc_xfer()
930 stm32_fmc2_nfc_disable_seq_irq(nfc); in stm32_fmc2_nfc_xfer()
933 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
934 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
939 if (!wait_for_completion_timeout(&nfc->dma_data_complete, timeout)) { in stm32_fmc2_nfc_xfer()
940 dev_err(nfc->dev, "data DMA timeout\n"); in stm32_fmc2_nfc_xfer()
942 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
947 if (!wait_for_completion_timeout(&nfc->dma_ecc_complete, in stm32_fmc2_nfc_xfer()
949 dev_err(nfc->dev, "ECC DMA timeout\n"); in stm32_fmc2_nfc_xfer()
950 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
951 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
957 dma_unmap_sg(nfc->dev, nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
961 dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir); in stm32_fmc2_nfc_xfer()
982 ret = nand_change_write_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_write()
983 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_write()
997 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page()
1010 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page_raw()
1018 static u16 stm32_fmc2_nfc_get_mapping_status(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_get_mapping_status() argument
1022 regmap_read(nfc->regmap, FMC2_CSQEMSR, &csqemsr); in stm32_fmc2_nfc_get_mapping_status()
1031 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_correct() local
1032 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_seq_correct()
1033 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_seq_correct()
1034 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_seq_correct()
1035 int i, s, eccsize = chip->ecc.size; in stm32_fmc2_nfc_seq_correct()
1036 u32 *ecc_sta = (u32 *)nfc->ecc_buf; in stm32_fmc2_nfc_seq_correct()
1037 u16 sta_map = stm32_fmc2_nfc_get_mapping_status(nfc); in stm32_fmc2_nfc_seq_correct()
1067 if (stat == -EBADMSG) in stm32_fmc2_nfc_seq_correct()
1076 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_seq_correct()
1078 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_seq_correct()
1090 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_read_page() local
1091 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_seq_read_page()
1092 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_seq_read_page()
1096 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page()
1108 sta_map = stm32_fmc2_nfc_get_mapping_status(nfc); in stm32_fmc2_nfc_seq_read_page()
1113 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1114 chip->oob_poi, in stm32_fmc2_nfc_seq_read_page()
1115 mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1121 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1122 chip->oob_poi, mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1126 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in stm32_fmc2_nfc_seq_read_page()
1127 chip->ecc.total); in stm32_fmc2_nfc_seq_read_page()
1132 return chip->ecc.correct(chip, buf, ecc_code, ecc_calc); in stm32_fmc2_nfc_seq_read_page()
1141 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page_raw()
1155 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page_raw()
1156 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_read_page_raw()
1164 struct stm32_fmc2_nfc *nfc = (struct stm32_fmc2_nfc *)dev_id; in stm32_fmc2_nfc_irq() local
1166 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1168 stm32_fmc2_nfc_disable_seq_irq(nfc); in stm32_fmc2_nfc_irq()
1169 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
1171 stm32_fmc2_nfc_disable_bch_irq(nfc); in stm32_fmc2_nfc_irq()
1173 complete(&nfc->complete); in stm32_fmc2_nfc_irq()
1181 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_read_data() local
1182 void __iomem *io_addr_r = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_read_data()
1184 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1185 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_read_data()
1186 stm32_fmc2_nfc_set_buswidth_16(nfc, false); in stm32_fmc2_nfc_read_data()
1192 len -= sizeof(u8); in stm32_fmc2_nfc_read_data()
1199 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1207 len -= sizeof(u32); in stm32_fmc2_nfc_read_data()
1214 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1220 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1221 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_read_data()
1222 stm32_fmc2_nfc_set_buswidth_16(nfc, true); in stm32_fmc2_nfc_read_data()
1228 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_write_data() local
1229 void __iomem *io_addr_w = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_write_data()
1231 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1232 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_write_data()
1233 stm32_fmc2_nfc_set_buswidth_16(nfc, false); in stm32_fmc2_nfc_write_data()
1239 len -= sizeof(u8); in stm32_fmc2_nfc_write_data()
1246 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1254 len -= sizeof(u32); in stm32_fmc2_nfc_write_data()
1261 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1267 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1268 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_write_data()
1269 stm32_fmc2_nfc_set_buswidth_16(nfc, true); in stm32_fmc2_nfc_write_data()
1275 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_waitrdy() local
1280 if (regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_waitrdy()
1283 dev_warn(nfc->dev, "Waitrdy timeout\n"); in stm32_fmc2_nfc_waitrdy()
1287 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy()
1290 regmap_write(nfc->regmap, FMC2_ICR, FMC2_ICR_CIHLF); in stm32_fmc2_nfc_waitrdy()
1293 return regmap_read_poll_timeout(nfc->regmap, FMC2_ISR, isr, in stm32_fmc2_nfc_waitrdy()
1302 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_exec_op() local
1310 ret = stm32_fmc2_nfc_select_chip(chip, op->cs); in stm32_fmc2_nfc_exec_op()
1314 for (op_id = 0; op_id < op->ninstrs; op_id++) { in stm32_fmc2_nfc_exec_op()
1315 instr = &op->instrs[op_id]; in stm32_fmc2_nfc_exec_op()
1317 switch (instr->type) { in stm32_fmc2_nfc_exec_op()
1319 writeb_relaxed(instr->ctx.cmd.opcode, in stm32_fmc2_nfc_exec_op()
1320 nfc->cmd_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1324 for (i = 0; i < instr->ctx.addr.naddrs; i++) in stm32_fmc2_nfc_exec_op()
1325 writeb_relaxed(instr->ctx.addr.addrs[i], in stm32_fmc2_nfc_exec_op()
1326 nfc->addr_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1330 stm32_fmc2_nfc_read_data(chip, instr->ctx.data.buf.in, in stm32_fmc2_nfc_exec_op()
1331 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1332 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1336 stm32_fmc2_nfc_write_data(chip, instr->ctx.data.buf.out, in stm32_fmc2_nfc_exec_op()
1337 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1338 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1342 timeout = instr->ctx.waitrdy.timeout_ms; in stm32_fmc2_nfc_exec_op()
1351 static void stm32_fmc2_nfc_init(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_init() argument
1355 regmap_read(nfc->regmap, FMC2_PCR, &pcr); in stm32_fmc2_nfc_init()
1358 nfc->cs_sel = -1; in stm32_fmc2_nfc_init()
1385 /* Enable FMC2 controller */ in stm32_fmc2_nfc_init()
1386 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_init()
1387 regmap_update_bits(nfc->regmap, FMC2_BCR1, in stm32_fmc2_nfc_init()
1390 regmap_write(nfc->regmap, FMC2_PCR, pcr); in stm32_fmc2_nfc_init()
1391 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); in stm32_fmc2_nfc_init()
1392 regmap_write(nfc->regmap, FMC2_PATT, FMC2_PATT_DEFAULT); in stm32_fmc2_nfc_init()
1398 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_calc_timings() local
1400 struct stm32_fmc2_timings *tims = &nand->timings; in stm32_fmc2_nfc_calc_timings()
1401 unsigned long hclk = clk_get_rate(nfc->clk); in stm32_fmc2_nfc_calc_timings()
1406 tar = max_t(unsigned long, hclkp, sdrt->tAR_min); in stm32_fmc2_nfc_calc_timings()
1407 timing = DIV_ROUND_UP(tar, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1408 tims->tar = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1410 tclr = max_t(unsigned long, hclkp, sdrt->tCLR_min); in stm32_fmc2_nfc_calc_timings()
1411 timing = DIV_ROUND_UP(tclr, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1412 tims->tclr = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1414 tims->thiz = FMC2_THIZ; in stm32_fmc2_nfc_calc_timings()
1415 thiz = (tims->thiz + 1) * hclkp; in stm32_fmc2_nfc_calc_timings()
1422 twait = max_t(unsigned long, hclkp, sdrt->tRP_min); in stm32_fmc2_nfc_calc_timings()
1423 twait = max_t(unsigned long, twait, sdrt->tWP_min); in stm32_fmc2_nfc_calc_timings()
1424 twait = max_t(unsigned long, twait, sdrt->tREA_max + FMC2_TIO); in stm32_fmc2_nfc_calc_timings()
1426 tims->twait = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1429 * tSETUP_MEM > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1430 * tSETUP_MEM > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1431 * tSETUP_MEM > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1434 if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1435 tset_mem = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1436 if (sdrt->tALS_min > twait && (tset_mem < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1437 tset_mem = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1438 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1439 (tset_mem < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1440 tset_mem = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1442 tims->tset_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1446 * tHOLD_MEM > tREH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1447 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings()
1449 thold_mem = max_t(unsigned long, hclkp, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1450 if (sdrt->tREH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1451 (thold_mem < sdrt->tREH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1452 thold_mem = sdrt->tREH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1453 if ((sdrt->tRC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1454 (thold_mem < sdrt->tRC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1455 thold_mem = sdrt->tRC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1456 if ((sdrt->tWC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1457 (thold_mem < sdrt->tWC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1458 thold_mem = sdrt->tWC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1460 tims->thold_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1463 * tSETUP_ATT > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1464 * tSETUP_ATT > tCLS - tWAIT in stm32_fmc2_nfc_calc_timings()
1465 * tSETUP_ATT > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1466 * tSETUP_ATT > tRHW - tHOLD_MEM in stm32_fmc2_nfc_calc_timings()
1467 * tSETUP_ATT > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1470 if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1471 tset_att = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1472 if (sdrt->tCLS_min > twait && (tset_att < sdrt->tCLS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1473 tset_att = sdrt->tCLS_min - twait; in stm32_fmc2_nfc_calc_timings()
1474 if (sdrt->tALS_min > twait && (tset_att < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1475 tset_att = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1476 if (sdrt->tRHW_min > thold_mem && in stm32_fmc2_nfc_calc_timings()
1477 (tset_att < sdrt->tRHW_min - thold_mem)) in stm32_fmc2_nfc_calc_timings()
1478 tset_att = sdrt->tRHW_min - thold_mem; in stm32_fmc2_nfc_calc_timings()
1479 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1480 (tset_att < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1481 tset_att = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1483 tims->tset_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1491 * tHOLD_ATT > tWB + tIO + tSYNC - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1492 * tHOLD_ATT > tADL - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1493 * tHOLD_ATT > tWH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1494 * tHOLD_ATT > tWHR - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1495 * tHOLD_ATT > tRC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1496 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1498 thold_att = max_t(unsigned long, hclkp, sdrt->tALH_min); in stm32_fmc2_nfc_calc_timings()
1499 thold_att = max_t(unsigned long, thold_att, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1500 thold_att = max_t(unsigned long, thold_att, sdrt->tCLH_min); in stm32_fmc2_nfc_calc_timings()
1501 thold_att = max_t(unsigned long, thold_att, sdrt->tCOH_min); in stm32_fmc2_nfc_calc_timings()
1502 thold_att = max_t(unsigned long, thold_att, sdrt->tDH_min); in stm32_fmc2_nfc_calc_timings()
1503 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings()
1504 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1505 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
1506 if (sdrt->tADL_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1507 (thold_att < sdrt->tADL_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1508 thold_att = sdrt->tADL_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1509 if (sdrt->tWH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1510 (thold_att < sdrt->tWH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1511 thold_att = sdrt->tWH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1512 if (sdrt->tWHR_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1513 (thold_att < sdrt->tWHR_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1514 thold_att = sdrt->tWHR_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1515 if ((sdrt->tRC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1516 (thold_att < sdrt->tRC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1517 thold_att = sdrt->tRC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1518 if ((sdrt->tWC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1519 (thold_att < sdrt->tWC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1520 thold_att = sdrt->tWC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1522 tims->thold_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1534 if (conf->timings.mode > 3) in stm32_fmc2_nfc_setup_interface()
1535 return -EOPNOTSUPP; in stm32_fmc2_nfc_setup_interface()
1546 static int stm32_fmc2_nfc_dma_setup(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_dma_setup() argument
1550 nfc->dma_tx_ch = dma_request_chan(nfc->dev, "tx"); in stm32_fmc2_nfc_dma_setup()
1551 if (IS_ERR(nfc->dma_tx_ch)) { in stm32_fmc2_nfc_dma_setup()
1552 ret = PTR_ERR(nfc->dma_tx_ch); in stm32_fmc2_nfc_dma_setup()
1553 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1554 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1556 nfc->dma_tx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1560 nfc->dma_rx_ch = dma_request_chan(nfc->dev, "rx"); in stm32_fmc2_nfc_dma_setup()
1561 if (IS_ERR(nfc->dma_rx_ch)) { in stm32_fmc2_nfc_dma_setup()
1562 ret = PTR_ERR(nfc->dma_rx_ch); in stm32_fmc2_nfc_dma_setup()
1563 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1564 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1566 nfc->dma_rx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1570 nfc->dma_ecc_ch = dma_request_chan(nfc->dev, "ecc"); in stm32_fmc2_nfc_dma_setup()
1571 if (IS_ERR(nfc->dma_ecc_ch)) { in stm32_fmc2_nfc_dma_setup()
1572 ret = PTR_ERR(nfc->dma_ecc_ch); in stm32_fmc2_nfc_dma_setup()
1573 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1574 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1576 nfc->dma_ecc_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1580 ret = sg_alloc_table(&nfc->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1585 nfc->ecc_buf = devm_kzalloc(nfc->dev, FMC2_MAX_ECC_BUF_LEN, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1586 if (!nfc->ecc_buf) in stm32_fmc2_nfc_dma_setup()
1587 return -ENOMEM; in stm32_fmc2_nfc_dma_setup()
1589 ret = sg_alloc_table(&nfc->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1593 init_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_dma_setup()
1594 init_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_dma_setup()
1599 if (ret == -ENODEV) { in stm32_fmc2_nfc_dma_setup()
1600 dev_warn(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1610 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_nand_callbacks_setup() local
1616 if (nfc->dma_tx_ch && nfc->dma_rx_ch && nfc->dma_ecc_ch) { in stm32_fmc2_nfc_nand_callbacks_setup()
1618 chip->ecc.correct = stm32_fmc2_nfc_seq_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1619 chip->ecc.write_page = stm32_fmc2_nfc_seq_write_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1620 chip->ecc.read_page = stm32_fmc2_nfc_seq_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1621 chip->ecc.write_page_raw = stm32_fmc2_nfc_seq_write_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1622 chip->ecc.read_page_raw = stm32_fmc2_nfc_seq_read_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1625 chip->ecc.hwctl = stm32_fmc2_nfc_hwctl; in stm32_fmc2_nfc_nand_callbacks_setup()
1626 if (chip->ecc.strength == FMC2_ECC_HAM) { in stm32_fmc2_nfc_nand_callbacks_setup()
1628 chip->ecc.calculate = stm32_fmc2_nfc_ham_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1629 chip->ecc.correct = stm32_fmc2_nfc_ham_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1630 chip->ecc.options |= NAND_ECC_GENERIC_ERASED_CHECK; in stm32_fmc2_nfc_nand_callbacks_setup()
1633 chip->ecc.calculate = stm32_fmc2_nfc_bch_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1634 chip->ecc.correct = stm32_fmc2_nfc_bch_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1635 chip->ecc.read_page = stm32_fmc2_nfc_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1640 if (chip->ecc.strength == FMC2_ECC_HAM) in stm32_fmc2_nfc_nand_callbacks_setup()
1641 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 4 : 3; in stm32_fmc2_nfc_nand_callbacks_setup()
1642 else if (chip->ecc.strength == FMC2_ECC_BCH8) in stm32_fmc2_nfc_nand_callbacks_setup()
1643 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 14 : 13; in stm32_fmc2_nfc_nand_callbacks_setup()
1645 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 8 : 7; in stm32_fmc2_nfc_nand_callbacks_setup()
1652 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_ecc()
1655 return -ERANGE; in stm32_fmc2_nfc_ooblayout_ecc()
1657 oobregion->length = ecc->total; in stm32_fmc2_nfc_ooblayout_ecc()
1658 oobregion->offset = FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_ecc()
1667 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_free()
1670 return -ERANGE; in stm32_fmc2_nfc_ooblayout_free()
1672 oobregion->length = mtd->oobsize - ecc->total - FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1673 oobregion->offset = ecc->total + FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1703 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_attach_chip() local
1714 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) { in stm32_fmc2_nfc_attach_chip()
1715 dev_err(nfc->dev, in stm32_fmc2_nfc_attach_chip()
1717 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1721 if (!chip->ecc.size) in stm32_fmc2_nfc_attach_chip()
1722 chip->ecc.size = FMC2_ECC_STEP_SIZE; in stm32_fmc2_nfc_attach_chip()
1724 if (!chip->ecc.strength) in stm32_fmc2_nfc_attach_chip()
1725 chip->ecc.strength = FMC2_ECC_BCH8; in stm32_fmc2_nfc_attach_chip()
1728 mtd->oobsize - FMC2_BBM_LEN); in stm32_fmc2_nfc_attach_chip()
1730 dev_err(nfc->dev, "no valid ECC settings set\n"); in stm32_fmc2_nfc_attach_chip()
1734 if (mtd->writesize / chip->ecc.size > FMC2_MAX_SG) { in stm32_fmc2_nfc_attach_chip()
1735 dev_err(nfc->dev, "nand page size is not supported\n"); in stm32_fmc2_nfc_attach_chip()
1736 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1739 if (chip->bbt_options & NAND_BBT_USE_FLASH) in stm32_fmc2_nfc_attach_chip()
1740 chip->bbt_options |= NAND_BBT_NO_OOB; in stm32_fmc2_nfc_attach_chip()
1759 if (nand->wp_gpio) in stm32_fmc2_nfc_wp_enable()
1760 gpiod_set_value(nand->wp_gpio, 1); in stm32_fmc2_nfc_wp_enable()
1765 if (nand->wp_gpio) in stm32_fmc2_nfc_wp_disable()
1766 gpiod_set_value(nand->wp_gpio, 0); in stm32_fmc2_nfc_wp_disable()
1769 static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, in stm32_fmc2_nfc_parse_child() argument
1772 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_parse_child()
1776 if (!of_get_property(dn, "reg", &nand->ncs)) in stm32_fmc2_nfc_parse_child()
1777 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1779 nand->ncs /= sizeof(u32); in stm32_fmc2_nfc_parse_child()
1780 if (!nand->ncs) { in stm32_fmc2_nfc_parse_child()
1781 dev_err(nfc->dev, "invalid reg property size\n"); in stm32_fmc2_nfc_parse_child()
1782 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1785 for (i = 0; i < nand->ncs; i++) { in stm32_fmc2_nfc_parse_child()
1788 dev_err(nfc->dev, "could not retrieve reg property: %d\n", in stm32_fmc2_nfc_parse_child()
1794 dev_err(nfc->dev, "invalid reg value: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1795 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1798 if (nfc->cs_assigned & BIT(cs)) { in stm32_fmc2_nfc_parse_child()
1799 dev_err(nfc->dev, "cs already assigned: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1800 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1803 nfc->cs_assigned |= BIT(cs); in stm32_fmc2_nfc_parse_child()
1804 nand->cs_used[i] = cs; in stm32_fmc2_nfc_parse_child()
1807 nand->wp_gpio = devm_fwnode_gpiod_get(nfc->dev, of_fwnode_handle(dn), in stm32_fmc2_nfc_parse_child()
1809 if (IS_ERR(nand->wp_gpio)) { in stm32_fmc2_nfc_parse_child()
1810 ret = PTR_ERR(nand->wp_gpio); in stm32_fmc2_nfc_parse_child()
1811 if (ret != -ENOENT) in stm32_fmc2_nfc_parse_child()
1812 return dev_err_probe(nfc->dev, ret, in stm32_fmc2_nfc_parse_child()
1815 nand->wp_gpio = NULL; in stm32_fmc2_nfc_parse_child()
1818 nand_set_flash_node(&nand->chip, dn); in stm32_fmc2_nfc_parse_child()
1823 static int stm32_fmc2_nfc_parse_dt(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_parse_dt() argument
1825 struct device_node *dn = nfc->dev->of_node; in stm32_fmc2_nfc_parse_dt()
1831 dev_err(nfc->dev, "NAND chip not defined\n"); in stm32_fmc2_nfc_parse_dt()
1832 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1836 dev_err(nfc->dev, "too many NAND chips defined\n"); in stm32_fmc2_nfc_parse_dt()
1837 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1841 ret = stm32_fmc2_nfc_parse_child(nfc, child); in stm32_fmc2_nfc_parse_dt()
1851 static int stm32_fmc2_nfc_set_cdev(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_set_cdev() argument
1853 struct device *dev = nfc->dev; in stm32_fmc2_nfc_set_cdev()
1856 if (dev->parent && of_device_is_compatible(dev->parent->of_node, in stm32_fmc2_nfc_set_cdev()
1857 "st,stm32mp1-fmc2-ebi")) in stm32_fmc2_nfc_set_cdev()
1860 if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { in stm32_fmc2_nfc_set_cdev()
1862 nfc->cdev = dev->parent; in stm32_fmc2_nfc_set_cdev()
1867 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1871 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1873 nfc->cdev = dev; in stm32_fmc2_nfc_set_cdev()
1880 struct device *dev = &pdev->dev; in stm32_fmc2_nfc_probe()
1882 struct stm32_fmc2_nfc *nfc; in stm32_fmc2_nfc_probe() local
1891 nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL); in stm32_fmc2_nfc_probe()
1892 if (!nfc) in stm32_fmc2_nfc_probe()
1893 return -ENOMEM; in stm32_fmc2_nfc_probe()
1895 nfc->dev = dev; in stm32_fmc2_nfc_probe()
1896 nand_controller_init(&nfc->base); in stm32_fmc2_nfc_probe()
1897 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; in stm32_fmc2_nfc_probe()
1899 ret = stm32_fmc2_nfc_set_cdev(nfc); in stm32_fmc2_nfc_probe()
1903 ret = stm32_fmc2_nfc_parse_dt(nfc); in stm32_fmc2_nfc_probe()
1907 ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); in stm32_fmc2_nfc_probe()
1911 nfc->io_phys_addr = cres.start; in stm32_fmc2_nfc_probe()
1913 nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); in stm32_fmc2_nfc_probe()
1914 if (IS_ERR(nfc->regmap)) in stm32_fmc2_nfc_probe()
1915 return PTR_ERR(nfc->regmap); in stm32_fmc2_nfc_probe()
1917 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_probe()
1922 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_probe()
1925 nfc->data_base[chip_cs] = devm_platform_get_and_ioremap_resource(pdev, in stm32_fmc2_nfc_probe()
1927 if (IS_ERR(nfc->data_base[chip_cs])) in stm32_fmc2_nfc_probe()
1928 return PTR_ERR(nfc->data_base[chip_cs]); in stm32_fmc2_nfc_probe()
1930 nfc->data_phys_addr[chip_cs] = res->start; in stm32_fmc2_nfc_probe()
1932 nfc->cmd_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 1); in stm32_fmc2_nfc_probe()
1933 if (IS_ERR(nfc->cmd_base[chip_cs])) in stm32_fmc2_nfc_probe()
1934 return PTR_ERR(nfc->cmd_base[chip_cs]); in stm32_fmc2_nfc_probe()
1936 nfc->addr_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 2); in stm32_fmc2_nfc_probe()
1937 if (IS_ERR(nfc->addr_base[chip_cs])) in stm32_fmc2_nfc_probe()
1938 return PTR_ERR(nfc->addr_base[chip_cs]); in stm32_fmc2_nfc_probe()
1946 dev_name(dev), nfc); in stm32_fmc2_nfc_probe()
1952 init_completion(&nfc->complete); in stm32_fmc2_nfc_probe()
1954 nfc->clk = devm_clk_get_enabled(nfc->cdev, NULL); in stm32_fmc2_nfc_probe()
1955 if (IS_ERR(nfc->clk)) { in stm32_fmc2_nfc_probe()
1957 return PTR_ERR(nfc->clk); in stm32_fmc2_nfc_probe()
1963 if (ret == -EPROBE_DEFER) in stm32_fmc2_nfc_probe()
1970 ret = stm32_fmc2_nfc_dma_setup(nfc); in stm32_fmc2_nfc_probe()
1974 stm32_fmc2_nfc_init(nfc); in stm32_fmc2_nfc_probe()
1976 nand = &nfc->nand; in stm32_fmc2_nfc_probe()
1977 chip = &nand->chip; in stm32_fmc2_nfc_probe()
1979 mtd->dev.parent = dev; in stm32_fmc2_nfc_probe()
1981 chip->controller = &nfc->base; in stm32_fmc2_nfc_probe()
1982 chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | in stm32_fmc2_nfc_probe()
1988 ret = nand_scan(chip, nand->ncs); in stm32_fmc2_nfc_probe()
1996 platform_set_drvdata(pdev, nfc); in stm32_fmc2_nfc_probe()
2007 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_probe()
2008 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_probe()
2009 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_probe()
2010 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_probe()
2011 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_probe()
2012 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_probe()
2014 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_probe()
2015 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_probe()
2022 struct stm32_fmc2_nfc *nfc = platform_get_drvdata(pdev); in stm32_fmc2_nfc_remove() local
2023 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_remove()
2024 struct nand_chip *chip = &nand->chip; in stm32_fmc2_nfc_remove()
2031 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_remove()
2032 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_remove()
2033 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_remove()
2034 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_remove()
2035 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_remove()
2036 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_remove()
2038 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_remove()
2039 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_remove()
2046 struct stm32_fmc2_nfc *nfc = dev_get_drvdata(dev); in stm32_fmc2_nfc_suspend() local
2047 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_suspend()
2049 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_suspend()
2060 struct stm32_fmc2_nfc *nfc = dev_get_drvdata(dev); in stm32_fmc2_nfc_resume() local
2061 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_resume()
2066 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_resume()
2072 stm32_fmc2_nfc_init(nfc); in stm32_fmc2_nfc_resume()
2077 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_resume()
2080 nand_reset(&nand->chip, chip_cs); in stm32_fmc2_nfc_resume()
2090 {.compatible = "st,stm32mp15-fmc2"},
2091 {.compatible = "st,stm32mp1-fmc2-nfc"},
2109 MODULE_DESCRIPTION("STMicroelectronics STM32 FMC2 NFC driver");