Lines Matching +full:chip +full:- +full:to +full:- +full:chip
1 // SPDX-License-Identifier: GPL-2.0-only
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
23 * BBT table is not serialized, has to be fixed
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
52 int lastpage = (mtd->erasesize / mtd->writesize) - 1; in nand_pairing_dist3_get_info()
59 info->group = 0; in nand_pairing_dist3_get_info()
60 info->pair = (page + 1) / 2; in nand_pairing_dist3_get_info()
62 info->group = 1; in nand_pairing_dist3_get_info()
63 info->pair = (page + 1 - dist) / 2; in nand_pairing_dist3_get_info()
72 int lastpair = ((mtd->erasesize / mtd->writesize) - 1) / 2; in nand_pairing_dist3_get_wunit()
73 int page = info->pair * 2; in nand_pairing_dist3_get_wunit()
76 if (!info->group && !info->pair) in nand_pairing_dist3_get_wunit()
79 if (info->pair == lastpair && info->group) in nand_pairing_dist3_get_wunit()
82 if (!info->group) in nand_pairing_dist3_get_wunit()
83 page--; in nand_pairing_dist3_get_wunit()
84 else if (info->pair) in nand_pairing_dist3_get_wunit()
85 page += dist - 1; in nand_pairing_dist3_get_wunit()
87 if (page >= mtd->erasesize / mtd->writesize) in nand_pairing_dist3_get_wunit()
88 return -EINVAL; in nand_pairing_dist3_get_wunit()
99 static int check_offs_len(struct nand_chip *chip, loff_t ofs, uint64_t len) in check_offs_len() argument
104 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
106 ret = -EINVAL; in check_offs_len()
110 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
112 ret = -EINVAL; in check_offs_len()
119 * nand_extract_bits - Copy unaligned bits from one buffer to another one
124 * @nbits: number of bits to copy from @src to @dst
126 * Copy bits from one memory region to another (overlap authorized).
139 n = min3(8 - dst_off, 8 - src_off, nbits); in nand_extract_bits()
141 tmp = (*src >> src_off) & GENMASK(n - 1, 0); in nand_extract_bits()
142 *dst &= ~GENMASK(n - 1 + dst_off, dst_off); in nand_extract_bits()
148 dst_off -= 8; in nand_extract_bits()
154 src_off -= 8; in nand_extract_bits()
157 nbits -= n; in nand_extract_bits()
163 * nand_select_target() - Select a NAND target (A.K.A. die)
164 * @chip: NAND chip object
165 * @cs: the CS line to select. Note that this CS id is always from the chip
168 * Select a NAND target so that further operations executed on @chip go to the
171 void nand_select_target(struct nand_chip *chip, unsigned int cs) in nand_select_target() argument
177 if (WARN_ON(cs > nanddev_ntargets(&chip->base))) in nand_select_target()
180 chip->cur_cs = cs; in nand_select_target()
182 if (chip->legacy.select_chip) in nand_select_target()
183 chip->legacy.select_chip(chip, cs); in nand_select_target()
188 * nand_deselect_target() - Deselect the currently selected target
189 * @chip: NAND chip object
192 * executed on @chip after the target has been deselected is undefined.
194 void nand_deselect_target(struct nand_chip *chip) in nand_deselect_target() argument
196 if (chip->legacy.select_chip) in nand_deselect_target()
197 chip->legacy.select_chip(chip, -1); in nand_deselect_target()
199 chip->cur_cs = -1; in nand_deselect_target()
204 * nand_release_device - [GENERIC] release chip
205 * @chip: NAND chip object
207 * Release chip lock and wake up anyone waiting on the device.
209 static void nand_release_device(struct nand_chip *chip) in nand_release_device() argument
211 /* Release the controller and the chip */ in nand_release_device()
212 mutex_unlock(&chip->controller->lock); in nand_release_device()
213 mutex_unlock(&chip->lock); in nand_release_device()
217 * nand_bbm_get_next_page - Get the next page for bad block markers
218 * @chip: NAND chip object
219 * @page: First page to start checking for bad block marker usage
221 * Returns an integer that corresponds to the page offset within a block, for
222 * a page that is used to store bad block markers. If no more pages are
223 * available, -EINVAL is returned.
225 int nand_bbm_get_next_page(struct nand_chip *chip, int page) in nand_bbm_get_next_page() argument
227 struct mtd_info *mtd = nand_to_mtd(chip); in nand_bbm_get_next_page()
228 int last_page = ((mtd->erasesize - mtd->writesize) >> in nand_bbm_get_next_page()
229 chip->page_shift) & chip->pagemask; in nand_bbm_get_next_page()
233 if (page == 0 && !(chip->options & bbm_flags)) in nand_bbm_get_next_page()
235 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE) in nand_bbm_get_next_page()
237 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE) in nand_bbm_get_next_page()
239 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE) in nand_bbm_get_next_page()
242 return -EINVAL; in nand_bbm_get_next_page()
246 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
247 * @chip: NAND chip object
252 static int nand_block_bad(struct nand_chip *chip, loff_t ofs) in nand_block_bad() argument
258 first_page = (int)(ofs >> chip->page_shift) & chip->pagemask; in nand_block_bad()
259 page_offset = nand_bbm_get_next_page(chip, 0); in nand_block_bad()
262 res = chip->ecc.read_oob(chip, first_page + page_offset); in nand_block_bad()
266 bad = chip->oob_poi[chip->badblockpos]; in nand_block_bad()
268 if (likely(chip->badblockbits == 8)) in nand_block_bad()
271 res = hweight8(bad) < chip->badblockbits; in nand_block_bad()
275 page_offset = nand_bbm_get_next_page(chip, page_offset + 1); in nand_block_bad()
282 * nand_region_is_secured() - Check if the region is secured
283 * @chip: NAND chip object
284 * @offset: Offset of the region to check
285 * @size: Size of the region to check
291 static bool nand_region_is_secured(struct nand_chip *chip, loff_t offset, u64 size) in nand_region_is_secured() argument
296 for (i = 0; i < chip->nr_secure_regions; i++) { in nand_region_is_secured()
297 const struct nand_secure_region *region = &chip->secure_regions[i]; in nand_region_is_secured()
299 if (offset + size <= region->offset || in nand_region_is_secured()
300 offset >= region->offset + region->size) in nand_region_is_secured()
303 pr_debug("%s: Region 0x%llx - 0x%llx is secured!", in nand_region_is_secured()
312 static int nand_isbad_bbm(struct nand_chip *chip, loff_t ofs) in nand_isbad_bbm() argument
314 struct mtd_info *mtd = nand_to_mtd(chip); in nand_isbad_bbm()
316 if (chip->options & NAND_NO_BBM_QUIRK) in nand_isbad_bbm()
320 if (nand_region_is_secured(chip, ofs, mtd->erasesize)) in nand_isbad_bbm()
321 return -EIO; in nand_isbad_bbm()
326 if (chip->legacy.block_bad) in nand_isbad_bbm()
327 return chip->legacy.block_bad(chip, ofs); in nand_isbad_bbm()
329 return nand_block_bad(chip, ofs); in nand_isbad_bbm()
333 * nand_get_device - [GENERIC] Get chip for selected access
334 * @chip: NAND chip structure
338 static void nand_get_device(struct nand_chip *chip) in nand_get_device() argument
342 mutex_lock(&chip->lock); in nand_get_device()
343 if (!chip->suspended) { in nand_get_device()
344 mutex_lock(&chip->controller->lock); in nand_get_device()
347 mutex_unlock(&chip->lock); in nand_get_device()
349 wait_event(chip->resume_wq, !chip->suspended); in nand_get_device()
354 * nand_check_wp - [GENERIC] check if the chip is write protected
355 * @chip: NAND chip object
360 static int nand_check_wp(struct nand_chip *chip) in nand_check_wp() argument
366 if (chip->options & NAND_BROKEN_XD) in nand_check_wp()
370 if (chip->controller->controller_wp) in nand_check_wp()
374 ret = nand_status_op(chip, &status); in nand_check_wp()
382 * nand_fill_oob - [INTERN] Transfer client buffer to oob
383 * @chip: NAND chip object
388 static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len, in nand_fill_oob() argument
391 struct mtd_info *mtd = nand_to_mtd(chip); in nand_fill_oob()
395 * Initialise to all 0xFF, to avoid the possibility of left over OOB in nand_fill_oob()
398 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_fill_oob()
400 switch (ops->mode) { in nand_fill_oob()
404 memcpy(chip->oob_poi + ops->ooboffs, oob, len); in nand_fill_oob()
408 ret = mtd_ooblayout_set_databytes(mtd, oob, chip->oob_poi, in nand_fill_oob()
409 ops->ooboffs, len); in nand_fill_oob()
420 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
421 * @chip: NAND chip object
422 * @to: offset to write to
425 * NAND write out-of-band.
427 static int nand_do_write_oob(struct nand_chip *chip, loff_t to, in nand_do_write_oob() argument
430 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_write_oob()
433 pr_debug("%s: to = 0x%08x, len = %i\n", in nand_do_write_oob()
434 __func__, (unsigned int)to, (int)ops->ooblen); in nand_do_write_oob()
439 if ((ops->ooboffs + ops->ooblen) > len) { in nand_do_write_oob()
440 pr_debug("%s: attempt to write past end of page\n", in nand_do_write_oob()
442 return -EINVAL; in nand_do_write_oob()
446 if (nand_region_is_secured(chip, to, ops->ooblen)) in nand_do_write_oob()
447 return -EIO; in nand_do_write_oob()
449 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_oob()
452 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one in nand_do_write_oob()
454 * if we don't do this. I have no clue why, but I seem to have 'fixed' in nand_do_write_oob()
457 ret = nand_reset(chip, chipnr); in nand_do_write_oob()
461 nand_select_target(chip, chipnr); in nand_do_write_oob()
463 /* Shift to get page */ in nand_do_write_oob()
464 page = (int)(to >> chip->page_shift); in nand_do_write_oob()
467 if (nand_check_wp(chip)) { in nand_do_write_oob()
468 nand_deselect_target(chip); in nand_do_write_oob()
469 return -EROFS; in nand_do_write_oob()
472 /* Invalidate the page cache, if we write to the cached page */ in nand_do_write_oob()
473 if (page == chip->pagecache.page) in nand_do_write_oob()
474 chip->pagecache.page = -1; in nand_do_write_oob()
476 nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops); in nand_do_write_oob()
478 if (ops->mode == MTD_OPS_RAW) in nand_do_write_oob()
479 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask); in nand_do_write_oob()
481 status = chip->ecc.write_oob(chip, page & chip->pagemask); in nand_do_write_oob()
483 nand_deselect_target(chip); in nand_do_write_oob()
488 ops->oobretlen = ops->ooblen; in nand_do_write_oob()
494 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
495 * @chip: NAND chip object
499 * specific driver. It provides the details for writing a bad block marker to a
502 static int nand_default_block_markbad(struct nand_chip *chip, loff_t ofs) in nand_default_block_markbad() argument
504 struct mtd_info *mtd = nand_to_mtd(chip); in nand_default_block_markbad()
511 ops.ooboffs = chip->badblockpos; in nand_default_block_markbad()
512 if (chip->options & NAND_BUSWIDTH_16) { in nand_default_block_markbad()
520 page_offset = nand_bbm_get_next_page(chip, 0); in nand_default_block_markbad()
523 res = nand_do_write_oob(chip, in nand_default_block_markbad()
524 ofs + (page_offset * mtd->writesize), in nand_default_block_markbad()
530 page_offset = nand_bbm_get_next_page(chip, page_offset + 1); in nand_default_block_markbad()
537 * nand_markbad_bbm - mark a block by updating the BBM
538 * @chip: NAND chip object
539 * @ofs: offset of the block to mark bad
541 int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs) in nand_markbad_bbm() argument
543 if (chip->legacy.block_markbad) in nand_markbad_bbm()
544 return chip->legacy.block_markbad(chip, ofs); in nand_markbad_bbm()
546 return nand_default_block_markbad(chip, ofs); in nand_markbad_bbm()
550 * nand_block_markbad_lowlevel - mark a block bad
551 * @chip: NAND chip object
555 * block table(s) and/or marker(s)). We only allow the hardware driver to
556 * specify how to write bad block markers to OOB (chip->legacy.block_markbad).
560 * (1) erase the affected block, to allow OOB marker to be written cleanly
561 * (2) write bad block marker to OOB area of affected block (unless flag
568 static int nand_block_markbad_lowlevel(struct nand_chip *chip, loff_t ofs) in nand_block_markbad_lowlevel() argument
570 struct mtd_info *mtd = nand_to_mtd(chip); in nand_block_markbad_lowlevel()
573 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { in nand_block_markbad_lowlevel()
579 einfo.len = 1ULL << chip->phys_erase_shift; in nand_block_markbad_lowlevel()
580 nand_erase_nand(chip, &einfo, 0); in nand_block_markbad_lowlevel()
582 /* Write bad block marker to OOB */ in nand_block_markbad_lowlevel()
583 nand_get_device(chip); in nand_block_markbad_lowlevel()
585 ret = nand_markbad_bbm(chip, ofs); in nand_block_markbad_lowlevel()
586 nand_release_device(chip); in nand_block_markbad_lowlevel()
590 if (chip->bbt) { in nand_block_markbad_lowlevel()
591 res = nand_markbad_bbt(chip, ofs); in nand_block_markbad_lowlevel()
597 mtd->ecc_stats.badblocks++; in nand_block_markbad_lowlevel()
603 * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
611 struct nand_chip *chip = mtd_to_nand(mtd); in nand_block_isreserved() local
613 if (!chip->bbt) in nand_block_isreserved()
616 return nand_isreserved_bbt(chip, ofs); in nand_block_isreserved()
620 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
621 * @chip: NAND chip object
623 * @allowbbt: 1, if its allowed to access the bbt area
628 static int nand_block_checkbad(struct nand_chip *chip, loff_t ofs, int allowbbt) in nand_block_checkbad() argument
631 if (chip->bbt) in nand_block_checkbad()
632 return nand_isbad_bbt(chip, ofs, allowbbt); in nand_block_checkbad()
634 return nand_isbad_bbm(chip, ofs); in nand_block_checkbad()
638 * nand_soft_waitrdy - Poll STATUS reg until RDY bit is set to 1
639 * @chip: NAND chip structure
642 * Poll the STATUS register using ->exec_op() until the RDY bit becomes 1.
643 * If that does not happen whitin the specified timeout, -ETIMEDOUT is
646 * This helper is intended to be used when the controller does not have access
647 * to the NAND R/B pin.
649 * Be aware that calling this helper from an ->exec_op() implementation means
650 * ->exec_op() must be re-entrant.
652 * Return 0 if the NAND chip is ready, a negative error otherwise.
654 int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms) in nand_soft_waitrdy() argument
660 if (!nand_has_exec_op(chip)) in nand_soft_waitrdy()
661 return -ENOTSUPP; in nand_soft_waitrdy()
664 conf = nand_get_interface_config(chip); in nand_soft_waitrdy()
667 ret = nand_status_op(chip, NULL); in nand_soft_waitrdy()
674 * small jiffy fraction - possibly leading to false timeout in nand_soft_waitrdy()
678 ret = nand_read_data_op(chip, &status, sizeof(status), true, in nand_soft_waitrdy()
695 * We have to exit READ_STATUS mode in order to read real data on the in nand_soft_waitrdy()
699 nand_exit_status_op(chip); in nand_soft_waitrdy()
704 return status & NAND_STATUS_READY ? 0 : -ETIMEDOUT; in nand_soft_waitrdy()
709 * nand_gpio_waitrdy - Poll R/B GPIO pin until ready
710 * @chip: NAND chip structure
715 * whitin the specified timeout, -ETIMEDOUT is returned.
717 * This helper is intended to be used when the controller has access to the
720 * Return 0 if the R/B pin indicates chip is ready, a negative error otherwise.
722 int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod, in nand_gpio_waitrdy() argument
727 * Wait until R/B pin indicates chip is ready or timeout occurs. in nand_gpio_waitrdy()
730 * small jiffy fraction - possibly leading to false timeout. in nand_gpio_waitrdy()
740 return gpiod_get_value_cansleep(gpiod) ? 0 : -ETIMEDOUT; in nand_gpio_waitrdy()
745 * panic_nand_wait - [GENERIC] wait until the command is done
746 * @chip: NAND chip structure
750 * we are in interrupt context. May happen when in panic and trying to write
753 void panic_nand_wait(struct nand_chip *chip, unsigned long timeo) in panic_nand_wait() argument
757 if (chip->legacy.dev_ready) { in panic_nand_wait()
758 if (chip->legacy.dev_ready(chip)) in panic_nand_wait()
764 ret = nand_read_data_op(chip, &status, sizeof(status), in panic_nand_wait()
776 static bool nand_supports_get_features(struct nand_chip *chip, int addr) in nand_supports_get_features() argument
778 return (chip->parameters.supports_set_get_features && in nand_supports_get_features()
779 test_bit(addr, chip->parameters.get_feature_list)); in nand_supports_get_features()
782 static bool nand_supports_set_features(struct nand_chip *chip, int addr) in nand_supports_set_features() argument
784 return (chip->parameters.supports_set_get_features && in nand_supports_set_features()
785 test_bit(addr, chip->parameters.set_feature_list)); in nand_supports_set_features()
789 * nand_reset_interface - Reset data interface and timings
790 * @chip: The NAND chip
793 * Reset the Data interface and timings to ONFI mode 0.
797 static int nand_reset_interface(struct nand_chip *chip, int chipnr) in nand_reset_interface() argument
799 const struct nand_controller_ops *ops = chip->controller->ops; in nand_reset_interface()
802 if (!nand_controller_can_setup_interface(chip)) in nand_reset_interface()
808 * To transition from NV-DDR or NV-DDR2 to the SDR data in nand_reset_interface()
811 * required to recognize Reset (FFh) command issued in SDR in nand_reset_interface()
816 * timings to timing mode 0. in nand_reset_interface()
819 chip->current_interface_config = nand_get_reset_interface_config(); in nand_reset_interface()
820 ret = ops->setup_interface(chip, chipnr, in nand_reset_interface()
821 chip->current_interface_config); in nand_reset_interface()
823 pr_err("Failed to configure data interface to SDR timing mode 0\n"); in nand_reset_interface()
829 * nand_setup_interface - Setup the best data interface and timings
830 * @chip: The NAND chip
833 * Configure what has been reported to be the best data interface and NAND
834 * timings supported by the chip and the driver.
838 static int nand_setup_interface(struct nand_chip *chip, int chipnr) in nand_setup_interface() argument
840 const struct nand_controller_ops *ops = chip->controller->ops; in nand_setup_interface()
844 if (!nand_controller_can_setup_interface(chip)) in nand_setup_interface()
848 * A nand_reset_interface() put both the NAND chip and the NAND in nand_setup_interface()
849 * controller in timings mode 0. If the default mode for this chip is in nand_setup_interface()
850 * also 0, no need to proceed to the change again. Plus, at probe time, in nand_setup_interface()
851 * nand_setup_interface() uses ->set/get_features() which would in nand_setup_interface()
854 if (!chip->best_interface_config) in nand_setup_interface()
857 request = chip->best_interface_config->timings.mode; in nand_setup_interface()
858 if (nand_interface_is_sdr(chip->best_interface_config)) in nand_setup_interface()
864 /* Change the mode on the chip side (if supported by the NAND chip) */ in nand_setup_interface()
865 if (nand_supports_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) { in nand_setup_interface()
866 nand_select_target(chip, chipnr); in nand_setup_interface()
867 ret = nand_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE, in nand_setup_interface()
869 nand_deselect_target(chip); in nand_setup_interface()
875 ret = ops->setup_interface(chip, chipnr, chip->best_interface_config); in nand_setup_interface()
879 /* Check the mode has been accepted by the chip, if supported */ in nand_setup_interface()
880 if (!nand_supports_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) in nand_setup_interface()
884 nand_select_target(chip, chipnr); in nand_setup_interface()
885 ret = nand_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE, in nand_setup_interface()
887 nand_deselect_target(chip); in nand_setup_interface()
892 pr_warn("%s timing mode %d not acknowledged by the NAND chip\n", in nand_setup_interface()
893 nand_interface_is_nvddr(chip->best_interface_config) ? "NV-DDR" : "SDR", in nand_setup_interface()
894 chip->best_interface_config->timings.mode); in nand_setup_interface()
895 pr_debug("NAND chip would work in %s timing mode %d\n", in nand_setup_interface()
896 tmode_param[0] & ONFI_DATA_INTERFACE_NVDDR ? "NV-DDR" : "SDR", in nand_setup_interface()
902 chip->current_interface_config = chip->best_interface_config; in nand_setup_interface()
908 * Fallback to mode 0 if the chip explicitly did not ack the chosen in nand_setup_interface()
911 nand_reset_interface(chip, chipnr); in nand_setup_interface()
912 nand_select_target(chip, chipnr); in nand_setup_interface()
913 nand_reset_op(chip); in nand_setup_interface()
914 nand_deselect_target(chip); in nand_setup_interface()
920 * nand_choose_best_sdr_timings - Pick up the best SDR timings that both the
921 * NAND controller and the NAND chip support
922 * @chip: the NAND chip
929 int nand_choose_best_sdr_timings(struct nand_chip *chip, in nand_choose_best_sdr_timings() argument
933 const struct nand_controller_ops *ops = chip->controller->ops; in nand_choose_best_sdr_timings()
934 int best_mode = 0, mode, ret = -EOPNOTSUPP; in nand_choose_best_sdr_timings()
936 iface->type = NAND_SDR_IFACE; in nand_choose_best_sdr_timings()
939 iface->timings.sdr = *spec_timings; in nand_choose_best_sdr_timings()
940 iface->timings.mode = onfi_find_closest_sdr_mode(spec_timings); in nand_choose_best_sdr_timings()
943 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_sdr_timings()
946 chip->best_interface_config = iface; in nand_choose_best_sdr_timings()
950 /* Fallback to slower modes */ in nand_choose_best_sdr_timings()
951 best_mode = iface->timings.mode; in nand_choose_best_sdr_timings()
952 } else if (chip->parameters.onfi) { in nand_choose_best_sdr_timings()
953 best_mode = fls(chip->parameters.onfi->sdr_timing_modes) - 1; in nand_choose_best_sdr_timings()
956 for (mode = best_mode; mode >= 0; mode--) { in nand_choose_best_sdr_timings()
957 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, mode); in nand_choose_best_sdr_timings()
959 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_sdr_timings()
962 chip->best_interface_config = iface; in nand_choose_best_sdr_timings()
971 * nand_choose_best_nvddr_timings - Pick up the best NVDDR timings that both the
972 * NAND controller and the NAND chip support
973 * @chip: the NAND chip
980 int nand_choose_best_nvddr_timings(struct nand_chip *chip, in nand_choose_best_nvddr_timings() argument
984 const struct nand_controller_ops *ops = chip->controller->ops; in nand_choose_best_nvddr_timings()
985 int best_mode = 0, mode, ret = -EOPNOTSUPP; in nand_choose_best_nvddr_timings()
987 iface->type = NAND_NVDDR_IFACE; in nand_choose_best_nvddr_timings()
990 iface->timings.nvddr = *spec_timings; in nand_choose_best_nvddr_timings()
991 iface->timings.mode = onfi_find_closest_nvddr_mode(spec_timings); in nand_choose_best_nvddr_timings()
994 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_nvddr_timings()
997 chip->best_interface_config = iface; in nand_choose_best_nvddr_timings()
1001 /* Fallback to slower modes */ in nand_choose_best_nvddr_timings()
1002 best_mode = iface->timings.mode; in nand_choose_best_nvddr_timings()
1003 } else if (chip->parameters.onfi) { in nand_choose_best_nvddr_timings()
1004 best_mode = fls(chip->parameters.onfi->nvddr_timing_modes) - 1; in nand_choose_best_nvddr_timings()
1007 for (mode = best_mode; mode >= 0; mode--) { in nand_choose_best_nvddr_timings()
1008 onfi_fill_interface_config(chip, iface, NAND_NVDDR_IFACE, mode); in nand_choose_best_nvddr_timings()
1010 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY, in nand_choose_best_nvddr_timings()
1013 chip->best_interface_config = iface; in nand_choose_best_nvddr_timings()
1022 * nand_choose_best_timings - Pick up the best NVDDR or SDR timings that both
1023 * NAND controller and the NAND chip support
1024 * @chip: the NAND chip
1030 static int nand_choose_best_timings(struct nand_chip *chip, in nand_choose_best_timings() argument
1035 /* Try the fastest timings: NV-DDR */ in nand_choose_best_timings()
1036 ret = nand_choose_best_nvddr_timings(chip, iface, NULL); in nand_choose_best_timings()
1040 /* Fallback to SDR timings otherwise */ in nand_choose_best_timings()
1041 return nand_choose_best_sdr_timings(chip, iface, NULL); in nand_choose_best_timings()
1045 * nand_choose_interface_config - find the best data interface and timings
1046 * @chip: The NAND chip
1048 * Find the best data interface and NAND timings supported by the chip
1052 * After this function nand_chip->interface_config is initialized with the best
1057 static int nand_choose_interface_config(struct nand_chip *chip) in nand_choose_interface_config() argument
1062 if (!nand_controller_can_setup_interface(chip)) in nand_choose_interface_config()
1067 return -ENOMEM; in nand_choose_interface_config()
1069 if (chip->ops.choose_interface_config) in nand_choose_interface_config()
1070 ret = chip->ops.choose_interface_config(chip, iface); in nand_choose_interface_config()
1072 ret = nand_choose_best_timings(chip, iface); in nand_choose_interface_config()
1081 * nand_fill_column_cycles - fill the column cycles of an address
1082 * @chip: The NAND chip
1083 * @addrs: Array of address cycles to fill
1089 * Returns the number of cycles needed to encode the column, or a negative
1092 static int nand_fill_column_cycles(struct nand_chip *chip, u8 *addrs, in nand_fill_column_cycles() argument
1095 struct mtd_info *mtd = nand_to_mtd(chip); in nand_fill_column_cycles()
1098 if (offset_in_page > mtd->writesize + mtd->oobsize) in nand_fill_column_cycles()
1099 return -EINVAL; in nand_fill_column_cycles()
1102 * On small page NANDs, there's a dedicated command to access the OOB in nand_fill_column_cycles()
1103 * area, and the column address is relative to the start of the OOB in nand_fill_column_cycles()
1106 if (mtd->writesize <= 512 && offset_in_page >= mtd->writesize) in nand_fill_column_cycles()
1107 offset_in_page -= mtd->writesize; in nand_fill_column_cycles()
1110 * The offset in page is expressed in bytes, if the NAND bus is 16-bit in nand_fill_column_cycles()
1113 if (chip->options & NAND_BUSWIDTH_16) { in nand_fill_column_cycles()
1115 return -EINVAL; in nand_fill_column_cycles()
1126 if (mtd->writesize <= 512) in nand_fill_column_cycles()
1134 static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page, in nand_sp_exec_read_page_op() argument
1139 nand_get_interface_config(chip); in nand_sp_exec_read_page_op()
1140 struct mtd_info *mtd = nand_to_mtd(chip); in nand_sp_exec_read_page_op()
1149 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_sp_exec_read_page_op()
1152 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_sp_exec_read_page_op()
1154 op.ninstrs--; in nand_sp_exec_read_page_op()
1156 if (offset_in_page >= mtd->writesize) in nand_sp_exec_read_page_op()
1159 !(chip->options & NAND_BUSWIDTH_16)) in nand_sp_exec_read_page_op()
1162 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_sp_exec_read_page_op()
1169 if (chip->options & NAND_ROW_ADDR_3) { in nand_sp_exec_read_page_op()
1174 return nand_exec_op(chip, &op); in nand_sp_exec_read_page_op()
1177 static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page, in nand_lp_exec_read_page_op() argument
1182 nand_get_interface_config(chip); in nand_lp_exec_read_page_op()
1192 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_lp_exec_read_page_op()
1195 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_lp_exec_read_page_op()
1197 op.ninstrs--; in nand_lp_exec_read_page_op()
1199 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_lp_exec_read_page_op()
1206 if (chip->options & NAND_ROW_ADDR_3) { in nand_lp_exec_read_page_op()
1211 return nand_exec_op(chip, &op); in nand_lp_exec_read_page_op()
1214 static void rawnand_cap_cont_reads(struct nand_chip *chip) in rawnand_cap_cont_reads() argument
1219 memorg = nanddev_get_memorg(&chip->base); in rawnand_cap_cont_reads()
1220 pages_per_lun = memorg->pages_per_eraseblock * memorg->eraseblocks_per_lun; in rawnand_cap_cont_reads()
1221 first_lun = chip->cont_read.first_page / pages_per_lun; in rawnand_cap_cont_reads()
1222 last_lun = chip->cont_read.last_page / pages_per_lun; in rawnand_cap_cont_reads()
1226 chip->cont_read.pause_page = first_lun * pages_per_lun + pages_per_lun - 1; in rawnand_cap_cont_reads()
1228 chip->cont_read.pause_page = chip->cont_read.last_page; in rawnand_cap_cont_reads()
1231 static int nand_lp_exec_cont_read_page_op(struct nand_chip *chip, unsigned int page, in nand_lp_exec_cont_read_page_op() argument
1236 nand_get_interface_config(chip); in nand_lp_exec_cont_read_page_op()
1249 NAND_OP_CMD(page == chip->cont_read.pause_page ? in nand_lp_exec_cont_read_page_op()
1256 struct nand_operation start_op = NAND_OPERATION(chip->cur_cs, start_instrs); in nand_lp_exec_cont_read_page_op()
1257 struct nand_operation cont_op = NAND_OPERATION(chip->cur_cs, cont_instrs); in nand_lp_exec_cont_read_page_op()
1261 start_op.ninstrs--; in nand_lp_exec_cont_read_page_op()
1262 cont_op.ninstrs--; in nand_lp_exec_cont_read_page_op()
1265 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_lp_exec_cont_read_page_op()
1272 if (chip->options & NAND_ROW_ADDR_3) { in nand_lp_exec_cont_read_page_op()
1279 if (nand_check_op(chip, &start_op) || nand_check_op(chip, &cont_op)) in nand_lp_exec_cont_read_page_op()
1280 return -EOPNOTSUPP; in nand_lp_exec_cont_read_page_op()
1285 if (page == chip->cont_read.first_page) in nand_lp_exec_cont_read_page_op()
1286 ret = nand_exec_op(chip, &start_op); in nand_lp_exec_cont_read_page_op()
1288 ret = nand_exec_op(chip, &cont_op); in nand_lp_exec_cont_read_page_op()
1292 if (!chip->cont_read.ongoing) in nand_lp_exec_cont_read_page_op()
1295 if (page == chip->cont_read.pause_page && in nand_lp_exec_cont_read_page_op()
1296 page != chip->cont_read.last_page) { in nand_lp_exec_cont_read_page_op()
1297 chip->cont_read.first_page = chip->cont_read.pause_page + 1; in nand_lp_exec_cont_read_page_op()
1298 rawnand_cap_cont_reads(chip); in nand_lp_exec_cont_read_page_op()
1299 } else if (page == chip->cont_read.last_page) { in nand_lp_exec_cont_read_page_op()
1300 chip->cont_read.ongoing = false; in nand_lp_exec_cont_read_page_op()
1306 static bool rawnand_cont_read_ongoing(struct nand_chip *chip, unsigned int page) in rawnand_cont_read_ongoing() argument
1308 return chip->cont_read.ongoing && page >= chip->cont_read.first_page; in rawnand_cont_read_ongoing()
1312 * nand_read_page_op - Do a READ PAGE operation
1313 * @chip: The NAND chip
1314 * @page: page to read
1316 * @buf: buffer used to store the data
1324 int nand_read_page_op(struct nand_chip *chip, unsigned int page, in nand_read_page_op() argument
1327 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_op()
1330 return -EINVAL; in nand_read_page_op()
1332 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_read_page_op()
1333 return -EINVAL; in nand_read_page_op()
1335 if (nand_has_exec_op(chip)) { in nand_read_page_op()
1336 if (mtd->writesize > 512) { in nand_read_page_op()
1337 if (rawnand_cont_read_ongoing(chip, page)) in nand_read_page_op()
1338 return nand_lp_exec_cont_read_page_op(chip, page, in nand_read_page_op()
1342 return nand_lp_exec_read_page_op(chip, page, in nand_read_page_op()
1347 return nand_sp_exec_read_page_op(chip, page, offset_in_page, in nand_read_page_op()
1351 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page); in nand_read_page_op()
1353 chip->legacy.read_buf(chip, buf, len); in nand_read_page_op()
1360 * nand_read_param_page_op - Do a READ PARAMETER PAGE operation
1361 * @chip: The NAND chip
1362 * @page: parameter page to read
1363 * @buf: buffer used to store the data
1371 int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf, in nand_read_param_page_op() argument
1378 return -EINVAL; in nand_read_param_page_op()
1380 if (nand_has_exec_op(chip)) { in nand_read_param_page_op()
1382 nand_get_interface_config(chip); in nand_read_param_page_op()
1391 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_param_page_op()
1393 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_read_param_page_op()
1395 op.ninstrs--; in nand_read_param_page_op()
1397 return nand_exec_op(chip, &op); in nand_read_param_page_op()
1400 chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1); in nand_read_param_page_op()
1402 p[i] = chip->legacy.read_byte(chip); in nand_read_param_page_op()
1408 * nand_change_read_column_op - Do a CHANGE READ COLUMN operation
1409 * @chip: The NAND chip
1411 * @buf: buffer used to store the data
1413 * @force_8bit: force 8-bit bus access
1420 int nand_change_read_column_op(struct nand_chip *chip, in nand_change_read_column_op() argument
1424 struct mtd_info *mtd = nand_to_mtd(chip); in nand_change_read_column_op()
1427 return -EINVAL; in nand_change_read_column_op()
1429 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_change_read_column_op()
1430 return -EINVAL; in nand_change_read_column_op()
1433 if (mtd->writesize <= 512) in nand_change_read_column_op()
1434 return -ENOTSUPP; in nand_change_read_column_op()
1436 if (nand_has_exec_op(chip)) { in nand_change_read_column_op()
1438 nand_get_interface_config(chip); in nand_change_read_column_op()
1447 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_change_read_column_op()
1450 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_change_read_column_op()
1454 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_change_read_column_op()
1456 op.ninstrs--; in nand_change_read_column_op()
1460 return nand_exec_op(chip, &op); in nand_change_read_column_op()
1463 chip->legacy.cmdfunc(chip, NAND_CMD_RNDOUT, offset_in_page, -1); in nand_change_read_column_op()
1465 chip->legacy.read_buf(chip, buf, len); in nand_change_read_column_op()
1472 * nand_read_oob_op - Do a READ OOB operation
1473 * @chip: The NAND chip
1474 * @page: page to read
1476 * @buf: buffer used to store the data
1484 int nand_read_oob_op(struct nand_chip *chip, unsigned int page, in nand_read_oob_op() argument
1487 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_oob_op()
1490 return -EINVAL; in nand_read_oob_op()
1492 if (offset_in_oob + len > mtd->oobsize) in nand_read_oob_op()
1493 return -EINVAL; in nand_read_oob_op()
1495 if (nand_has_exec_op(chip)) in nand_read_oob_op()
1496 return nand_read_page_op(chip, page, in nand_read_oob_op()
1497 mtd->writesize + offset_in_oob, in nand_read_oob_op()
1500 chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page); in nand_read_oob_op()
1502 chip->legacy.read_buf(chip, buf, len); in nand_read_oob_op()
1508 static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page, in nand_exec_prog_page_op() argument
1513 nand_get_interface_config(chip); in nand_exec_prog_page_op()
1514 struct mtd_info *mtd = nand_to_mtd(chip); in nand_exec_prog_page_op()
1530 struct nand_operation op = NAND_DESTRUCTIVE_OPERATION(chip->cur_cs, in nand_exec_prog_page_op()
1532 int naddrs = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_exec_prog_page_op()
1539 if (chip->options & NAND_ROW_ADDR_3) in nand_exec_prog_page_op()
1546 op.ninstrs -= 2; in nand_exec_prog_page_op()
1549 op.ninstrs--; in nand_exec_prog_page_op()
1552 if (mtd->writesize <= 512) { in nand_exec_prog_page_op()
1554 * Small pages need some more tweaking: we have to adjust the in nand_exec_prog_page_op()
1556 * to access. in nand_exec_prog_page_op()
1558 if (offset_in_page >= mtd->writesize) in nand_exec_prog_page_op()
1561 !(chip->options & NAND_BUSWIDTH_16)) in nand_exec_prog_page_op()
1569 op.ninstrs--; in nand_exec_prog_page_op()
1572 return nand_exec_op(chip, &op); in nand_exec_prog_page_op()
1576 * nand_prog_page_begin_op - starts a PROG PAGE operation
1577 * @chip: The NAND chip
1578 * @page: page to write
1580 * @buf: buffer containing the data to write to the page
1588 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page, in nand_prog_page_begin_op() argument
1592 struct mtd_info *mtd = nand_to_mtd(chip); in nand_prog_page_begin_op()
1595 return -EINVAL; in nand_prog_page_begin_op()
1597 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_prog_page_begin_op()
1598 return -EINVAL; in nand_prog_page_begin_op()
1600 if (nand_has_exec_op(chip)) in nand_prog_page_begin_op()
1601 return nand_exec_prog_page_op(chip, page, offset_in_page, buf, in nand_prog_page_begin_op()
1604 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page); in nand_prog_page_begin_op()
1607 chip->legacy.write_buf(chip, buf, len); in nand_prog_page_begin_op()
1614 * nand_prog_page_end_op - ends a PROG PAGE operation
1615 * @chip: The NAND chip
1622 int nand_prog_page_end_op(struct nand_chip *chip) in nand_prog_page_end_op() argument
1627 if (nand_has_exec_op(chip)) { in nand_prog_page_end_op()
1629 nand_get_interface_config(chip); in nand_prog_page_end_op()
1636 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_prog_page_end_op()
1638 ret = nand_exec_op(chip, &op); in nand_prog_page_end_op()
1642 ret = nand_status_op(chip, &status); in nand_prog_page_end_op()
1646 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1); in nand_prog_page_end_op()
1647 ret = chip->legacy.waitfunc(chip); in nand_prog_page_end_op()
1655 return -EIO; in nand_prog_page_end_op()
1662 * nand_prog_page_op - Do a full PROG PAGE operation
1663 * @chip: The NAND chip
1664 * @page: page to write
1666 * @buf: buffer containing the data to write to the page
1674 int nand_prog_page_op(struct nand_chip *chip, unsigned int page, in nand_prog_page_op() argument
1678 struct mtd_info *mtd = nand_to_mtd(chip); in nand_prog_page_op()
1683 return -EINVAL; in nand_prog_page_op()
1685 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_prog_page_op()
1686 return -EINVAL; in nand_prog_page_op()
1688 if (nand_has_exec_op(chip)) { in nand_prog_page_op()
1689 ret = nand_exec_prog_page_op(chip, page, offset_in_page, buf, in nand_prog_page_op()
1694 ret = nand_status_op(chip, &status); in nand_prog_page_op()
1698 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, in nand_prog_page_op()
1700 chip->legacy.write_buf(chip, buf, len); in nand_prog_page_op()
1701 chip->legacy.cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1); in nand_prog_page_op()
1702 ret = chip->legacy.waitfunc(chip); in nand_prog_page_op()
1710 return -EIO; in nand_prog_page_op()
1717 * nand_change_write_column_op - Do a CHANGE WRITE COLUMN operation
1718 * @chip: The NAND chip
1720 * @buf: buffer containing the data to send to the NAND
1722 * @force_8bit: force 8-bit bus access
1729 int nand_change_write_column_op(struct nand_chip *chip, in nand_change_write_column_op() argument
1734 struct mtd_info *mtd = nand_to_mtd(chip); in nand_change_write_column_op()
1737 return -EINVAL; in nand_change_write_column_op()
1739 if (offset_in_page + len > mtd->writesize + mtd->oobsize) in nand_change_write_column_op()
1740 return -EINVAL; in nand_change_write_column_op()
1743 if (mtd->writesize <= 512) in nand_change_write_column_op()
1744 return -ENOTSUPP; in nand_change_write_column_op()
1746 if (nand_has_exec_op(chip)) { in nand_change_write_column_op()
1748 nand_get_interface_config(chip); in nand_change_write_column_op()
1755 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_change_write_column_op()
1758 ret = nand_fill_column_cycles(chip, addrs, offset_in_page); in nand_change_write_column_op()
1764 /* Drop the DATA_OUT instruction if len is set to 0. */ in nand_change_write_column_op()
1766 op.ninstrs--; in nand_change_write_column_op()
1768 return nand_exec_op(chip, &op); in nand_change_write_column_op()
1771 chip->legacy.cmdfunc(chip, NAND_CMD_RNDIN, offset_in_page, -1); in nand_change_write_column_op()
1773 chip->legacy.write_buf(chip, buf, len); in nand_change_write_column_op()
1780 * nand_readid_op - Do a READID operation
1781 * @chip: The NAND chip
1782 * @addr: address cycle to pass after the READID command
1783 * @buf: buffer used to store the ID
1792 int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf, in nand_readid_op() argument
1799 return -EINVAL; in nand_readid_op()
1801 if (nand_has_exec_op(chip)) { in nand_readid_op()
1803 nand_get_interface_config(chip); in nand_readid_op()
1810 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_readid_op()
1813 /* READ_ID data bytes are received twice in NV-DDR mode */ in nand_readid_op()
1817 return -ENOMEM; in nand_readid_op()
1823 /* Drop the DATA_IN instruction if len is set to 0. */ in nand_readid_op()
1825 op.ninstrs--; in nand_readid_op()
1827 ret = nand_exec_op(chip, &op); in nand_readid_op()
1838 chip->legacy.cmdfunc(chip, NAND_CMD_READID, addr, -1); in nand_readid_op()
1841 id[i] = chip->legacy.read_byte(chip); in nand_readid_op()
1848 * nand_status_op - Do a STATUS operation
1849 * @chip: The NAND chip
1850 * @status: out variable to store the NAND status
1858 int nand_status_op(struct nand_chip *chip, u8 *status) in nand_status_op() argument
1860 if (nand_has_exec_op(chip)) { in nand_status_op()
1862 nand_get_interface_config(chip); in nand_status_op()
1869 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_status_op()
1872 /* The status data byte will be received twice in NV-DDR mode */ in nand_status_op()
1879 op.ninstrs--; in nand_status_op()
1881 ret = nand_exec_op(chip, &op); in nand_status_op()
1888 chip->legacy.cmdfunc(chip, NAND_CMD_STATUS, -1, -1); in nand_status_op()
1890 *status = chip->legacy.read_byte(chip); in nand_status_op()
1897 * nand_exit_status_op - Exit a STATUS operation
1898 * @chip: The NAND chip
1900 * This function sends a READ0 command to cancel the effect of the STATUS
1901 * command to avoid reading only the status until a new read command is sent.
1907 int nand_exit_status_op(struct nand_chip *chip) in nand_exit_status_op() argument
1909 if (nand_has_exec_op(chip)) { in nand_exit_status_op()
1913 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_exit_status_op()
1915 return nand_exec_op(chip, &op); in nand_exit_status_op()
1918 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, -1, -1); in nand_exit_status_op()
1925 * nand_erase_op - Do an erase operation
1926 * @chip: The NAND chip
1927 * @eraseblock: block to erase
1929 * This function sends an ERASE command and waits for the NAND to be ready
1935 int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock) in nand_erase_op() argument
1938 (chip->phys_erase_shift - chip->page_shift); in nand_erase_op()
1942 if (nand_has_exec_op(chip)) { in nand_erase_op()
1944 nand_get_interface_config(chip); in nand_erase_op()
1954 struct nand_operation op = NAND_DESTRUCTIVE_OPERATION(chip->cur_cs, in nand_erase_op()
1957 if (chip->options & NAND_ROW_ADDR_3) in nand_erase_op()
1960 ret = nand_exec_op(chip, &op); in nand_erase_op()
1964 ret = nand_status_op(chip, &status); in nand_erase_op()
1968 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page); in nand_erase_op()
1969 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE2, -1, -1); in nand_erase_op()
1971 ret = chip->legacy.waitfunc(chip); in nand_erase_op()
1979 return -EIO; in nand_erase_op()
1986 * nand_set_features_op - Do a SET FEATURES operation
1987 * @chip: The NAND chip
1991 * This function sends a SET FEATURES command and waits for the NAND to be
1997 static int nand_set_features_op(struct nand_chip *chip, u8 feature, in nand_set_features_op() argument
2003 if (nand_has_exec_op(chip)) { in nand_set_features_op()
2005 nand_get_interface_config(chip); in nand_set_features_op()
2016 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_set_features_op()
2018 return nand_exec_op(chip, &op); in nand_set_features_op()
2021 chip->legacy.cmdfunc(chip, NAND_CMD_SET_FEATURES, feature, -1); in nand_set_features_op()
2023 chip->legacy.write_byte(chip, params[i]); in nand_set_features_op()
2025 ret = chip->legacy.waitfunc(chip); in nand_set_features_op()
2030 return -EIO; in nand_set_features_op()
2036 * nand_get_features_op - Do a GET FEATURES operation
2037 * @chip: The NAND chip
2041 * This function sends a GET FEATURES command and waits for the NAND to be
2047 static int nand_get_features_op(struct nand_chip *chip, u8 feature, in nand_get_features_op() argument
2053 if (nand_has_exec_op(chip)) { in nand_get_features_op()
2055 nand_get_interface_config(chip); in nand_get_features_op()
2065 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_get_features_op()
2068 /* GET_FEATURE data bytes are received twice in NV-DDR mode */ in nand_get_features_op()
2074 ret = nand_exec_op(chip, &op); in nand_get_features_op()
2083 chip->legacy.cmdfunc(chip, NAND_CMD_GET_FEATURES, feature, -1); in nand_get_features_op()
2085 params[i] = chip->legacy.read_byte(chip); in nand_get_features_op()
2090 static int nand_wait_rdy_op(struct nand_chip *chip, unsigned int timeout_ms, in nand_wait_rdy_op() argument
2093 if (nand_has_exec_op(chip)) { in nand_wait_rdy_op()
2098 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_wait_rdy_op()
2100 return nand_exec_op(chip, &op); in nand_wait_rdy_op()
2104 if (!chip->legacy.dev_ready) in nand_wait_rdy_op()
2105 udelay(chip->legacy.chip_delay); in nand_wait_rdy_op()
2107 nand_wait_ready(chip); in nand_wait_rdy_op()
2113 * nand_reset_op - Do a reset operation
2114 * @chip: The NAND chip
2116 * This function sends a RESET command and waits for the NAND to be ready
2122 int nand_reset_op(struct nand_chip *chip) in nand_reset_op() argument
2124 if (nand_has_exec_op(chip)) { in nand_reset_op()
2126 nand_get_interface_config(chip); in nand_reset_op()
2133 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_reset_op()
2135 return nand_exec_op(chip, &op); in nand_reset_op()
2138 chip->legacy.cmdfunc(chip, NAND_CMD_RESET, -1, -1); in nand_reset_op()
2145 * nand_read_data_op - Read data from the NAND
2146 * @chip: The NAND chip
2147 * @buf: buffer used to store the data
2149 * @force_8bit: force 8-bit bus access
2159 int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len, in nand_read_data_op() argument
2163 return -EINVAL; in nand_read_data_op()
2165 if (nand_has_exec_op(chip)) { in nand_read_data_op()
2167 nand_get_interface_config(chip); in nand_read_data_op()
2171 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_data_op()
2181 * case NV-DDR timings are being used the data will be received in nand_read_data_op()
2187 return -ENOMEM; in nand_read_data_op()
2194 ret = nand_check_op(chip, &op); in nand_read_data_op()
2199 ret = nand_exec_op(chip, &op); in nand_read_data_op()
2220 p[i] = chip->legacy.read_byte(chip); in nand_read_data_op()
2222 chip->legacy.read_buf(chip, buf, len); in nand_read_data_op()
2230 * nand_write_data_op - Write data from the NAND
2231 * @chip: The NAND chip
2232 * @buf: buffer containing the data to send on the bus
2234 * @force_8bit: force 8-bit bus access
2242 int nand_write_data_op(struct nand_chip *chip, const void *buf, in nand_write_data_op() argument
2246 return -EINVAL; in nand_write_data_op()
2248 if (nand_has_exec_op(chip)) { in nand_write_data_op()
2252 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_write_data_op()
2256 return nand_exec_op(chip, &op); in nand_write_data_op()
2264 chip->legacy.write_byte(chip, p[i]); in nand_write_data_op()
2266 chip->legacy.write_buf(chip, buf, len); in nand_write_data_op()
2274 * struct nand_op_parser_ctx - Context used by the parser
2277 * @subop: Sub-operation to be passed to the NAND controller
2279 * This structure is used by the core to split NAND operations into
2280 * sub-operations that can be handled by the NAND controller.
2289 * nand_op_parser_must_split_instr - Checks if an instruction must be split
2291 * @instr: pointer to the instruction to check
2293 * split, then @start_offset is the offset from which to start
2296 * split), this parameter is updated to point to the first
2302 * controller-operation into two or more chunks.
2305 * The @start_offset parameter is also updated to the offset at which the next
2313 switch (pat->type) { in nand_op_parser_must_split_instr()
2315 if (!pat->ctx.addr.maxcycles) in nand_op_parser_must_split_instr()
2318 if (instr->ctx.addr.naddrs - *start_offset > in nand_op_parser_must_split_instr()
2319 pat->ctx.addr.maxcycles) { in nand_op_parser_must_split_instr()
2320 *start_offset += pat->ctx.addr.maxcycles; in nand_op_parser_must_split_instr()
2327 if (!pat->ctx.data.maxlen) in nand_op_parser_must_split_instr()
2330 if (instr->ctx.data.len - *start_offset > in nand_op_parser_must_split_instr()
2331 pat->ctx.data.maxlen) { in nand_op_parser_must_split_instr()
2332 *start_offset += pat->ctx.data.maxlen; in nand_op_parser_must_split_instr()
2345 * nand_op_parser_match_pat - Checks if a pattern matches the instructions
2347 * @pat: the pattern to test
2348 * @ctx: the parser context structure to match with the pattern @pat
2350 * Check if @pat matches the set or a sub-set of instructions remaining in @ctx.
2352 * @ctx->subop is updated with the set of instructions to be passed to the
2359 unsigned int instr_offset = ctx->subop.first_instr_start_off; in nand_op_parser_match_pat()
2360 const struct nand_op_instr *end = ctx->instrs + ctx->ninstrs; in nand_op_parser_match_pat()
2361 const struct nand_op_instr *instr = ctx->subop.instrs; in nand_op_parser_match_pat()
2364 for (i = 0, ninstrs = 0; i < pat->nelems && instr < end; i++) { in nand_op_parser_match_pat()
2369 * to the next one. If the element is mandatory, there's no in nand_op_parser_match_pat()
2372 if (instr->type != pat->elems[i].type) { in nand_op_parser_match_pat()
2373 if (!pat->elems[i].optional) in nand_op_parser_match_pat()
2381 * not able to handle the whole instruction in a single step, in nand_op_parser_match_pat()
2382 * we have to split it. in nand_op_parser_match_pat()
2383 * The last_instr_end_off value comes back updated to point to in nand_op_parser_match_pat()
2384 * the position where we have to split the instruction (the in nand_op_parser_match_pat()
2387 if (nand_op_parser_must_split_instr(&pat->elems[i], instr, in nand_op_parser_match_pat()
2410 * than the instructions we're asked to execute. We need to make sure in nand_op_parser_match_pat()
2413 for (; i < pat->nelems; i++) { in nand_op_parser_match_pat()
2414 if (!pat->elems[i].optional) in nand_op_parser_match_pat()
2422 ctx->subop.ninstrs = ninstrs; in nand_op_parser_match_pat()
2423 ctx->subop.last_instr_end_off = instr_offset; in nand_op_parser_match_pat()
2435 pr_debug("executing subop (CS%d):\n", ctx->subop.cs); in nand_op_parser_trace()
2437 for (i = 0; i < ctx->ninstrs; i++) { in nand_op_parser_trace()
2438 instr = &ctx->instrs[i]; in nand_op_parser_trace()
2440 if (instr == &ctx->subop.instrs[0]) in nand_op_parser_trace()
2441 prefix = " ->"; in nand_op_parser_trace()
2445 if (instr == &ctx->subop.instrs[ctx->subop.ninstrs - 1]) in nand_op_parser_trace()
2459 if (a->subop.ninstrs < b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2460 return -1; in nand_op_parser_cmp_ctx()
2461 else if (a->subop.ninstrs > b->subop.ninstrs) in nand_op_parser_cmp_ctx()
2464 if (a->subop.last_instr_end_off < b->subop.last_instr_end_off) in nand_op_parser_cmp_ctx()
2465 return -1; in nand_op_parser_cmp_ctx()
2466 else if (a->subop.last_instr_end_off > b->subop.last_instr_end_off) in nand_op_parser_cmp_ctx()
2473 * nand_op_parser_exec_op - exec_op parser
2474 * @chip: the NAND chip
2476 * @op: the NAND operation to address
2480 * Helper function designed to ease integration of NAND controller drivers that
2483 * multiple sub-operations (if required) and pass them back to the ->exec()
2484 * callback of the matching pattern if @check_only is set to false.
2486 * NAND controller drivers should call this function from their own ->exec_op()
2491 * to handle the requested operation), or an error returned by one of the
2492 * matching pattern->exec() hook.
2494 int nand_op_parser_exec_op(struct nand_chip *chip, in nand_op_parser_exec_op() argument
2499 .subop.cs = op->cs, in nand_op_parser_exec_op()
2500 .subop.instrs = op->instrs, in nand_op_parser_exec_op()
2501 .instrs = op->instrs, in nand_op_parser_exec_op()
2502 .ninstrs = op->ninstrs, in nand_op_parser_exec_op()
2506 while (ctx.subop.instrs < op->instrs + op->ninstrs) { in nand_op_parser_exec_op()
2509 int ret, best_pattern = -1; in nand_op_parser_exec_op()
2511 for (i = 0; i < parser->npatterns; i++) { in nand_op_parser_exec_op()
2514 pattern = &parser->patterns[i]; in nand_op_parser_exec_op()
2527 pr_debug("->exec_op() parser: pattern not found!\n"); in nand_op_parser_exec_op()
2528 return -ENOTSUPP; in nand_op_parser_exec_op()
2535 pattern = &parser->patterns[best_pattern]; in nand_op_parser_exec_op()
2536 ret = pattern->exec(chip, &ctx.subop); in nand_op_parser_exec_op()
2542 * Update the context structure by pointing to the start of the in nand_op_parser_exec_op()
2547 ctx.subop.instrs -= 1; in nand_op_parser_exec_op()
2558 return instr && (instr->type == NAND_OP_DATA_IN_INSTR || in nand_instr_is_data()
2559 instr->type == NAND_OP_DATA_OUT_INSTR); in nand_instr_is_data()
2565 return subop && instr_idx < subop->ninstrs; in nand_subop_instr_is_valid()
2574 return subop->first_instr_start_off; in nand_subop_get_start_off()
2578 * nand_subop_get_addr_start_off - Get the start offset in an address array
2579 * @subop: The entire sub-operation
2580 * @instr_idx: Index of the instruction inside the sub-operation
2582 * During driver development, one could be tempted to directly use the
2583 * ->addr.addrs field of address instructions. This is wrong as address
2586 * Given an address instruction, returns the offset of the first cycle to issue.
2592 subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) in nand_subop_get_addr_start_off()
2600 * nand_subop_get_num_addr_cyc - Get the remaining address cycles to assert
2601 * @subop: The entire sub-operation
2602 * @instr_idx: Index of the instruction inside the sub-operation
2604 * During driver development, one could be tempted to directly use the
2605 * ->addr->naddrs field of a data instruction. This is wrong as instructions
2608 * Given an address instruction, returns the number of address cycle to issue.
2616 subop->instrs[instr_idx].type != NAND_OP_ADDR_INSTR)) in nand_subop_get_num_addr_cyc()
2621 if (instr_idx == subop->ninstrs - 1 && in nand_subop_get_num_addr_cyc()
2622 subop->last_instr_end_off) in nand_subop_get_num_addr_cyc()
2623 end_off = subop->last_instr_end_off; in nand_subop_get_num_addr_cyc()
2625 end_off = subop->instrs[instr_idx].ctx.addr.naddrs; in nand_subop_get_num_addr_cyc()
2627 return end_off - start_off; in nand_subop_get_num_addr_cyc()
2632 * nand_subop_get_data_start_off - Get the start offset in a data array
2633 * @subop: The entire sub-operation
2634 * @instr_idx: Index of the instruction inside the sub-operation
2636 * During driver development, one could be tempted to directly use the
2637 * ->data->buf.{in,out} field of data instructions. This is wrong as data
2640 * Given a data instruction, returns the offset to start from.
2646 !nand_instr_is_data(&subop->instrs[instr_idx]))) in nand_subop_get_data_start_off()
2654 * nand_subop_get_data_len - Get the number of bytes to retrieve
2655 * @subop: The entire sub-operation
2656 * @instr_idx: Index of the instruction inside the sub-operation
2658 * During driver development, one could be tempted to directly use the
2659 * ->data->len field of a data instruction. This is wrong as data instructions
2662 * Returns the length of the chunk of data to send/receive.
2670 !nand_instr_is_data(&subop->instrs[instr_idx]))) in nand_subop_get_data_len()
2675 if (instr_idx == subop->ninstrs - 1 && in nand_subop_get_data_len()
2676 subop->last_instr_end_off) in nand_subop_get_data_len()
2677 end_off = subop->last_instr_end_off; in nand_subop_get_data_len()
2679 end_off = subop->instrs[instr_idx].ctx.data.len; in nand_subop_get_data_len()
2681 return end_off - start_off; in nand_subop_get_data_len()
2686 * nand_reset - Reset and initialize a NAND device
2687 * @chip: The NAND chip
2696 int nand_reset(struct nand_chip *chip, int chipnr) in nand_reset() argument
2700 ret = nand_reset_interface(chip, chipnr); in nand_reset()
2705 * The CS line has to be released before we can apply the new NAND in nand_reset()
2709 nand_select_target(chip, chipnr); in nand_reset()
2710 ret = nand_reset_op(chip); in nand_reset()
2711 nand_deselect_target(chip); in nand_reset()
2715 ret = nand_setup_interface(chip, chipnr); in nand_reset()
2724 * nand_get_features - wrapper to perform a GET_FEATURE
2725 * @chip: NAND chip info structure
2729 * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2732 int nand_get_features(struct nand_chip *chip, int addr, in nand_get_features() argument
2735 if (!nand_supports_get_features(chip, addr)) in nand_get_features()
2736 return -ENOTSUPP; in nand_get_features()
2738 if (chip->legacy.get_features) in nand_get_features()
2739 return chip->legacy.get_features(chip, addr, subfeature_param); in nand_get_features()
2741 return nand_get_features_op(chip, addr, subfeature_param); in nand_get_features()
2745 * nand_set_features - wrapper to perform a SET_FEATURE
2746 * @chip: NAND chip info structure
2750 * Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if the
2753 int nand_set_features(struct nand_chip *chip, int addr, in nand_set_features() argument
2756 if (!nand_supports_set_features(chip, addr)) in nand_set_features()
2757 return -ENOTSUPP; in nand_set_features()
2759 if (chip->legacy.set_features) in nand_set_features()
2760 return chip->legacy.set_features(chip, addr, subfeature_param); in nand_set_features()
2762 return nand_set_features_op(chip, addr, subfeature_param); in nand_set_features()
2766 * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
2767 * @buf: buffer to test
2772 * has been erased and is ready to be programmed.
2780 * Returns a positive number of bitflips less than or equal to
2781 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2791 len--, bitmap++) { in nand_check_erased_buf()
2793 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
2795 return -EBADMSG; in nand_check_erased_buf()
2799 len -= sizeof(long), bitmap += sizeof(long)) { in nand_check_erased_buf()
2804 bitflips += BITS_PER_LONG - weight; in nand_check_erased_buf()
2806 return -EBADMSG; in nand_check_erased_buf()
2809 for (; len > 0; len--, bitmap++) { in nand_check_erased_buf()
2811 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
2813 return -EBADMSG; in nand_check_erased_buf()
2820 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
2822 * @data: data buffer to test
2832 * ready to be programmed.
2837 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
2840 * expect you to return the maximum number of bitflips for the whole page.
2846 * have programmed almost all bits to 1 but a few. In this case, we
2851 * It could also be used if you support subpages and want to attach some
2852 * extra OOB data to an ECC chunk.
2854 * Returns a positive number of bitflips less than or equal to
2855 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
2870 bitflips_threshold -= data_bitflips; in nand_check_erased_ecc_chunk()
2876 bitflips_threshold -= ecc_bitflips; in nand_check_erased_ecc_chunk()
2897 * nand_read_page_raw_notsupp - dummy read raw page function
2898 * @chip: nand chip info structure
2899 * @buf: buffer to store read data
2900 * @oob_required: caller requires OOB data read to chip->oob_poi
2901 * @page: page number to read
2903 * Returns -ENOTSUPP unconditionally.
2905 int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf, in nand_read_page_raw_notsupp() argument
2908 return -ENOTSUPP; in nand_read_page_raw_notsupp()
2912 * nand_read_page_raw - [INTERN] read raw page data without ecc
2913 * @chip: nand chip info structure
2914 * @buf: buffer to store read data
2915 * @oob_required: caller requires OOB data read to chip->oob_poi
2916 * @page: page number to read
2920 int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required, in nand_read_page_raw() argument
2923 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_raw()
2926 ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize); in nand_read_page_raw()
2931 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, in nand_read_page_raw()
2942 * nand_monolithic_read_page_raw - Monolithic page read in raw mode
2943 * @chip: NAND chip info structure
2944 * @buf: buffer to store read data
2945 * @oob_required: caller requires OOB data read to chip->oob_poi
2946 * @page: page number to read
2950 * eventually OOB) to be loaded in the NAND cache and sent over the
2951 * bus (from the NAND chip to the NAND controller) in a single
2952 * operation. This is an alternative to nand_read_page_raw(), which
2956 int nand_monolithic_read_page_raw(struct nand_chip *chip, u8 *buf, in nand_monolithic_read_page_raw() argument
2959 struct mtd_info *mtd = nand_to_mtd(chip); in nand_monolithic_read_page_raw()
2960 unsigned int size = mtd->writesize; in nand_monolithic_read_page_raw()
2965 size += mtd->oobsize; in nand_monolithic_read_page_raw()
2967 if (buf != chip->data_buf) in nand_monolithic_read_page_raw()
2968 read_buf = nand_get_data_buf(chip); in nand_monolithic_read_page_raw()
2971 ret = nand_read_page_op(chip, page, 0, read_buf, size); in nand_monolithic_read_page_raw()
2975 if (buf != chip->data_buf) in nand_monolithic_read_page_raw()
2976 memcpy(buf, read_buf, mtd->writesize); in nand_monolithic_read_page_raw()
2983 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2984 * @chip: nand chip info structure
2985 * @buf: buffer to store read data
2986 * @oob_required: caller requires OOB data read to chip->oob_poi
2987 * @page: page number to read
2991 static int nand_read_page_raw_syndrome(struct nand_chip *chip, uint8_t *buf, in nand_read_page_raw_syndrome() argument
2994 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_raw_syndrome()
2995 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
2996 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
2997 uint8_t *oob = chip->oob_poi; in nand_read_page_raw_syndrome()
3000 ret = nand_read_page_op(chip, page, 0, NULL, 0); in nand_read_page_raw_syndrome()
3004 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
3005 ret = nand_read_data_op(chip, buf, eccsize, false, false); in nand_read_page_raw_syndrome()
3011 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
3012 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_raw_syndrome()
3017 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
3020 ret = nand_read_data_op(chip, oob, eccbytes, false, false); in nand_read_page_raw_syndrome()
3026 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
3027 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_raw_syndrome()
3032 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
3036 size = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_raw_syndrome()
3038 ret = nand_read_data_op(chip, oob, size, false, false); in nand_read_page_raw_syndrome()
3047 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
3048 * @chip: nand chip info structure
3049 * @buf: buffer to store read data
3050 * @oob_required: caller requires OOB data read to chip->oob_poi
3051 * @page: page number to read
3053 static int nand_read_page_swecc(struct nand_chip *chip, uint8_t *buf, in nand_read_page_swecc() argument
3056 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_swecc()
3057 int i, eccsize = chip->ecc.size, ret; in nand_read_page_swecc()
3058 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
3059 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
3061 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_swecc()
3062 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_swecc()
3065 chip->ecc.read_page_raw(chip, buf, 1, page); in nand_read_page_swecc()
3067 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_read_page_swecc()
3068 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_swecc()
3070 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_swecc()
3071 chip->ecc.total); in nand_read_page_swecc()
3075 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
3078 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_swecc()
3081 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
3083 mtd->ecc_stats.failed++; in nand_read_page_swecc()
3085 mtd->ecc_stats.corrected += stat; in nand_read_page_swecc()
3093 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
3094 * @chip: nand chip info structure
3097 * @bufpoi: buffer to store read data
3098 * @page: page number to read
3100 static int nand_read_subpage(struct nand_chip *chip, uint32_t data_offs, in nand_read_subpage() argument
3103 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_subpage()
3108 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; in nand_read_subpage()
3113 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
3114 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
3115 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
3116 num_steps = end_step - start_step + 1; in nand_read_subpage()
3117 index = start_step * chip->ecc.bytes; in nand_read_subpage()
3119 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
3120 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
3121 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
3123 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
3126 ret = nand_read_page_op(chip, page, data_col_addr, p, datafrag_len); in nand_read_subpage()
3131 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
3132 chip->ecc.calculate(chip, p, &chip->ecc.calc_buf[i]); in nand_read_subpage()
3135 * The performance is faster if we position offsets according to in nand_read_subpage()
3146 ret = nand_change_read_column_op(chip, mtd->writesize, in nand_read_subpage()
3147 chip->oob_poi, mtd->oobsize, in nand_read_subpage()
3153 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
3156 aligned_pos = oobregion.offset & ~(busw - 1); in nand_read_subpage()
3158 if (oobregion.offset & (busw - 1)) in nand_read_subpage()
3160 if ((oobregion.offset + (num_steps * chip->ecc.bytes)) & in nand_read_subpage()
3161 (busw - 1)) in nand_read_subpage()
3164 ret = nand_change_read_column_op(chip, in nand_read_subpage()
3165 mtd->writesize + aligned_pos, in nand_read_subpage()
3166 &chip->oob_poi[aligned_pos], in nand_read_subpage()
3172 ret = mtd_ooblayout_get_eccbytes(mtd, chip->ecc.code_buf, in nand_read_subpage()
3173 chip->oob_poi, index, eccfrag_len); in nand_read_subpage()
3178 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
3181 stat = chip->ecc.correct(chip, p, &chip->ecc.code_buf[i], in nand_read_subpage()
3182 &chip->ecc.calc_buf[i]); in nand_read_subpage()
3183 if (stat == -EBADMSG && in nand_read_subpage()
3184 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_subpage()
3186 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_subpage()
3187 &chip->ecc.code_buf[i], in nand_read_subpage()
3188 chip->ecc.bytes, in nand_read_subpage()
3190 chip->ecc.strength); in nand_read_subpage()
3194 mtd->ecc_stats.failed++; in nand_read_subpage()
3196 mtd->ecc_stats.corrected += stat; in nand_read_subpage()
3204 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
3205 * @chip: nand chip info structure
3206 * @buf: buffer to store read data
3207 * @oob_required: caller requires OOB data read to chip->oob_poi
3208 * @page: page number to read
3212 static int nand_read_page_hwecc(struct nand_chip *chip, uint8_t *buf, in nand_read_page_hwecc() argument
3215 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_hwecc()
3216 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc()
3217 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
3218 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
3220 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_read_page_hwecc()
3221 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc()
3224 ret = nand_read_page_op(chip, page, 0, NULL, 0); in nand_read_page_hwecc()
3228 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
3229 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc()
3231 ret = nand_read_data_op(chip, p, eccsize, false, false); in nand_read_page_hwecc()
3235 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_read_page_hwecc()
3238 ret = nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false, in nand_read_page_hwecc()
3243 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_hwecc()
3244 chip->ecc.total); in nand_read_page_hwecc()
3248 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
3251 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
3254 stat = chip->ecc.correct(chip, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
3255 if (stat == -EBADMSG && in nand_read_page_hwecc()
3256 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc()
3261 chip->ecc.strength); in nand_read_page_hwecc()
3265 mtd->ecc_stats.failed++; in nand_read_page_hwecc()
3267 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc()
3275 * nand_read_page_hwecc_oob_first - Hardware ECC page read with ECC
3277 * @chip: nand chip info structure
3278 * @buf: buffer to store read data
3279 * @oob_required: caller requires OOB data read to chip->oob_poi
3280 * @page: page number to read
3282 * Hardware ECC for large page chips, which requires the ECC data to be
3285 int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf, in nand_read_page_hwecc_oob_first() argument
3288 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_hwecc_oob_first()
3289 int i, eccsize = chip->ecc.size, ret; in nand_read_page_hwecc_oob_first()
3290 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc_oob_first()
3291 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc_oob_first()
3293 uint8_t *ecc_code = chip->ecc.code_buf; in nand_read_page_hwecc_oob_first()
3297 ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize); in nand_read_page_hwecc_oob_first()
3301 /* Move read cursor to start of page */ in nand_read_page_hwecc_oob_first()
3302 ret = nand_change_read_column_op(chip, 0, NULL, 0, false); in nand_read_page_hwecc_oob_first()
3306 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in nand_read_page_hwecc_oob_first()
3307 chip->ecc.total); in nand_read_page_hwecc_oob_first()
3311 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc_oob_first()
3314 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_hwecc_oob_first()
3316 ret = nand_read_data_op(chip, p, eccsize, false, false); in nand_read_page_hwecc_oob_first()
3320 stat = chip->ecc.correct(chip, p, &ecc_code[i], NULL); in nand_read_page_hwecc_oob_first()
3321 if (stat == -EBADMSG && in nand_read_page_hwecc_oob_first()
3322 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc_oob_first()
3327 chip->ecc.strength); in nand_read_page_hwecc_oob_first()
3331 mtd->ecc_stats.failed++; in nand_read_page_hwecc_oob_first()
3333 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc_oob_first()
3342 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
3343 * @chip: nand chip info structure
3344 * @buf: buffer to store read data
3345 * @oob_required: caller requires OOB data read to chip->oob_poi
3346 * @page: page number to read
3351 static int nand_read_page_syndrome(struct nand_chip *chip, uint8_t *buf, in nand_read_page_syndrome() argument
3354 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_page_syndrome()
3355 int ret, i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
3356 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
3357 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
3358 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_page_syndrome()
3360 uint8_t *oob = chip->oob_poi; in nand_read_page_syndrome()
3363 ret = nand_read_page_op(chip, page, 0, NULL, 0); in nand_read_page_syndrome()
3367 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_syndrome()
3370 chip->ecc.hwctl(chip, NAND_ECC_READ); in nand_read_page_syndrome()
3372 ret = nand_read_data_op(chip, p, eccsize, false, false); in nand_read_page_syndrome()
3376 if (chip->ecc.prepad) { in nand_read_page_syndrome()
3377 ret = nand_read_data_op(chip, oob, chip->ecc.prepad, in nand_read_page_syndrome()
3382 oob += chip->ecc.prepad; in nand_read_page_syndrome()
3385 chip->ecc.hwctl(chip, NAND_ECC_READSYN); in nand_read_page_syndrome()
3387 ret = nand_read_data_op(chip, oob, eccbytes, false, false); in nand_read_page_syndrome()
3391 stat = chip->ecc.correct(chip, p, oob, NULL); in nand_read_page_syndrome()
3395 if (chip->ecc.postpad) { in nand_read_page_syndrome()
3396 ret = nand_read_data_op(chip, oob, chip->ecc.postpad, in nand_read_page_syndrome()
3401 oob += chip->ecc.postpad; in nand_read_page_syndrome()
3404 if (stat == -EBADMSG && in nand_read_page_syndrome()
3405 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_syndrome()
3407 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_page_syndrome()
3408 oob - eccpadbytes, in nand_read_page_syndrome()
3411 chip->ecc.strength); in nand_read_page_syndrome()
3415 mtd->ecc_stats.failed++; in nand_read_page_syndrome()
3417 mtd->ecc_stats.corrected += stat; in nand_read_page_syndrome()
3423 i = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_syndrome()
3425 ret = nand_read_data_op(chip, oob, i, false, false); in nand_read_page_syndrome()
3434 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
3435 * @chip: NAND chip object
3438 * @len: size of oob to transfer
3440 static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, in nand_transfer_oob() argument
3443 struct mtd_info *mtd = nand_to_mtd(chip); in nand_transfer_oob()
3446 switch (ops->mode) { in nand_transfer_oob()
3450 memcpy(oob, chip->oob_poi + ops->ooboffs, len); in nand_transfer_oob()
3454 ret = mtd_ooblayout_get_databytes(mtd, oob, chip->oob_poi, in nand_transfer_oob()
3455 ops->ooboffs, len); in nand_transfer_oob()
3465 static void rawnand_enable_cont_reads(struct nand_chip *chip, unsigned int page, in rawnand_enable_cont_reads() argument
3468 struct mtd_info *mtd = nand_to_mtd(chip); in rawnand_enable_cont_reads()
3471 chip->cont_read.ongoing = false; in rawnand_enable_cont_reads()
3473 if (!chip->controller->supported_op.cont_read) in rawnand_enable_cont_reads()
3476 end_page = DIV_ROUND_UP(col + readlen, mtd->writesize); in rawnand_enable_cont_reads()
3477 end_col = (col + readlen) % mtd->writesize; in rawnand_enable_cont_reads()
3483 end_page--; in rawnand_enable_cont_reads()
3488 chip->cont_read.first_page = page; in rawnand_enable_cont_reads()
3489 chip->cont_read.last_page = end_page; in rawnand_enable_cont_reads()
3490 chip->cont_read.ongoing = true; in rawnand_enable_cont_reads()
3492 rawnand_cap_cont_reads(chip); in rawnand_enable_cont_reads()
3495 static void rawnand_cont_read_skip_first_page(struct nand_chip *chip, unsigned int page) in rawnand_cont_read_skip_first_page() argument
3497 if (!chip->cont_read.ongoing || page != chip->cont_read.first_page) in rawnand_cont_read_skip_first_page()
3500 chip->cont_read.first_page++; in rawnand_cont_read_skip_first_page()
3501 if (chip->cont_read.first_page == chip->cont_read.pause_page) in rawnand_cont_read_skip_first_page()
3502 chip->cont_read.first_page++; in rawnand_cont_read_skip_first_page()
3503 if (chip->cont_read.first_page >= chip->cont_read.last_page) in rawnand_cont_read_skip_first_page()
3504 chip->cont_read.ongoing = false; in rawnand_cont_read_skip_first_page()
3508 * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
3509 * @chip: NAND chip object
3510 * @retry_mode: the retry mode to use
3512 * Some vendors supply a special command to shift the Vt threshold, to be used
3516 static int nand_setup_read_retry(struct nand_chip *chip, int retry_mode) in nand_setup_read_retry() argument
3520 if (retry_mode >= chip->read_retries) in nand_setup_read_retry()
3521 return -EINVAL; in nand_setup_read_retry()
3523 if (!chip->ops.setup_read_retry) in nand_setup_read_retry()
3524 return -EOPNOTSUPP; in nand_setup_read_retry()
3526 return chip->ops.setup_read_retry(chip, retry_mode); in nand_setup_read_retry()
3529 static void nand_wait_readrdy(struct nand_chip *chip) in nand_wait_readrdy() argument
3533 if (!(chip->options & NAND_NEED_READRDY)) in nand_wait_readrdy()
3536 conf = nand_get_interface_config(chip); in nand_wait_readrdy()
3537 WARN_ON(nand_wait_rdy_op(chip, NAND_COMMON_TIMING_MS(conf, tR_max), 0)); in nand_wait_readrdy()
3541 * nand_do_read_ops - [INTERN] Read data with ECC
3542 * @chip: NAND chip object
3543 * @from: offset to read from
3546 * Internal function. Called with chip held.
3548 static int nand_do_read_ops(struct nand_chip *chip, loff_t from, in nand_do_read_ops() argument
3552 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_read_ops()
3554 uint32_t readlen = ops->len; in nand_do_read_ops()
3555 uint32_t oobreadlen = ops->ooblen; in nand_do_read_ops()
3565 if (nand_region_is_secured(chip, from, readlen)) in nand_do_read_ops()
3566 return -EIO; in nand_do_read_ops()
3568 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_ops()
3569 nand_select_target(chip, chipnr); in nand_do_read_ops()
3571 realpage = (int)(from >> chip->page_shift); in nand_do_read_ops()
3572 page = realpage & chip->pagemask; in nand_do_read_ops()
3574 col = (int)(from & (mtd->writesize - 1)); in nand_do_read_ops()
3576 buf = ops->datbuf; in nand_do_read_ops()
3577 oob = ops->oobbuf; in nand_do_read_ops()
3580 rawnand_enable_cont_reads(chip, page, readlen, col); in nand_do_read_ops()
3583 struct mtd_ecc_stats ecc_stats = mtd->ecc_stats; in nand_do_read_ops()
3585 bytes = min(mtd->writesize - col, readlen); in nand_do_read_ops()
3586 aligned = (bytes == mtd->writesize); in nand_do_read_ops()
3590 else if (chip->options & NAND_USES_DMA) in nand_do_read_ops()
3593 chip->buf_align); in nand_do_read_ops()
3598 if (realpage != chip->pagecache.page || oob) { in nand_do_read_ops()
3599 bufpoi = use_bounce_buf ? chip->data_buf : buf; in nand_do_read_ops()
3610 if (unlikely(ops->mode == MTD_OPS_RAW)) in nand_do_read_ops()
3611 ret = chip->ecc.read_page_raw(chip, bufpoi, in nand_do_read_ops()
3614 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && in nand_do_read_ops()
3616 ret = chip->ecc.read_subpage(chip, col, bytes, in nand_do_read_ops()
3619 ret = chip->ecc.read_page(chip, bufpoi, in nand_do_read_ops()
3624 chip->pagecache.page = -1; in nand_do_read_ops()
3633 if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && in nand_do_read_ops()
3634 !(mtd->ecc_stats.failed - ecc_stats.failed) && in nand_do_read_ops()
3635 (ops->mode != MTD_OPS_RAW)) { in nand_do_read_ops()
3636 chip->pagecache.page = realpage; in nand_do_read_ops()
3637 chip->pagecache.bitflips = ret; in nand_do_read_ops()
3640 chip->pagecache.page = -1; in nand_do_read_ops()
3649 oob = nand_transfer_oob(chip, oob, ops, in nand_do_read_ops()
3651 oobreadlen -= toread; in nand_do_read_ops()
3655 nand_wait_readrdy(chip); in nand_do_read_ops()
3657 if (mtd->ecc_stats.failed - ecc_stats.failed) { in nand_do_read_ops()
3658 if (retry_mode + 1 < chip->read_retries) { in nand_do_read_ops()
3660 ret = nand_setup_read_retry(chip, in nand_do_read_ops()
3666 mtd->ecc_stats = ecc_stats; in nand_do_read_ops()
3677 memcpy(buf, chip->data_buf + col, bytes); in nand_do_read_ops()
3680 chip->pagecache.bitflips); in nand_do_read_ops()
3682 rawnand_cont_read_skip_first_page(chip, page); in nand_do_read_ops()
3685 readlen -= bytes; in nand_do_read_ops()
3687 /* Reset to retry mode 0 */ in nand_do_read_ops()
3689 ret = nand_setup_read_retry(chip, 0); in nand_do_read_ops()
3698 /* For subsequent reads align to page boundary */ in nand_do_read_ops()
3703 page = realpage & chip->pagemask; in nand_do_read_ops()
3704 /* Check, if we cross a chip boundary */ in nand_do_read_ops()
3707 nand_deselect_target(chip); in nand_do_read_ops()
3708 nand_select_target(chip, chipnr); in nand_do_read_ops()
3711 nand_deselect_target(chip); in nand_do_read_ops()
3713 ops->retlen = ops->len - (size_t) readlen; in nand_do_read_ops()
3715 ops->oobretlen = ops->ooblen - oobreadlen; in nand_do_read_ops()
3721 return -EBADMSG; in nand_do_read_ops()
3727 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
3728 * @chip: nand chip info structure
3729 * @page: page number to read
3731 int nand_read_oob_std(struct nand_chip *chip, int page) in nand_read_oob_std() argument
3733 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_oob_std()
3735 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize); in nand_read_oob_std()
3740 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
3742 * @chip: nand chip info structure
3743 * @page: page number to read
3745 static int nand_read_oob_syndrome(struct nand_chip *chip, int page) in nand_read_oob_syndrome() argument
3747 struct mtd_info *mtd = nand_to_mtd(chip); in nand_read_oob_syndrome()
3748 int length = mtd->oobsize; in nand_read_oob_syndrome()
3749 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
3750 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
3751 uint8_t *bufpoi = chip->oob_poi; in nand_read_oob_syndrome()
3754 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0); in nand_read_oob_syndrome()
3758 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
3763 if (mtd->writesize > 512) in nand_read_oob_syndrome()
3764 ret = nand_change_read_column_op(chip, pos, in nand_read_oob_syndrome()
3768 ret = nand_read_page_op(chip, page, pos, NULL, in nand_read_oob_syndrome()
3777 ret = nand_read_data_op(chip, bufpoi, toread, false, false); in nand_read_oob_syndrome()
3782 length -= toread; in nand_read_oob_syndrome()
3785 ret = nand_read_data_op(chip, bufpoi, length, false, false); in nand_read_oob_syndrome()
3794 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
3795 * @chip: nand chip info structure
3796 * @page: page number to write
3798 int nand_write_oob_std(struct nand_chip *chip, int page) in nand_write_oob_std() argument
3800 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_oob_std()
3802 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi, in nand_write_oob_std()
3803 mtd->oobsize); in nand_write_oob_std()
3808 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
3809 * with syndrome - only for large page flash
3810 * @chip: nand chip info structure
3811 * @page: page number to write
3813 static int nand_write_oob_syndrome(struct nand_chip *chip, int page) in nand_write_oob_syndrome() argument
3815 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_oob_syndrome()
3816 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
3817 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
3818 int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
3819 const uint8_t *bufpoi = chip->oob_poi; in nand_write_oob_syndrome()
3822 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
3824 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
3826 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
3832 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0); in nand_write_oob_syndrome()
3838 if (mtd->writesize <= 512) { in nand_write_oob_syndrome()
3845 ret = nand_write_data_op(chip, &fill, in nand_write_oob_syndrome()
3850 len -= num; in nand_write_oob_syndrome()
3854 ret = nand_change_write_column_op(chip, pos, in nand_write_oob_syndrome()
3864 ret = nand_write_data_op(chip, bufpoi, len, false); in nand_write_oob_syndrome()
3869 length -= len; in nand_write_oob_syndrome()
3872 ret = nand_write_data_op(chip, bufpoi, length, false); in nand_write_oob_syndrome()
3877 return nand_prog_page_end_op(chip); in nand_write_oob_syndrome()
3881 * nand_do_read_oob - [INTERN] NAND read out-of-band
3882 * @chip: NAND chip object
3883 * @from: offset to read from
3886 * NAND read out-of-band data from the spare area.
3888 static int nand_do_read_oob(struct nand_chip *chip, loff_t from, in nand_do_read_oob() argument
3891 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_read_oob()
3895 int readlen = ops->ooblen; in nand_do_read_oob()
3897 uint8_t *buf = ops->oobbuf; in nand_do_read_oob()
3904 if (nand_region_is_secured(chip, from, readlen)) in nand_do_read_oob()
3905 return -EIO; in nand_do_read_oob()
3907 stats = mtd->ecc_stats; in nand_do_read_oob()
3911 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_oob()
3912 nand_select_target(chip, chipnr); in nand_do_read_oob()
3914 /* Shift to get page */ in nand_do_read_oob()
3915 realpage = (int)(from >> chip->page_shift); in nand_do_read_oob()
3916 page = realpage & chip->pagemask; in nand_do_read_oob()
3919 if (ops->mode == MTD_OPS_RAW) in nand_do_read_oob()
3920 ret = chip->ecc.read_oob_raw(chip, page); in nand_do_read_oob()
3922 ret = chip->ecc.read_oob(chip, page); in nand_do_read_oob()
3928 buf = nand_transfer_oob(chip, buf, ops, len); in nand_do_read_oob()
3930 nand_wait_readrdy(chip); in nand_do_read_oob()
3934 readlen -= len; in nand_do_read_oob()
3941 page = realpage & chip->pagemask; in nand_do_read_oob()
3942 /* Check, if we cross a chip boundary */ in nand_do_read_oob()
3945 nand_deselect_target(chip); in nand_do_read_oob()
3946 nand_select_target(chip, chipnr); in nand_do_read_oob()
3949 nand_deselect_target(chip); in nand_do_read_oob()
3951 ops->oobretlen = ops->ooblen - readlen; in nand_do_read_oob()
3956 if (mtd->ecc_stats.failed - stats.failed) in nand_do_read_oob()
3957 return -EBADMSG; in nand_do_read_oob()
3963 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
3965 * @from: offset to read from
3968 * NAND read data and/or out-of-band data.
3973 struct nand_chip *chip = mtd_to_nand(mtd); in nand_read_oob() local
3977 ops->retlen = 0; in nand_read_oob()
3979 if (ops->mode != MTD_OPS_PLACE_OOB && in nand_read_oob()
3980 ops->mode != MTD_OPS_AUTO_OOB && in nand_read_oob()
3981 ops->mode != MTD_OPS_RAW) in nand_read_oob()
3982 return -ENOTSUPP; in nand_read_oob()
3984 nand_get_device(chip); in nand_read_oob()
3986 old_stats = mtd->ecc_stats; in nand_read_oob()
3988 if (!ops->datbuf) in nand_read_oob()
3989 ret = nand_do_read_oob(chip, from, ops); in nand_read_oob()
3991 ret = nand_do_read_ops(chip, from, ops); in nand_read_oob()
3993 if (ops->stats) { in nand_read_oob()
3994 ops->stats->uncorrectable_errors += in nand_read_oob()
3995 mtd->ecc_stats.failed - old_stats.failed; in nand_read_oob()
3996 ops->stats->corrected_bitflips += in nand_read_oob()
3997 mtd->ecc_stats.corrected - old_stats.corrected; in nand_read_oob()
4000 nand_release_device(chip); in nand_read_oob()
4005 * nand_write_page_raw_notsupp - dummy raw page write function
4006 * @chip: nand chip info structure
4008 * @oob_required: must write chip->oob_poi to OOB
4009 * @page: page number to write
4011 * Returns -ENOTSUPP unconditionally.
4013 int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf, in nand_write_page_raw_notsupp() argument
4016 return -ENOTSUPP; in nand_write_page_raw_notsupp()
4020 * nand_write_page_raw - [INTERN] raw page write function
4021 * @chip: nand chip info structure
4023 * @oob_required: must write chip->oob_poi to OOB
4024 * @page: page number to write
4028 int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_raw() argument
4031 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_raw()
4034 ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize); in nand_write_page_raw()
4039 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, in nand_write_page_raw()
4045 return nand_prog_page_end_op(chip); in nand_write_page_raw()
4050 * nand_monolithic_write_page_raw - Monolithic page write in raw mode
4051 * @chip: NAND chip info structure
4052 * @buf: data buffer to write
4053 * @oob_required: must write chip->oob_poi to OOB
4054 * @page: page number to write
4058 * eventually OOB) to be sent over the bus and effectively programmed
4059 * into the NAND chip arrays in a single operation. This is an
4060 * alternative to nand_write_page_raw(), which first sends the main
4062 * cycles on the NAND bus, and finally sends the program command to
4063 * synchronyze the NAND chip cache.
4065 int nand_monolithic_write_page_raw(struct nand_chip *chip, const u8 *buf, in nand_monolithic_write_page_raw() argument
4068 struct mtd_info *mtd = nand_to_mtd(chip); in nand_monolithic_write_page_raw()
4069 unsigned int size = mtd->writesize; in nand_monolithic_write_page_raw()
4073 size += mtd->oobsize; in nand_monolithic_write_page_raw()
4075 if (buf != chip->data_buf) { in nand_monolithic_write_page_raw()
4076 write_buf = nand_get_data_buf(chip); in nand_monolithic_write_page_raw()
4077 memcpy(write_buf, buf, mtd->writesize); in nand_monolithic_write_page_raw()
4081 return nand_prog_page_op(chip, page, 0, write_buf, size); in nand_monolithic_write_page_raw()
4086 * nand_write_page_raw_syndrome - [INTERN] raw page write function
4087 * @chip: nand chip info structure
4089 * @oob_required: must write chip->oob_poi to OOB
4090 * @page: page number to write
4094 static int nand_write_page_raw_syndrome(struct nand_chip *chip, in nand_write_page_raw_syndrome() argument
4098 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_raw_syndrome()
4099 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
4100 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
4101 uint8_t *oob = chip->oob_poi; in nand_write_page_raw_syndrome()
4104 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_page_raw_syndrome()
4108 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
4109 ret = nand_write_data_op(chip, buf, eccsize, false); in nand_write_page_raw_syndrome()
4115 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
4116 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_raw_syndrome()
4121 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
4124 ret = nand_write_data_op(chip, oob, eccbytes, false); in nand_write_page_raw_syndrome()
4130 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
4131 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_raw_syndrome()
4136 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
4140 size = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_raw_syndrome()
4142 ret = nand_write_data_op(chip, oob, size, false); in nand_write_page_raw_syndrome()
4147 return nand_prog_page_end_op(chip); in nand_write_page_raw_syndrome()
4150 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
4151 * @chip: nand chip info structure
4153 * @oob_required: must write chip->oob_poi to OOB
4154 * @page: page number to write
4156 static int nand_write_page_swecc(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_swecc() argument
4159 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_swecc()
4160 int i, eccsize = chip->ecc.size, ret; in nand_write_page_swecc()
4161 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
4162 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
4163 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_swecc()
4167 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_write_page_swecc()
4168 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_swecc()
4170 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_page_swecc()
4171 chip->ecc.total); in nand_write_page_swecc()
4175 return chip->ecc.write_page_raw(chip, buf, 1, page); in nand_write_page_swecc()
4179 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
4180 * @chip: nand chip info structure
4182 * @oob_required: must write chip->oob_poi to OOB
4183 * @page: page number to write
4185 static int nand_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_hwecc() argument
4188 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_hwecc()
4189 int i, eccsize = chip->ecc.size, ret; in nand_write_page_hwecc()
4190 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
4191 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
4192 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_page_hwecc()
4195 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_page_hwecc()
4199 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_hwecc()
4200 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_hwecc()
4202 ret = nand_write_data_op(chip, p, eccsize, false); in nand_write_page_hwecc()
4206 chip->ecc.calculate(chip, p, &ecc_calc[i]); in nand_write_page_hwecc()
4209 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_page_hwecc()
4210 chip->ecc.total); in nand_write_page_hwecc()
4214 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false); in nand_write_page_hwecc()
4218 return nand_prog_page_end_op(chip); in nand_write_page_hwecc()
4223 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
4224 * @chip: nand chip info structure
4228 * @oob_required: must write chip->oob_poi to OOB
4229 * @page: page number to write
4231 static int nand_write_subpage_hwecc(struct nand_chip *chip, uint32_t offset, in nand_write_subpage_hwecc() argument
4235 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_subpage_hwecc()
4236 uint8_t *oob_buf = chip->oob_poi; in nand_write_subpage_hwecc()
4237 uint8_t *ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
4238 int ecc_size = chip->ecc.size; in nand_write_subpage_hwecc()
4239 int ecc_bytes = chip->ecc.bytes; in nand_write_subpage_hwecc()
4240 int ecc_steps = chip->ecc.steps; in nand_write_subpage_hwecc()
4242 uint32_t end_step = (offset + data_len - 1) / ecc_size; in nand_write_subpage_hwecc()
4243 int oob_bytes = mtd->oobsize / ecc_steps; in nand_write_subpage_hwecc()
4246 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_subpage_hwecc()
4252 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_subpage_hwecc()
4255 ret = nand_write_data_op(chip, buf, ecc_size, false); in nand_write_subpage_hwecc()
4259 /* mask ECC of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
4263 chip->ecc.calculate(chip, buf, ecc_calc); in nand_write_subpage_hwecc()
4265 /* mask OOB of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
4275 /* copy calculated ECC for whole page to chip->buffer->oob */ in nand_write_subpage_hwecc()
4276 /* this include masked-value(0xFF) for unwritten subpages */ in nand_write_subpage_hwecc()
4277 ecc_calc = chip->ecc.calc_buf; in nand_write_subpage_hwecc()
4278 ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0, in nand_write_subpage_hwecc()
4279 chip->ecc.total); in nand_write_subpage_hwecc()
4283 /* write OOB buffer to NAND device */ in nand_write_subpage_hwecc()
4284 ret = nand_write_data_op(chip, chip->oob_poi, mtd->oobsize, false); in nand_write_subpage_hwecc()
4288 return nand_prog_page_end_op(chip); in nand_write_subpage_hwecc()
4293 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
4294 * @chip: nand chip info structure
4296 * @oob_required: must write chip->oob_poi to OOB
4297 * @page: page number to write
4302 static int nand_write_page_syndrome(struct nand_chip *chip, const uint8_t *buf, in nand_write_page_syndrome() argument
4305 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page_syndrome()
4306 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
4307 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
4308 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
4310 uint8_t *oob = chip->oob_poi; in nand_write_page_syndrome()
4313 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); in nand_write_page_syndrome()
4317 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_syndrome()
4318 chip->ecc.hwctl(chip, NAND_ECC_WRITE); in nand_write_page_syndrome()
4320 ret = nand_write_data_op(chip, p, eccsize, false); in nand_write_page_syndrome()
4324 if (chip->ecc.prepad) { in nand_write_page_syndrome()
4325 ret = nand_write_data_op(chip, oob, chip->ecc.prepad, in nand_write_page_syndrome()
4330 oob += chip->ecc.prepad; in nand_write_page_syndrome()
4333 chip->ecc.calculate(chip, p, oob); in nand_write_page_syndrome()
4335 ret = nand_write_data_op(chip, oob, eccbytes, false); in nand_write_page_syndrome()
4341 if (chip->ecc.postpad) { in nand_write_page_syndrome()
4342 ret = nand_write_data_op(chip, oob, chip->ecc.postpad, in nand_write_page_syndrome()
4347 oob += chip->ecc.postpad; in nand_write_page_syndrome()
4352 i = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_syndrome()
4354 ret = nand_write_data_op(chip, oob, i, false); in nand_write_page_syndrome()
4359 return nand_prog_page_end_op(chip); in nand_write_page_syndrome()
4363 * nand_write_page - write one page
4364 * @chip: NAND chip descriptor
4366 * @data_len: length of actual data to be written
4367 * @buf: the data to write
4368 * @oob_required: must write chip->oob_poi to OOB
4369 * @page: page number to write
4372 static int nand_write_page(struct nand_chip *chip, uint32_t offset, in nand_write_page() argument
4376 struct mtd_info *mtd = nand_to_mtd(chip); in nand_write_page()
4379 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && in nand_write_page()
4380 chip->ecc.write_subpage) in nand_write_page()
4381 subpage = offset || (data_len < mtd->writesize); in nand_write_page()
4386 status = chip->ecc.write_page_raw(chip, buf, oob_required, in nand_write_page()
4389 status = chip->ecc.write_subpage(chip, offset, data_len, buf, in nand_write_page()
4392 status = chip->ecc.write_page(chip, buf, oob_required, page); in nand_write_page()
4400 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
4403 * nand_do_write_ops - [INTERN] NAND write with ECC
4404 * @chip: NAND chip object
4405 * @to: offset to write to
4410 static int nand_do_write_ops(struct nand_chip *chip, loff_t to, in nand_do_write_ops() argument
4413 struct mtd_info *mtd = nand_to_mtd(chip); in nand_do_write_ops()
4415 uint32_t writelen = ops->len; in nand_do_write_ops()
4417 uint32_t oobwritelen = ops->ooblen; in nand_do_write_ops()
4420 uint8_t *oob = ops->oobbuf; in nand_do_write_ops()
4421 uint8_t *buf = ops->datbuf; in nand_do_write_ops()
4425 ops->retlen = 0; in nand_do_write_ops()
4430 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { in nand_do_write_ops()
4431 pr_notice("%s: attempt to write non page aligned data\n", in nand_do_write_ops()
4433 return -EINVAL; in nand_do_write_ops()
4437 if (nand_region_is_secured(chip, to, writelen)) in nand_do_write_ops()
4438 return -EIO; in nand_do_write_ops()
4440 column = to & (mtd->writesize - 1); in nand_do_write_ops()
4442 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_ops()
4443 nand_select_target(chip, chipnr); in nand_do_write_ops()
4446 if (nand_check_wp(chip)) { in nand_do_write_ops()
4447 ret = -EIO; in nand_do_write_ops()
4451 realpage = (int)(to >> chip->page_shift); in nand_do_write_ops()
4452 page = realpage & chip->pagemask; in nand_do_write_ops()
4454 /* Invalidate the page cache, when we write to the cached page */ in nand_do_write_ops()
4455 if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) && in nand_do_write_ops()
4456 ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len)) in nand_do_write_ops()
4457 chip->pagecache.page = -1; in nand_do_write_ops()
4460 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { in nand_do_write_ops()
4461 ret = -EINVAL; in nand_do_write_ops()
4466 int bytes = mtd->writesize; in nand_do_write_ops()
4469 int part_pagewr = (column || writelen < mtd->writesize); in nand_do_write_ops()
4473 else if (chip->options & NAND_USES_DMA) in nand_do_write_ops()
4476 chip->buf_align); in nand_do_write_ops()
4488 bytes = min_t(int, bytes - column, writelen); in nand_do_write_ops()
4489 wbuf = nand_get_data_buf(chip); in nand_do_write_ops()
4490 memset(wbuf, 0xff, mtd->writesize); in nand_do_write_ops()
4496 oob = nand_fill_oob(chip, oob, len, ops); in nand_do_write_ops()
4497 oobwritelen -= len; in nand_do_write_ops()
4499 /* We still need to erase leftover OOB data */ in nand_do_write_ops()
4500 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_do_write_ops()
4503 ret = nand_write_page(chip, column, bytes, wbuf, in nand_do_write_ops()
4505 (ops->mode == MTD_OPS_RAW)); in nand_do_write_ops()
4509 writelen -= bytes; in nand_do_write_ops()
4517 page = realpage & chip->pagemask; in nand_do_write_ops()
4518 /* Check, if we cross a chip boundary */ in nand_do_write_ops()
4521 nand_deselect_target(chip); in nand_do_write_ops()
4522 nand_select_target(chip, chipnr); in nand_do_write_ops()
4526 ops->retlen = ops->len - writelen; in nand_do_write_ops()
4528 ops->oobretlen = ops->ooblen; in nand_do_write_ops()
4531 nand_deselect_target(chip); in nand_do_write_ops()
4536 * panic_nand_write - [MTD Interface] NAND write with ECC
4538 * @to: offset to write to
4539 * @len: number of bytes to write
4540 * @retlen: pointer to variable to store the number of written bytes
4541 * @buf: the data to write
4546 static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, in panic_nand_write() argument
4549 struct nand_chip *chip = mtd_to_nand(mtd); in panic_nand_write() local
4550 int chipnr = (int)(to >> chip->chip_shift); in panic_nand_write()
4554 nand_select_target(chip, chipnr); in panic_nand_write()
4556 /* Wait for the device to get ready */ in panic_nand_write()
4557 panic_nand_wait(chip, 400); in panic_nand_write()
4564 ret = nand_do_write_ops(chip, to, &ops); in panic_nand_write()
4571 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
4573 * @to: offset to write to
4576 static int nand_write_oob(struct mtd_info *mtd, loff_t to, in nand_write_oob() argument
4579 struct nand_chip *chip = mtd_to_nand(mtd); in nand_write_oob() local
4582 ops->retlen = 0; in nand_write_oob()
4584 nand_get_device(chip); in nand_write_oob()
4586 switch (ops->mode) { in nand_write_oob()
4596 if (!ops->datbuf) in nand_write_oob()
4597 ret = nand_do_write_oob(chip, to, ops); in nand_write_oob()
4599 ret = nand_do_write_ops(chip, to, ops); in nand_write_oob()
4602 nand_release_device(chip); in nand_write_oob()
4607 * nand_erase - [MTD Interface] erase block(s)
4619 * nand_erase_nand - [INTERN] erase block(s)
4620 * @chip: NAND chip object
4626 int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr, in nand_erase_nand() argument
4633 __func__, (unsigned long long)instr->addr, in nand_erase_nand()
4634 (unsigned long long)instr->len); in nand_erase_nand()
4636 if (check_offs_len(chip, instr->addr, instr->len)) in nand_erase_nand()
4637 return -EINVAL; in nand_erase_nand()
4640 if (nand_region_is_secured(chip, instr->addr, instr->len)) in nand_erase_nand()
4641 return -EIO; in nand_erase_nand()
4644 nand_get_device(chip); in nand_erase_nand()
4646 /* Shift to get first page */ in nand_erase_nand()
4647 page = (int)(instr->addr >> chip->page_shift); in nand_erase_nand()
4648 chipnr = (int)(instr->addr >> chip->chip_shift); in nand_erase_nand()
4651 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); in nand_erase_nand()
4654 nand_select_target(chip, chipnr); in nand_erase_nand()
4657 if (nand_check_wp(chip)) { in nand_erase_nand()
4660 ret = -EIO; in nand_erase_nand()
4665 len = instr->len; in nand_erase_nand()
4668 loff_t ofs = (loff_t)page << chip->page_shift; in nand_erase_nand()
4671 if (nand_block_checkbad(chip, ((loff_t) page) << in nand_erase_nand()
4672 chip->page_shift, allowbbt)) { in nand_erase_nand()
4673 pr_warn("%s: attempt to erase a bad block at 0x%08llx\n", in nand_erase_nand()
4675 ret = -EIO; in nand_erase_nand()
4683 if (page <= chip->pagecache.page && chip->pagecache.page < in nand_erase_nand()
4685 chip->pagecache.page = -1; in nand_erase_nand()
4687 ret = nand_erase_op(chip, (page & chip->pagemask) >> in nand_erase_nand()
4688 (chip->phys_erase_shift - chip->page_shift)); in nand_erase_nand()
4692 instr->fail_addr = ofs; in nand_erase_nand()
4697 len -= (1ULL << chip->phys_erase_shift); in nand_erase_nand()
4700 /* Check, if we cross a chip boundary */ in nand_erase_nand()
4701 if (len && !(page & chip->pagemask)) { in nand_erase_nand()
4703 nand_deselect_target(chip); in nand_erase_nand()
4704 nand_select_target(chip, chipnr); in nand_erase_nand()
4712 nand_deselect_target(chip); in nand_erase_nand()
4713 nand_release_device(chip); in nand_erase_nand()
4720 * nand_sync - [MTD Interface] sync
4723 * Sync is actually a wait for chip ready function.
4727 struct nand_chip *chip = mtd_to_nand(mtd); in nand_sync() local
4732 nand_get_device(chip); in nand_sync()
4734 nand_release_device(chip); in nand_sync()
4738 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
4740 * @offs: offset relative to mtd start
4744 struct nand_chip *chip = mtd_to_nand(mtd); in nand_block_isbad() local
4745 int chipnr = (int)(offs >> chip->chip_shift); in nand_block_isbad()
4749 nand_get_device(chip); in nand_block_isbad()
4751 nand_select_target(chip, chipnr); in nand_block_isbad()
4753 ret = nand_block_checkbad(chip, offs, 0); in nand_block_isbad()
4755 nand_deselect_target(chip); in nand_block_isbad()
4756 nand_release_device(chip); in nand_block_isbad()
4762 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
4764 * @ofs: offset relative to mtd start
4782 * nand_suspend - [MTD Interface] Suspend the NAND flash
4789 struct nand_chip *chip = mtd_to_nand(mtd); in nand_suspend() local
4792 mutex_lock(&chip->lock); in nand_suspend()
4793 if (chip->ops.suspend) in nand_suspend()
4794 ret = chip->ops.suspend(chip); in nand_suspend()
4796 chip->suspended = 1; in nand_suspend()
4797 mutex_unlock(&chip->lock); in nand_suspend()
4803 * nand_resume - [MTD Interface] Resume the NAND flash
4808 struct nand_chip *chip = mtd_to_nand(mtd); in nand_resume() local
4810 mutex_lock(&chip->lock); in nand_resume()
4811 if (chip->suspended) { in nand_resume()
4812 if (chip->ops.resume) in nand_resume()
4813 chip->ops.resume(chip); in nand_resume()
4814 chip->suspended = 0; in nand_resume()
4816 pr_err("%s called for a chip which is not in suspended state\n", in nand_resume()
4819 mutex_unlock(&chip->lock); in nand_resume()
4821 wake_up_all(&chip->resume_wq); in nand_resume()
4825 * nand_shutdown - [MTD Interface] Finish the current NAND operation and
4835 * nand_lock - [MTD Interface] Lock the NAND flash
4838 * @len: number of bytes to lock (must be a multiple of block/page size)
4842 struct nand_chip *chip = mtd_to_nand(mtd); in nand_lock() local
4844 if (!chip->ops.lock_area) in nand_lock()
4845 return -ENOTSUPP; in nand_lock()
4847 return chip->ops.lock_area(chip, ofs, len); in nand_lock()
4851 * nand_unlock - [MTD Interface] Unlock the NAND flash
4854 * @len: number of bytes to unlock (must be a multiple of block/page size)
4858 struct nand_chip *chip = mtd_to_nand(mtd); in nand_unlock() local
4860 if (!chip->ops.unlock_area) in nand_unlock()
4861 return -ENOTSUPP; in nand_unlock()
4863 return chip->ops.unlock_area(chip, ofs, len); in nand_unlock()
4867 static void nand_set_defaults(struct nand_chip *chip) in nand_set_defaults() argument
4870 if (!chip->controller) { in nand_set_defaults()
4871 chip->controller = &chip->legacy.dummy_controller; in nand_set_defaults()
4872 nand_controller_init(chip->controller); in nand_set_defaults()
4875 nand_legacy_set_defaults(chip); in nand_set_defaults()
4877 if (!chip->buf_align) in nand_set_defaults()
4878 chip->buf_align = 1; in nand_set_defaults()
4887 s[len - 1] = 0; in sanitize_string()
4890 for (i = 0; i < len - 1; i++) { in sanitize_string()
4900 * nand_id_has_period - Check if an ID string has a given wraparound period
4907 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
4921 * nand_id_len - Get the length of an ID string returned by CMD_READID
4925 * Returns the length of the ID string, according to known wraparound/trailing
4932 /* Find last non-zero byte */ in nand_id_len()
4933 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) in nand_id_len()
4951 if (last_nonzero < arrlen - 1) in nand_id_len()
4970 * chip. The rest of the parameters must be decoded according to generic or
4971 * manufacturer-specific "extended ID" decoding patterns.
4973 void nand_decode_ext_id(struct nand_chip *chip) in nand_decode_ext_id() argument
4976 struct mtd_info *mtd = nand_to_mtd(chip); in nand_decode_ext_id()
4978 u8 *id_data = chip->id.data; in nand_decode_ext_id()
4980 memorg = nanddev_get_memorg(&chip->base); in nand_decode_ext_id()
4983 memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in nand_decode_ext_id()
4988 memorg->pagesize = 1024 << (extid & 0x03); in nand_decode_ext_id()
4989 mtd->writesize = memorg->pagesize; in nand_decode_ext_id()
4992 memorg->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); in nand_decode_ext_id()
4993 mtd->oobsize = memorg->oobsize; in nand_decode_ext_id()
4996 memorg->pages_per_eraseblock = ((64 * 1024) << (extid & 0x03)) / in nand_decode_ext_id()
4997 memorg->pagesize; in nand_decode_ext_id()
4998 mtd->erasesize = (64 * 1024) << (extid & 0x03); in nand_decode_ext_id()
5002 chip->options |= NAND_BUSWIDTH_16; in nand_decode_ext_id()
5007 * Old devices have chip data hardcoded in the device ID table. nand_decode_id
5009 * the chip.
5011 static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type) in nand_decode_id() argument
5013 struct mtd_info *mtd = nand_to_mtd(chip); in nand_decode_id()
5016 memorg = nanddev_get_memorg(&chip->base); in nand_decode_id()
5018 memorg->pages_per_eraseblock = type->erasesize / type->pagesize; in nand_decode_id()
5019 mtd->erasesize = type->erasesize; in nand_decode_id()
5020 memorg->pagesize = type->pagesize; in nand_decode_id()
5021 mtd->writesize = memorg->pagesize; in nand_decode_id()
5022 memorg->oobsize = memorg->pagesize / 32; in nand_decode_id()
5023 mtd->oobsize = memorg->oobsize; in nand_decode_id()
5025 /* All legacy ID NAND are small-page, SLC */ in nand_decode_id()
5026 memorg->bits_per_cell = 1; in nand_decode_id()
5030 * Set the bad block marker/indicator (BBM/BBI) patterns according to some
5032 * page size, cell-type information).
5034 static void nand_decode_bbm_options(struct nand_chip *chip) in nand_decode_bbm_options() argument
5036 struct mtd_info *mtd = nand_to_mtd(chip); in nand_decode_bbm_options()
5039 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) in nand_decode_bbm_options()
5040 chip->badblockpos = NAND_BBM_POS_LARGE; in nand_decode_bbm_options()
5042 chip->badblockpos = NAND_BBM_POS_SMALL; in nand_decode_bbm_options()
5047 return type->id_len; in is_full_id_nand()
5050 static bool find_full_id_nand(struct nand_chip *chip, in find_full_id_nand() argument
5053 struct nand_device *base = &chip->base; in find_full_id_nand()
5055 struct mtd_info *mtd = nand_to_mtd(chip); in find_full_id_nand()
5057 u8 *id_data = chip->id.data; in find_full_id_nand()
5059 memorg = nanddev_get_memorg(&chip->base); in find_full_id_nand()
5061 if (!strncmp(type->id, id_data, type->id_len)) { in find_full_id_nand()
5062 memorg->pagesize = type->pagesize; in find_full_id_nand()
5063 mtd->writesize = memorg->pagesize; in find_full_id_nand()
5064 memorg->pages_per_eraseblock = type->erasesize / in find_full_id_nand()
5065 type->pagesize; in find_full_id_nand()
5066 mtd->erasesize = type->erasesize; in find_full_id_nand()
5067 memorg->oobsize = type->oobsize; in find_full_id_nand()
5068 mtd->oobsize = memorg->oobsize; in find_full_id_nand()
5070 memorg->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in find_full_id_nand()
5071 memorg->eraseblocks_per_lun = in find_full_id_nand()
5072 DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20, in find_full_id_nand()
5073 memorg->pagesize * in find_full_id_nand()
5074 memorg->pages_per_eraseblock); in find_full_id_nand()
5075 chip->options |= type->options; in find_full_id_nand()
5080 chip->parameters.model = kstrdup(type->name, GFP_KERNEL); in find_full_id_nand()
5081 if (!chip->parameters.model) in find_full_id_nand()
5091 * compliant and does not have a full-id or legacy-id entry in the nand_ids
5094 static void nand_manufacturer_detect(struct nand_chip *chip) in nand_manufacturer_detect() argument
5100 if (chip->manufacturer.desc && chip->manufacturer.desc->ops && in nand_manufacturer_detect()
5101 chip->manufacturer.desc->ops->detect) { in nand_manufacturer_detect()
5104 memorg = nanddev_get_memorg(&chip->base); in nand_manufacturer_detect()
5107 memorg->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); in nand_manufacturer_detect()
5108 chip->manufacturer.desc->ops->detect(chip); in nand_manufacturer_detect()
5110 nand_decode_ext_id(chip); in nand_manufacturer_detect()
5118 * their ->init() hook.
5120 static int nand_manufacturer_init(struct nand_chip *chip) in nand_manufacturer_init() argument
5122 if (!chip->manufacturer.desc || !chip->manufacturer.desc->ops || in nand_manufacturer_init()
5123 !chip->manufacturer.desc->ops->init) in nand_manufacturer_init()
5126 return chip->manufacturer.desc->ops->init(chip); in nand_manufacturer_init()
5133 * ->cleanup() hook.
5135 static void nand_manufacturer_cleanup(struct nand_chip *chip) in nand_manufacturer_cleanup() argument
5138 if (chip->manufacturer.desc && chip->manufacturer.desc->ops && in nand_manufacturer_cleanup()
5139 chip->manufacturer.desc->ops->cleanup) in nand_manufacturer_cleanup()
5140 chip->manufacturer.desc->ops->cleanup(chip); in nand_manufacturer_cleanup()
5146 return manufacturer_desc ? manufacturer_desc->name : "Unknown"; in nand_manufacturer_name()
5149 static void rawnand_check_data_only_read_support(struct nand_chip *chip) in rawnand_check_data_only_read_support() argument
5152 if (!nand_read_data_op(chip, NULL, SZ_512, true, true)) in rawnand_check_data_only_read_support()
5153 chip->controller->supported_op.data_only_read = 1; in rawnand_check_data_only_read_support()
5156 static void rawnand_early_check_supported_ops(struct nand_chip *chip) in rawnand_early_check_supported_ops() argument
5159 WARN_ON_ONCE(chip->controller->supported_op.data_only_read); in rawnand_early_check_supported_ops()
5161 if (!nand_has_exec_op(chip)) in rawnand_early_check_supported_ops()
5164 rawnand_check_data_only_read_support(chip); in rawnand_early_check_supported_ops()
5167 static void rawnand_check_cont_read_support(struct nand_chip *chip) in rawnand_check_cont_read_support() argument
5169 struct mtd_info *mtd = nand_to_mtd(chip); in rawnand_check_cont_read_support()
5171 if (!chip->parameters.supports_read_cache) in rawnand_check_cont_read_support()
5174 if (chip->read_retries) in rawnand_check_cont_read_support()
5177 if (!nand_lp_exec_cont_read_page_op(chip, 0, 0, NULL, in rawnand_check_cont_read_support()
5178 mtd->writesize, true)) in rawnand_check_cont_read_support()
5179 chip->controller->supported_op.cont_read = 1; in rawnand_check_cont_read_support()
5182 static void rawnand_late_check_supported_ops(struct nand_chip *chip) in rawnand_late_check_supported_ops() argument
5185 WARN_ON_ONCE(chip->controller->supported_op.cont_read); in rawnand_late_check_supported_ops()
5188 * Too many devices do not support sequential cached reads with on-die in rawnand_late_check_supported_ops()
5189 * ECC correction enabled, so in this case refuse to perform the in rawnand_late_check_supported_ops()
5192 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE) in rawnand_late_check_supported_ops()
5195 if (!nand_has_exec_op(chip)) in rawnand_late_check_supported_ops()
5198 rawnand_check_cont_read_support(chip); in rawnand_late_check_supported_ops()
5204 static int nand_detect(struct nand_chip *chip, struct nand_flash_dev *type) in nand_detect() argument
5207 struct mtd_info *mtd = nand_to_mtd(chip); in nand_detect()
5210 u8 *id_data = chip->id.data; in nand_detect()
5216 * unassigned by the ID-based detection logic. in nand_detect()
5218 memorg = nanddev_get_memorg(&chip->base); in nand_detect()
5219 memorg->planes_per_lun = 1; in nand_detect()
5220 memorg->luns_per_target = 1; in nand_detect()
5223 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) in nand_detect()
5224 * after power-up. in nand_detect()
5226 ret = nand_reset(chip, 0); in nand_detect()
5231 nand_select_target(chip, 0); in nand_detect()
5233 rawnand_early_check_supported_ops(chip); in nand_detect()
5236 ret = nand_readid_op(chip, 0, id_data, 2); in nand_detect()
5245 * Try again to make sure, as some systems the bus-hold or other in nand_detect()
5247 * possibly credible NAND flash to appear. If the two results do in nand_detect()
5252 ret = nand_readid_op(chip, 0, id_data, sizeof(chip->id.data)); in nand_detect()
5259 return -ENODEV; in nand_detect()
5262 chip->id.len = nand_id_len(id_data, ARRAY_SIZE(chip->id.data)); in nand_detect()
5264 /* Try to identify manufacturer */ in nand_detect()
5266 chip->manufacturer.desc = manufacturer_desc; in nand_detect()
5272 * Save the NAND_BUSWIDTH_16 flag before letting auto-detection logic in nand_detect()
5274 * This is required to make sure initial NAND bus width set by the in nand_detect()
5276 * (extracted by auto-detection code). in nand_detect()
5278 busw = chip->options & NAND_BUSWIDTH_16; in nand_detect()
5281 * The flag is only set (never cleared), reset it to its default value in nand_detect()
5282 * before starting auto-detection. in nand_detect()
5284 chip->options &= ~NAND_BUSWIDTH_16; in nand_detect()
5286 for (; type->name != NULL; type++) { in nand_detect()
5288 if (find_full_id_nand(chip, type)) in nand_detect()
5290 } else if (dev_id == type->dev_id) { in nand_detect()
5295 if (!type->name || !type->pagesize) { in nand_detect()
5296 /* Check if the chip is ONFI compliant */ in nand_detect()
5297 ret = nand_onfi_detect(chip); in nand_detect()
5303 /* Check if the chip is JEDEC compliant */ in nand_detect()
5304 ret = nand_jedec_detect(chip); in nand_detect()
5311 if (!type->name) in nand_detect()
5312 return -ENODEV; in nand_detect()
5314 chip->parameters.model = kstrdup(type->name, GFP_KERNEL); in nand_detect()
5315 if (!chip->parameters.model) in nand_detect()
5316 return -ENOMEM; in nand_detect()
5318 if (!type->pagesize) in nand_detect()
5319 nand_manufacturer_detect(chip); in nand_detect()
5321 nand_decode_id(chip, type); in nand_detect()
5323 /* Get chip options */ in nand_detect()
5324 chip->options |= type->options; in nand_detect()
5326 memorg->eraseblocks_per_lun = in nand_detect()
5327 DIV_ROUND_DOWN_ULL((u64)type->chipsize << 20, in nand_detect()
5328 memorg->pagesize * in nand_detect()
5329 memorg->pages_per_eraseblock); in nand_detect()
5332 if (!mtd->name) in nand_detect()
5333 mtd->name = chip->parameters.model; in nand_detect()
5335 if (chip->options & NAND_BUSWIDTH_AUTO) { in nand_detect()
5337 nand_set_defaults(chip); in nand_detect()
5338 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { in nand_detect()
5341 * chip correct! in nand_detect()
5343 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", in nand_detect()
5346 mtd->name); in nand_detect()
5348 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8); in nand_detect()
5349 ret = -EINVAL; in nand_detect()
5354 nand_decode_bbm_options(chip); in nand_detect()
5357 chip->page_shift = ffs(mtd->writesize) - 1; in nand_detect()
5358 /* Convert chipsize to number of pages per chip -1 */ in nand_detect()
5359 targetsize = nanddev_target_size(&chip->base); in nand_detect()
5360 chip->pagemask = (targetsize >> chip->page_shift) - 1; in nand_detect()
5362 chip->bbt_erase_shift = chip->phys_erase_shift = in nand_detect()
5363 ffs(mtd->erasesize) - 1; in nand_detect()
5365 chip->chip_shift = ffs((unsigned)targetsize) - 1; in nand_detect()
5367 chip->chip_shift = ffs((unsigned)(targetsize >> 32)); in nand_detect()
5368 chip->chip_shift += 32 - 1; in nand_detect()
5371 if (chip->chip_shift - chip->page_shift > 16) in nand_detect()
5372 chip->options |= NAND_ROW_ADDR_3; in nand_detect()
5374 chip->badblockbits = 8; in nand_detect()
5376 nand_legacy_adjust_cmdfunc(chip); in nand_detect()
5378 pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", in nand_detect()
5381 chip->parameters.model); in nand_detect()
5383 (int)(targetsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", in nand_detect()
5384 mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); in nand_detect()
5388 kfree(chip->parameters.model); in nand_detect()
5411 [NAND_ECC_ON_DIE] = "on-die", in of_get_rawnand_ecc_engine_type_legacy()
5417 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_engine_type_legacy()
5450 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_placement_legacy()
5464 err = of_property_read_string(np, "nand-ecc-mode", &pm); in of_get_rawnand_ecc_algo_legacy()
5475 static void of_get_nand_ecc_legacy_user_config(struct nand_chip *chip) in of_get_nand_ecc_legacy_user_config() argument
5477 struct device_node *dn = nand_get_flash_node(chip); in of_get_nand_ecc_legacy_user_config()
5478 struct nand_ecc_props *user_conf = &chip->base.ecc.user_conf; in of_get_nand_ecc_legacy_user_config()
5480 if (user_conf->engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in of_get_nand_ecc_legacy_user_config()
5481 user_conf->engine_type = of_get_rawnand_ecc_engine_type_legacy(dn); in of_get_nand_ecc_legacy_user_config()
5483 if (user_conf->algo == NAND_ECC_ALGO_UNKNOWN) in of_get_nand_ecc_legacy_user_config()
5484 user_conf->algo = of_get_rawnand_ecc_algo_legacy(dn); in of_get_nand_ecc_legacy_user_config()
5486 if (user_conf->placement == NAND_ECC_PLACEMENT_UNKNOWN) in of_get_nand_ecc_legacy_user_config()
5487 user_conf->placement = of_get_rawnand_ecc_placement_legacy(dn); in of_get_nand_ecc_legacy_user_config()
5490 static int of_get_nand_bus_width(struct nand_chip *chip) in of_get_nand_bus_width() argument
5492 struct device_node *dn = nand_get_flash_node(chip); in of_get_nand_bus_width()
5496 ret = of_property_read_u32(dn, "nand-bus-width", &val); in of_get_nand_bus_width()
5497 if (ret == -EINVAL) in of_get_nand_bus_width()
5498 /* Buswidth defaults to 8 if the property does not exist .*/ in of_get_nand_bus_width()
5504 chip->options |= NAND_BUSWIDTH_16; in of_get_nand_bus_width()
5506 return -EINVAL; in of_get_nand_bus_width()
5510 static int of_get_nand_secure_regions(struct nand_chip *chip) in of_get_nand_secure_regions() argument
5512 struct device_node *dn = nand_get_flash_node(chip); in of_get_nand_secure_regions()
5516 /* Only proceed if the "secure-regions" property is present in DT */ in of_get_nand_secure_regions()
5517 prop = of_find_property(dn, "secure-regions", NULL); in of_get_nand_secure_regions()
5521 nr_elem = of_property_count_elems_of_size(dn, "secure-regions", sizeof(u64)); in of_get_nand_secure_regions()
5525 chip->nr_secure_regions = nr_elem / 2; in of_get_nand_secure_regions()
5526 chip->secure_regions = kcalloc(chip->nr_secure_regions, sizeof(*chip->secure_regions), in of_get_nand_secure_regions()
5528 if (!chip->secure_regions) in of_get_nand_secure_regions()
5529 return -ENOMEM; in of_get_nand_secure_regions()
5531 for (i = 0, j = 0; i < chip->nr_secure_regions; i++, j += 2) { in of_get_nand_secure_regions()
5532 of_property_read_u64_index(dn, "secure-regions", j, in of_get_nand_secure_regions()
5533 &chip->secure_regions[i].offset); in of_get_nand_secure_regions()
5534 of_property_read_u64_index(dn, "secure-regions", j + 1, in of_get_nand_secure_regions()
5535 &chip->secure_regions[i].size); in of_get_nand_secure_regions()
5542 * rawnand_dt_parse_gpio_cs - Parse the gpio-cs property of a controller
5556 dev_dbg(dev, "No valid cs-gpios property\n"); in rawnand_dt_parse_gpio_cs()
5562 return -ENOMEM; in rawnand_dt_parse_gpio_cs()
5578 static int rawnand_dt_init(struct nand_chip *chip) in rawnand_dt_init() argument
5580 struct nand_device *nand = mtd_to_nanddev(nand_to_mtd(chip)); in rawnand_dt_init()
5581 struct device_node *dn = nand_get_flash_node(chip); in rawnand_dt_init()
5587 ret = of_get_nand_bus_width(chip); in rawnand_dt_init()
5591 if (of_property_read_bool(dn, "nand-is-boot-medium")) in rawnand_dt_init()
5592 chip->options |= NAND_IS_BOOT_MEDIUM; in rawnand_dt_init()
5594 if (of_property_read_bool(dn, "nand-on-flash-bbt")) in rawnand_dt_init()
5595 chip->bbt_options |= NAND_BBT_USE_FLASH; in rawnand_dt_init()
5598 of_get_nand_ecc_legacy_user_config(chip); in rawnand_dt_init()
5602 * ECC engine type, we will default to NAND_ECC_ENGINE_TYPE_ON_HOST. in rawnand_dt_init()
5604 nand->ecc.defaults.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST; in rawnand_dt_init()
5608 * case default to the NAND controller choice, otherwise fallback to in rawnand_dt_init()
5611 if (nand->ecc.user_conf.engine_type != NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5612 chip->ecc.engine_type = nand->ecc.user_conf.engine_type; in rawnand_dt_init()
5613 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_INVALID) in rawnand_dt_init()
5614 chip->ecc.engine_type = nand->ecc.defaults.engine_type; in rawnand_dt_init()
5616 chip->ecc.placement = nand->ecc.user_conf.placement; in rawnand_dt_init()
5617 chip->ecc.algo = nand->ecc.user_conf.algo; in rawnand_dt_init()
5618 chip->ecc.strength = nand->ecc.user_conf.strength; in rawnand_dt_init()
5619 chip->ecc.size = nand->ecc.user_conf.step_size; in rawnand_dt_init()
5625 * nand_scan_ident - Scan for the NAND device
5626 * @chip: NAND chip object
5627 * @maxchips: number of chips to scan for
5633 * This helper used to be called directly from controller drivers that needed
5634 * to tweak some ECC-related parameters before nand_scan_tail(). This separation
5636 * as been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
5638 static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips, in nand_scan_ident() argument
5641 struct mtd_info *mtd = nand_to_mtd(chip); in nand_scan_ident()
5647 memorg = nanddev_get_memorg(&chip->base); in nand_scan_ident()
5650 chip->cur_cs = -1; in nand_scan_ident()
5652 mutex_init(&chip->lock); in nand_scan_ident()
5653 init_waitqueue_head(&chip->resume_wq); in nand_scan_ident()
5656 chip->current_interface_config = nand_get_reset_interface_config(); in nand_scan_ident()
5658 ret = rawnand_dt_init(chip); in nand_scan_ident()
5662 if (!mtd->name && mtd->dev.parent) in nand_scan_ident()
5663 mtd->name = dev_name(mtd->dev.parent); in nand_scan_ident()
5666 nand_set_defaults(chip); in nand_scan_ident()
5668 ret = nand_legacy_check_hooks(chip); in nand_scan_ident()
5672 memorg->ntargets = maxchips; in nand_scan_ident()
5675 ret = nand_detect(chip, table); in nand_scan_ident()
5677 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) in nand_scan_ident()
5679 nand_deselect_target(chip); in nand_scan_ident()
5683 nand_maf_id = chip->id.data[0]; in nand_scan_ident()
5684 nand_dev_id = chip->id.data[1]; in nand_scan_ident()
5686 nand_deselect_target(chip); in nand_scan_ident()
5688 /* Check for a chip array */ in nand_scan_ident()
5693 ret = nand_reset(chip, i); in nand_scan_ident()
5697 nand_select_target(chip, i); in nand_scan_ident()
5699 ret = nand_readid_op(chip, 0, id, sizeof(id)); in nand_scan_ident()
5704 nand_deselect_target(chip); in nand_scan_ident()
5707 nand_deselect_target(chip); in nand_scan_ident()
5713 memorg->ntargets = i; in nand_scan_ident()
5714 mtd->size = i * nanddev_target_size(&chip->base); in nand_scan_ident()
5719 static void nand_scan_ident_cleanup(struct nand_chip *chip) in nand_scan_ident_cleanup() argument
5721 kfree(chip->parameters.model); in nand_scan_ident_cleanup()
5722 kfree(chip->parameters.onfi); in nand_scan_ident_cleanup()
5725 int rawnand_sw_hamming_init(struct nand_chip *chip) in rawnand_sw_hamming_init() argument
5728 struct nand_device *base = &chip->base; in rawnand_sw_hamming_init()
5731 base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in rawnand_sw_hamming_init()
5732 base->ecc.user_conf.algo = NAND_ECC_ALGO_HAMMING; in rawnand_sw_hamming_init()
5733 base->ecc.user_conf.strength = chip->ecc.strength; in rawnand_sw_hamming_init()
5734 base->ecc.user_conf.step_size = chip->ecc.size; in rawnand_sw_hamming_init()
5740 engine_conf = base->ecc.ctx.priv; in rawnand_sw_hamming_init()
5742 if (chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER) in rawnand_sw_hamming_init()
5743 engine_conf->sm_order = true; in rawnand_sw_hamming_init()
5745 chip->ecc.size = base->ecc.ctx.conf.step_size; in rawnand_sw_hamming_init()
5746 chip->ecc.strength = base->ecc.ctx.conf.strength; in rawnand_sw_hamming_init()
5747 chip->ecc.total = base->ecc.ctx.total; in rawnand_sw_hamming_init()
5748 chip->ecc.steps = nanddev_get_ecc_nsteps(base); in rawnand_sw_hamming_init()
5749 chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base); in rawnand_sw_hamming_init()
5755 int rawnand_sw_hamming_calculate(struct nand_chip *chip, in rawnand_sw_hamming_calculate() argument
5759 struct nand_device *base = &chip->base; in rawnand_sw_hamming_calculate()
5765 int rawnand_sw_hamming_correct(struct nand_chip *chip, in rawnand_sw_hamming_correct() argument
5770 struct nand_device *base = &chip->base; in rawnand_sw_hamming_correct()
5776 void rawnand_sw_hamming_cleanup(struct nand_chip *chip) in rawnand_sw_hamming_cleanup() argument
5778 struct nand_device *base = &chip->base; in rawnand_sw_hamming_cleanup()
5784 int rawnand_sw_bch_init(struct nand_chip *chip) in rawnand_sw_bch_init() argument
5786 struct nand_device *base = &chip->base; in rawnand_sw_bch_init()
5790 base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in rawnand_sw_bch_init()
5791 base->ecc.user_conf.algo = NAND_ECC_ALGO_BCH; in rawnand_sw_bch_init()
5792 base->ecc.user_conf.step_size = chip->ecc.size; in rawnand_sw_bch_init()
5793 base->ecc.user_conf.strength = chip->ecc.strength; in rawnand_sw_bch_init()
5799 chip->ecc.size = ecc_conf->step_size; in rawnand_sw_bch_init()
5800 chip->ecc.strength = ecc_conf->strength; in rawnand_sw_bch_init()
5801 chip->ecc.total = base->ecc.ctx.total; in rawnand_sw_bch_init()
5802 chip->ecc.steps = nanddev_get_ecc_nsteps(base); in rawnand_sw_bch_init()
5803 chip->ecc.bytes = base->ecc.ctx.total / nanddev_get_ecc_nsteps(base); in rawnand_sw_bch_init()
5809 static int rawnand_sw_bch_calculate(struct nand_chip *chip, in rawnand_sw_bch_calculate() argument
5813 struct nand_device *base = &chip->base; in rawnand_sw_bch_calculate()
5818 int rawnand_sw_bch_correct(struct nand_chip *chip, unsigned char *buf, in rawnand_sw_bch_correct() argument
5821 struct nand_device *base = &chip->base; in rawnand_sw_bch_correct()
5827 void rawnand_sw_bch_cleanup(struct nand_chip *chip) in rawnand_sw_bch_cleanup() argument
5829 struct nand_device *base = &chip->base; in rawnand_sw_bch_cleanup()
5835 static int nand_set_ecc_on_host_ops(struct nand_chip *chip) in nand_set_ecc_on_host_ops() argument
5837 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_on_host_ops()
5839 switch (ecc->placement) { in nand_set_ecc_on_host_ops()
5843 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5844 ecc->read_page = nand_read_page_hwecc; in nand_set_ecc_on_host_ops()
5845 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5846 ecc->write_page = nand_write_page_hwecc; in nand_set_ecc_on_host_ops()
5847 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5848 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_on_host_ops()
5849 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5850 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_on_host_ops()
5851 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5852 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_on_host_ops()
5853 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5854 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_on_host_ops()
5855 if (!ecc->read_subpage) in nand_set_ecc_on_host_ops()
5856 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_on_host_ops()
5857 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) in nand_set_ecc_on_host_ops()
5858 ecc->write_subpage = nand_write_subpage_hwecc; in nand_set_ecc_on_host_ops()
5862 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && in nand_set_ecc_on_host_ops()
5863 (!ecc->read_page || in nand_set_ecc_on_host_ops()
5864 ecc->read_page == nand_read_page_hwecc || in nand_set_ecc_on_host_ops()
5865 !ecc->write_page || in nand_set_ecc_on_host_ops()
5866 ecc->write_page == nand_write_page_hwecc)) { in nand_set_ecc_on_host_ops()
5868 return -EINVAL; in nand_set_ecc_on_host_ops()
5871 if (!ecc->read_page) in nand_set_ecc_on_host_ops()
5872 ecc->read_page = nand_read_page_syndrome; in nand_set_ecc_on_host_ops()
5873 if (!ecc->write_page) in nand_set_ecc_on_host_ops()
5874 ecc->write_page = nand_write_page_syndrome; in nand_set_ecc_on_host_ops()
5875 if (!ecc->read_page_raw) in nand_set_ecc_on_host_ops()
5876 ecc->read_page_raw = nand_read_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5877 if (!ecc->write_page_raw) in nand_set_ecc_on_host_ops()
5878 ecc->write_page_raw = nand_write_page_raw_syndrome; in nand_set_ecc_on_host_ops()
5879 if (!ecc->read_oob) in nand_set_ecc_on_host_ops()
5880 ecc->read_oob = nand_read_oob_syndrome; in nand_set_ecc_on_host_ops()
5881 if (!ecc->write_oob) in nand_set_ecc_on_host_ops()
5882 ecc->write_oob = nand_write_oob_syndrome; in nand_set_ecc_on_host_ops()
5887 ecc->placement); in nand_set_ecc_on_host_ops()
5888 return -EINVAL; in nand_set_ecc_on_host_ops()
5894 static int nand_set_ecc_soft_ops(struct nand_chip *chip) in nand_set_ecc_soft_ops() argument
5896 struct mtd_info *mtd = nand_to_mtd(chip); in nand_set_ecc_soft_ops()
5898 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_set_ecc_soft_ops()
5901 if (WARN_ON(ecc->engine_type != NAND_ECC_ENGINE_TYPE_SOFT)) in nand_set_ecc_soft_ops()
5902 return -EINVAL; in nand_set_ecc_soft_ops()
5904 switch (ecc->algo) { in nand_set_ecc_soft_ops()
5906 ecc->calculate = rawnand_sw_hamming_calculate; in nand_set_ecc_soft_ops()
5907 ecc->correct = rawnand_sw_hamming_correct; in nand_set_ecc_soft_ops()
5908 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5909 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5910 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5911 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5912 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5913 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5914 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5915 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5916 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5917 if (!ecc->size) in nand_set_ecc_soft_ops()
5918 ecc->size = 256; in nand_set_ecc_soft_ops()
5919 ecc->bytes = 3; in nand_set_ecc_soft_ops()
5920 ecc->strength = 1; in nand_set_ecc_soft_ops()
5923 ecc->options |= NAND_ECC_SOFT_HAMMING_SM_ORDER; in nand_set_ecc_soft_ops()
5925 ret = rawnand_sw_hamming_init(chip); in nand_set_ecc_soft_ops()
5935 return -EINVAL; in nand_set_ecc_soft_ops()
5937 ecc->calculate = rawnand_sw_bch_calculate; in nand_set_ecc_soft_ops()
5938 ecc->correct = rawnand_sw_bch_correct; in nand_set_ecc_soft_ops()
5939 ecc->read_page = nand_read_page_swecc; in nand_set_ecc_soft_ops()
5940 ecc->read_subpage = nand_read_subpage; in nand_set_ecc_soft_ops()
5941 ecc->write_page = nand_write_page_swecc; in nand_set_ecc_soft_ops()
5942 if (!ecc->read_page_raw) in nand_set_ecc_soft_ops()
5943 ecc->read_page_raw = nand_read_page_raw; in nand_set_ecc_soft_ops()
5944 if (!ecc->write_page_raw) in nand_set_ecc_soft_ops()
5945 ecc->write_page_raw = nand_write_page_raw; in nand_set_ecc_soft_ops()
5946 ecc->read_oob = nand_read_oob_std; in nand_set_ecc_soft_ops()
5947 ecc->write_oob = nand_write_oob_std; in nand_set_ecc_soft_ops()
5954 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH && in nand_set_ecc_soft_ops()
5955 mtd->ooblayout != nand_get_large_page_ooblayout()) in nand_set_ecc_soft_ops()
5956 nanddev->ecc.user_conf.flags &= ~NAND_ECC_MAXIMIZE_STRENGTH; in nand_set_ecc_soft_ops()
5958 ret = rawnand_sw_bch_init(chip); in nand_set_ecc_soft_ops()
5967 return -EINVAL; in nand_set_ecc_soft_ops()
5972 * nand_check_ecc_caps - check the sanity of preset ECC settings
5973 * @chip: nand chip info structure
5978 * by the controller and the calculated ECC bytes fit within the chip's OOB.
5982 nand_check_ecc_caps(struct nand_chip *chip, in nand_check_ecc_caps() argument
5985 struct mtd_info *mtd = nand_to_mtd(chip); in nand_check_ecc_caps()
5987 int preset_step = chip->ecc.size; in nand_check_ecc_caps()
5988 int preset_strength = chip->ecc.strength; in nand_check_ecc_caps()
5989 int ecc_bytes, nsteps = mtd->writesize / preset_step; in nand_check_ecc_caps()
5992 for (i = 0; i < caps->nstepinfos; i++) { in nand_check_ecc_caps()
5993 stepinfo = &caps->stepinfos[i]; in nand_check_ecc_caps()
5995 if (stepinfo->stepsize != preset_step) in nand_check_ecc_caps()
5998 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_check_ecc_caps()
5999 if (stepinfo->strengths[j] != preset_strength) in nand_check_ecc_caps()
6002 ecc_bytes = caps->calc_ecc_bytes(preset_step, in nand_check_ecc_caps()
6010 return -ENOSPC; in nand_check_ecc_caps()
6013 chip->ecc.bytes = ecc_bytes; in nand_check_ecc_caps()
6022 return -ENOTSUPP; in nand_check_ecc_caps()
6026 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
6027 * @chip: nand chip info structure
6031 * If a chip's ECC requirement is provided, try to meet it with the least
6032 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
6036 nand_match_ecc_req(struct nand_chip *chip, in nand_match_ecc_req() argument
6040 nanddev_get_ecc_requirements(&chip->base); in nand_match_ecc_req()
6041 struct mtd_info *mtd = nand_to_mtd(chip); in nand_match_ecc_req()
6043 int req_step = requirements->step_size; in nand_match_ecc_req()
6044 int req_strength = requirements->strength; in nand_match_ecc_req()
6050 /* No information provided by the NAND chip */ in nand_match_ecc_req()
6052 return -ENOTSUPP; in nand_match_ecc_req()
6054 /* number of correctable bits the chip requires in a page */ in nand_match_ecc_req()
6055 req_corr = mtd->writesize / req_step * req_strength; in nand_match_ecc_req()
6057 for (i = 0; i < caps->nstepinfos; i++) { in nand_match_ecc_req()
6058 stepinfo = &caps->stepinfos[i]; in nand_match_ecc_req()
6059 step_size = stepinfo->stepsize; in nand_match_ecc_req()
6061 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_match_ecc_req()
6062 strength = stepinfo->strengths[j]; in nand_match_ecc_req()
6066 * chip's requirement, it is not easy to compare the in nand_match_ecc_req()
6072 if (mtd->writesize % step_size) in nand_match_ecc_req()
6075 nsteps = mtd->writesize / step_size; in nand_match_ecc_req()
6077 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_match_ecc_req()
6087 * We assume the best is to meet the chip's requrement in nand_match_ecc_req()
6100 return -ENOTSUPP; in nand_match_ecc_req()
6102 chip->ecc.size = best_step; in nand_match_ecc_req()
6103 chip->ecc.strength = best_strength; in nand_match_ecc_req()
6104 chip->ecc.bytes = best_ecc_bytes; in nand_match_ecc_req()
6110 * nand_maximize_ecc - choose the max ECC strength available
6111 * @chip: nand chip info structure
6116 * within the chip's OOB. On success, the chosen ECC settings are set.
6119 nand_maximize_ecc(struct nand_chip *chip, in nand_maximize_ecc() argument
6122 struct mtd_info *mtd = nand_to_mtd(chip); in nand_maximize_ecc()
6130 for (i = 0; i < caps->nstepinfos; i++) { in nand_maximize_ecc()
6131 stepinfo = &caps->stepinfos[i]; in nand_maximize_ecc()
6132 step_size = stepinfo->stepsize; in nand_maximize_ecc()
6134 /* If chip->ecc.size is already set, respect it */ in nand_maximize_ecc()
6135 if (chip->ecc.size && step_size != chip->ecc.size) in nand_maximize_ecc()
6138 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_maximize_ecc()
6139 strength = stepinfo->strengths[j]; in nand_maximize_ecc()
6141 if (mtd->writesize % step_size) in nand_maximize_ecc()
6144 nsteps = mtd->writesize / step_size; in nand_maximize_ecc()
6146 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_maximize_ecc()
6170 return -ENOTSUPP; in nand_maximize_ecc()
6172 chip->ecc.size = best_step; in nand_maximize_ecc()
6173 chip->ecc.strength = best_strength; in nand_maximize_ecc()
6174 chip->ecc.bytes = best_ecc_bytes; in nand_maximize_ecc()
6180 * nand_ecc_choose_conf - Set the ECC strength and ECC step size
6181 * @chip: nand chip info structure
6185 * Choose the ECC configuration according to following logic.
6189 * 2. If the user provided the nand-ecc-maximize property, then select maximum
6191 * 3. Otherwise, try to match the ECC step size and ECC strength closest
6192 * to the chip's requirement. If available OOB size can't fit the chip
6193 * requirement then fallback to the maximum ECC step size and ECC strength.
6197 int nand_ecc_choose_conf(struct nand_chip *chip, in nand_ecc_choose_conf() argument
6200 struct mtd_info *mtd = nand_to_mtd(chip); in nand_ecc_choose_conf()
6203 if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize)) in nand_ecc_choose_conf()
6204 return -EINVAL; in nand_ecc_choose_conf()
6206 if (chip->ecc.size && chip->ecc.strength) in nand_ecc_choose_conf()
6207 return nand_check_ecc_caps(chip, caps, oobavail); in nand_ecc_choose_conf()
6209 if (nanddev->ecc.user_conf.flags & NAND_ECC_MAXIMIZE_STRENGTH) in nand_ecc_choose_conf()
6210 return nand_maximize_ecc(chip, caps, oobavail); in nand_ecc_choose_conf()
6212 if (!nand_match_ecc_req(chip, caps, oobavail)) in nand_ecc_choose_conf()
6215 return nand_maximize_ecc(chip, caps, oobavail); in nand_ecc_choose_conf()
6221 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_erase() local
6226 eb >>= nand->rowconv.eraseblock_addr_shift; in rawnand_erase()
6228 nand_select_target(chip, pos->target); in rawnand_erase()
6229 ret = nand_erase_op(chip, eb); in rawnand_erase()
6230 nand_deselect_target(chip); in rawnand_erase()
6238 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_markbad() local
6241 return nand_markbad_bbm(chip, nanddev_pos_to_offs(nand, pos)); in rawnand_markbad()
6246 struct nand_chip *chip = container_of(nand, struct nand_chip, in rawnand_isbad() local
6250 nand_select_target(chip, pos->target); in rawnand_isbad()
6251 ret = nand_isbad_bbm(chip, nanddev_pos_to_offs(nand, pos)); in rawnand_isbad()
6252 nand_deselect_target(chip); in rawnand_isbad()
6264 * nand_scan_tail - Scan for the NAND device
6265 * @chip: NAND chip object
6271 static int nand_scan_tail(struct nand_chip *chip) in nand_scan_tail() argument
6273 struct mtd_info *mtd = nand_to_mtd(chip); in nand_scan_tail()
6274 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_scan_tail()
6277 /* New bad blocks should be marked in OOB, flash-based BBT, or both */ in nand_scan_tail()
6278 if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && in nand_scan_tail()
6279 !(chip->bbt_options & NAND_BBT_USE_FLASH))) { in nand_scan_tail()
6280 return -EINVAL; in nand_scan_tail()
6283 chip->data_buf = kmalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6284 if (!chip->data_buf) in nand_scan_tail()
6285 return -ENOMEM; in nand_scan_tail()
6288 * FIXME: some NAND manufacturer drivers expect the first die to be in nand_scan_tail()
6289 * selected when manufacturer->init() is called. They should be fixed in nand_scan_tail()
6290 * to explictly select the relevant die when interacting with the NAND in nand_scan_tail()
6291 * chip. in nand_scan_tail()
6293 nand_select_target(chip, 0); in nand_scan_tail()
6294 ret = nand_manufacturer_init(chip); in nand_scan_tail()
6295 nand_deselect_target(chip); in nand_scan_tail()
6300 chip->oob_poi = chip->data_buf + mtd->writesize; in nand_scan_tail()
6305 if (!mtd->ooblayout && in nand_scan_tail()
6306 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
6307 ecc->algo == NAND_ECC_ALGO_BCH) && in nand_scan_tail()
6308 !(ecc->engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in nand_scan_tail()
6309 ecc->algo == NAND_ECC_ALGO_HAMMING)) { in nand_scan_tail()
6310 switch (mtd->oobsize) { in nand_scan_tail()
6322 * Expose the whole OOB area to users if ECC_NONE in nand_scan_tail()
6324 * ->oobsize, but we must keep the old large/small in nand_scan_tail()
6325 * page with ECC layout when ->oobsize <= 128 for in nand_scan_tail()
6328 if (ecc->engine_type == NAND_ECC_ENGINE_TYPE_NONE) { in nand_scan_tail()
6335 mtd->oobsize); in nand_scan_tail()
6336 ret = -EINVAL; in nand_scan_tail()
6342 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
6343 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
6346 switch (ecc->engine_type) { in nand_scan_tail()
6348 ret = nand_set_ecc_on_host_ops(chip); in nand_scan_tail()
6352 if (mtd->writesize >= ecc->size) { in nand_scan_tail()
6353 if (!ecc->strength) { in nand_scan_tail()
6355 ret = -EINVAL; in nand_scan_tail()
6360 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", in nand_scan_tail()
6361 ecc->size, mtd->writesize); in nand_scan_tail()
6362 ecc->engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in nand_scan_tail()
6363 ecc->algo = NAND_ECC_ALGO_HAMMING; in nand_scan_tail()
6367 ret = nand_set_ecc_soft_ops(chip); in nand_scan_tail()
6373 if (!ecc->read_page || !ecc->write_page) { in nand_scan_tail()
6374 WARN(1, "No ECC functions supplied; on-die ECC not possible\n"); in nand_scan_tail()
6375 ret = -EINVAL; in nand_scan_tail()
6378 if (!ecc->read_oob) in nand_scan_tail()
6379 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
6380 if (!ecc->write_oob) in nand_scan_tail()
6381 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
6386 ecc->read_page = nand_read_page_raw; in nand_scan_tail()
6387 ecc->write_page = nand_write_page_raw; in nand_scan_tail()
6388 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
6389 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
6390 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
6391 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
6392 ecc->size = mtd->writesize; in nand_scan_tail()
6393 ecc->bytes = 0; in nand_scan_tail()
6394 ecc->strength = 0; in nand_scan_tail()
6398 WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->engine_type); in nand_scan_tail()
6399 ret = -EINVAL; in nand_scan_tail()
6403 if (ecc->correct || ecc->calculate) { in nand_scan_tail()
6404 ecc->calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6405 ecc->code_buf = kmalloc(mtd->oobsize, GFP_KERNEL); in nand_scan_tail()
6406 if (!ecc->calc_buf || !ecc->code_buf) { in nand_scan_tail()
6407 ret = -ENOMEM; in nand_scan_tail()
6413 if (!ecc->read_oob_raw) in nand_scan_tail()
6414 ecc->read_oob_raw = ecc->read_oob; in nand_scan_tail()
6415 if (!ecc->write_oob_raw) in nand_scan_tail()
6416 ecc->write_oob_raw = ecc->write_oob; in nand_scan_tail()
6418 /* propagate ecc info to mtd_info */ in nand_scan_tail()
6419 mtd->ecc_strength = ecc->strength; in nand_scan_tail()
6420 mtd->ecc_step_size = ecc->size; in nand_scan_tail()
6426 if (!ecc->steps) in nand_scan_tail()
6427 ecc->steps = mtd->writesize / ecc->size; in nand_scan_tail()
6428 if (ecc->steps * ecc->size != mtd->writesize) { in nand_scan_tail()
6430 ret = -EINVAL; in nand_scan_tail()
6434 if (!ecc->total) { in nand_scan_tail()
6435 ecc->total = ecc->steps * ecc->bytes; in nand_scan_tail()
6436 chip->base.ecc.ctx.total = ecc->total; in nand_scan_tail()
6439 if (ecc->total > mtd->oobsize) { in nand_scan_tail()
6441 ret = -EINVAL; in nand_scan_tail()
6446 * The number of bytes available for a client to place data into in nand_scan_tail()
6453 mtd->oobavail = ret; in nand_scan_tail()
6456 if (!nand_ecc_is_strong_enough(&chip->base)) in nand_scan_tail()
6457 …he ECC used on your system (%db/%dB) is too weak compared to the one required by the NAND chip (%d… in nand_scan_tail()
6458 mtd->name, chip->ecc.strength, chip->ecc.size, in nand_scan_tail()
6459 nanddev_get_ecc_requirements(&chip->base)->strength, in nand_scan_tail()
6460 nanddev_get_ecc_requirements(&chip->base)->step_size); in nand_scan_tail()
6462 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
6463 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { in nand_scan_tail()
6464 switch (ecc->steps) { in nand_scan_tail()
6466 mtd->subpage_sft = 1; in nand_scan_tail()
6471 mtd->subpage_sft = 2; in nand_scan_tail()
6475 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; in nand_scan_tail()
6478 chip->pagecache.page = -1; in nand_scan_tail()
6481 switch (ecc->engine_type) { in nand_scan_tail()
6483 if (chip->page_shift > 9) in nand_scan_tail()
6484 chip->options |= NAND_SUBPAGE_READ; in nand_scan_tail()
6491 ret = nanddev_init(&chip->base, &rawnand_ops, mtd->owner); in nand_scan_tail()
6496 if (chip->options & NAND_ROM) in nand_scan_tail()
6497 mtd->flags = MTD_CAP_ROM; in nand_scan_tail()
6500 mtd->_erase = nand_erase; in nand_scan_tail()
6501 mtd->_point = NULL; in nand_scan_tail()
6502 mtd->_unpoint = NULL; in nand_scan_tail()
6503 mtd->_panic_write = panic_nand_write; in nand_scan_tail()
6504 mtd->_read_oob = nand_read_oob; in nand_scan_tail()
6505 mtd->_write_oob = nand_write_oob; in nand_scan_tail()
6506 mtd->_sync = nand_sync; in nand_scan_tail()
6507 mtd->_lock = nand_lock; in nand_scan_tail()
6508 mtd->_unlock = nand_unlock; in nand_scan_tail()
6509 mtd->_suspend = nand_suspend; in nand_scan_tail()
6510 mtd->_resume = nand_resume; in nand_scan_tail()
6511 mtd->_reboot = nand_shutdown; in nand_scan_tail()
6512 mtd->_block_isreserved = nand_block_isreserved; in nand_scan_tail()
6513 mtd->_block_isbad = nand_block_isbad; in nand_scan_tail()
6514 mtd->_block_markbad = nand_block_markbad; in nand_scan_tail()
6515 mtd->_max_bad_blocks = nanddev_mtd_max_bad_blocks; in nand_scan_tail()
6518 * Initialize bitflip_threshold to its default prior scan_bbt() call. in nand_scan_tail()
6522 if (!mtd->bitflip_threshold) in nand_scan_tail()
6523 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); in nand_scan_tail()
6525 /* Find the fastest data interface for this chip */ in nand_scan_tail()
6526 ret = nand_choose_interface_config(chip); in nand_scan_tail()
6531 for (i = 0; i < nanddev_ntargets(&chip->base); i++) { in nand_scan_tail()
6532 ret = nand_setup_interface(chip, i); in nand_scan_tail()
6537 rawnand_late_check_supported_ops(chip); in nand_scan_tail()
6540 * Look for secure regions in the NAND chip. These regions are supposed in nand_scan_tail()
6541 * to be protected by a secure element like Trustzone. So the read/write in nand_scan_tail()
6542 * accesses to these regions will be blocked in the runtime by this in nand_scan_tail()
6545 ret = of_get_nand_secure_regions(chip); in nand_scan_tail()
6550 if (chip->options & NAND_SKIP_BBTSCAN) in nand_scan_tail()
6554 ret = nand_create_bbt(chip); in nand_scan_tail()
6561 kfree(chip->secure_regions); in nand_scan_tail()
6564 kfree(chip->best_interface_config); in nand_scan_tail()
6567 nanddev_cleanup(&chip->base); in nand_scan_tail()
6570 nand_manufacturer_cleanup(chip); in nand_scan_tail()
6573 kfree(chip->data_buf); in nand_scan_tail()
6574 kfree(ecc->code_buf); in nand_scan_tail()
6575 kfree(ecc->calc_buf); in nand_scan_tail()
6580 static int nand_attach(struct nand_chip *chip) in nand_attach() argument
6582 if (chip->controller->ops && chip->controller->ops->attach_chip) in nand_attach()
6583 return chip->controller->ops->attach_chip(chip); in nand_attach()
6588 static void nand_detach(struct nand_chip *chip) in nand_detach() argument
6590 if (chip->controller->ops && chip->controller->ops->detach_chip) in nand_detach()
6591 chip->controller->ops->detach_chip(chip); in nand_detach()
6595 * nand_scan_with_ids - [NAND Interface] Scan for the NAND device
6596 * @chip: NAND chip object
6597 * @maxchips: number of chips to scan for.
6601 * The flash ID is read and the mtd/chip structures are filled with the
6604 int nand_scan_with_ids(struct nand_chip *chip, unsigned int maxchips, in nand_scan_with_ids() argument
6610 return -EINVAL; in nand_scan_with_ids()
6612 ret = nand_scan_ident(chip, maxchips, ids); in nand_scan_with_ids()
6616 ret = nand_attach(chip); in nand_scan_with_ids()
6620 ret = nand_scan_tail(chip); in nand_scan_with_ids()
6627 nand_detach(chip); in nand_scan_with_ids()
6629 nand_scan_ident_cleanup(chip); in nand_scan_with_ids()
6636 * nand_cleanup - [NAND Interface] Free resources held by the NAND device
6637 * @chip: NAND chip object
6639 void nand_cleanup(struct nand_chip *chip) in nand_cleanup() argument
6641 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT) { in nand_cleanup()
6642 if (chip->ecc.algo == NAND_ECC_ALGO_HAMMING) in nand_cleanup()
6643 rawnand_sw_hamming_cleanup(chip); in nand_cleanup()
6644 else if (chip->ecc.algo == NAND_ECC_ALGO_BCH) in nand_cleanup()
6645 rawnand_sw_bch_cleanup(chip); in nand_cleanup()
6648 nanddev_cleanup(&chip->base); in nand_cleanup()
6651 kfree(chip->secure_regions); in nand_cleanup()
6654 kfree(chip->bbt); in nand_cleanup()
6655 kfree(chip->data_buf); in nand_cleanup()
6656 kfree(chip->ecc.code_buf); in nand_cleanup()
6657 kfree(chip->ecc.calc_buf); in nand_cleanup()
6660 if (chip->badblock_pattern && chip->badblock_pattern->options in nand_cleanup()
6662 kfree(chip->badblock_pattern); in nand_cleanup()
6665 kfree(chip->best_interface_config); in nand_cleanup()
6668 nand_manufacturer_cleanup(chip); in nand_cleanup()
6670 /* Free controller specific allocations after chip identification */ in nand_cleanup()
6671 nand_detach(chip); in nand_cleanup()
6674 nand_scan_ident_cleanup(chip); in nand_cleanup()