Lines Matching +full:sdhci +full:- +full:caps
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
8 * - JMicron (hardware and technical support)
17 #include <linux/dma-mapping.h>
32 #include <linux/mmc/slot-gpio.h>
40 #include "sdhci.h"
41 #include "sdhci-cqhci.h"
42 #include "sdhci-pci.h"
53 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_init_wakeup()
54 struct sdhci_pci_slot *slot = chip->slots[i]; in sdhci_pci_init_wakeup()
57 pm_flags |= slot->host->mmc->pm_flags; in sdhci_pci_init_wakeup()
58 if (slot->host->mmc->caps & MMC_CAP_CD_WAKE) in sdhci_pci_init_wakeup()
64 return device_wakeup_enable(&chip->pdev->dev); in sdhci_pci_init_wakeup()
66 return device_wakeup_disable(&chip->pdev->dev); in sdhci_pci_init_wakeup()
77 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_suspend_host()
78 struct sdhci_pci_slot *slot = chip->slots[i]; in sdhci_pci_suspend_host()
84 host = slot->host; in sdhci_pci_suspend_host()
86 if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_pci_suspend_host()
87 mmc_retune_needed(host->mmc); in sdhci_pci_suspend_host()
93 if (device_may_wakeup(&chip->pdev->dev)) in sdhci_pci_suspend_host()
94 mmc_gpio_set_cd_wake(host->mmc, true); in sdhci_pci_suspend_host()
100 while (--i >= 0) in sdhci_pci_suspend_host()
101 sdhci_resume_host(chip->slots[i]->host); in sdhci_pci_suspend_host()
110 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_resume_host()
111 slot = chip->slots[i]; in sdhci_pci_resume_host()
115 ret = sdhci_resume_host(slot->host); in sdhci_pci_resume_host()
119 mmc_gpio_set_cd_wake(slot->host->mmc, false); in sdhci_pci_resume_host()
129 ret = cqhci_suspend(chip->slots[0]->host->mmc); in sdhci_cqhci_suspend()
144 return cqhci_resume(chip->slots[0]->host->mmc); in sdhci_cqhci_resume()
155 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_runtime_suspend_host()
156 slot = chip->slots[i]; in sdhci_pci_runtime_suspend_host()
160 host = slot->host; in sdhci_pci_runtime_suspend_host()
166 if (chip->rpm_retune && in sdhci_pci_runtime_suspend_host()
167 host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_pci_runtime_suspend_host()
168 mmc_retune_needed(host->mmc); in sdhci_pci_runtime_suspend_host()
174 while (--i >= 0) in sdhci_pci_runtime_suspend_host()
175 sdhci_runtime_resume_host(chip->slots[i]->host, 0); in sdhci_pci_runtime_suspend_host()
184 for (i = 0; i < chip->num_slots; i++) { in sdhci_pci_runtime_resume_host()
185 slot = chip->slots[i]; in sdhci_pci_runtime_resume_host()
189 ret = sdhci_runtime_resume_host(slot->host, 0); in sdhci_pci_runtime_resume_host()
201 ret = cqhci_suspend(chip->slots[0]->host->mmc); in sdhci_cqhci_runtime_suspend()
216 return cqhci_resume(chip->slots[0]->host->mmc); in sdhci_cqhci_runtime_resume()
228 cqhci_irq(host->mmc, intmask, cmd_error, data_error); in sdhci_cqhci_irq()
246 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG || in ricoh_probe()
247 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY) in ricoh_probe()
248 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; in ricoh_probe()
254 u32 caps = in ricoh_mmc_probe_slot() local
263 __sdhci_read_caps(slot->host, NULL, &caps, &caps1); in ricoh_mmc_probe_slot()
306 if (!(host->flags & SDHCI_DEVICE_DEAD)) in ene_714_set_ios()
312 slot->host->mmc_host_ops.set_ios = ene_714_set_ios; in ene_714_probe_slot()
340 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; in mrst_hc_probe_slot()
354 chip->num_slots = 1; in mrst_hc_probe()
360 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA; in pch_hc_probe_slot()
366 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE; in mfd_emmc_probe_slot()
367 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC; in mfd_emmc_probe_slot()
373 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE; in mfd_sdio_probe_slot()
421 if (pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC && in byt_ocp_setting()
422 pdev->device != PCI_DEVICE_ID_INTEL_BYT_SDIO && in byt_ocp_setting()
423 pdev->device != PCI_DEVICE_ID_INTEL_BYT_SD && in byt_ocp_setting()
424 pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC2) in byt_ocp_setting()
429 dev_err(&pdev->dev, "%s read error\n", __func__); in byt_ocp_setting()
440 dev_err(&pdev->dev, "%s write error\n", __func__); in byt_ocp_setting()
444 dev_dbg(&pdev->dev, "%s completed\n", __func__); in byt_ocp_setting()
489 return -EOPNOTSUPP; in __intel_dsm()
491 if (obj->buffer.length < 1) { in __intel_dsm()
492 err = -EINVAL; in __intel_dsm()
496 len = min_t(size_t, obj->buffer.length, 4); in __intel_dsm()
499 memcpy(result, obj->buffer.pointer, len); in __intel_dsm()
509 if (fn > 31 || !(intel_host->dsm_fns & (1 << fn))) in intel_dsm()
510 return -EOPNOTSUPP; in intel_dsm()
521 intel_host->d3_retune = true; in intel_dsm_init()
523 err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns); in intel_dsm_init()
531 mmc_hostname(mmc), intel_host->dsm_fns); in intel_dsm_init()
534 intel_host->drv_strength = err ? 0 : val; in intel_dsm_init()
537 intel_host->d3_retune = err ? true : !!val; in intel_dsm_init()
559 struct sdhci_host *host = mmc_priv(card->host); in intel_select_drive_strength()
563 if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv)) in intel_select_drive_strength()
566 return intel_host->drv_strength; in intel_select_drive_strength()
601 if (intel_host->needs_pwr_off) { in sdhci_intel_set_power()
602 intel_host->needs_pwr_off = false; in sdhci_intel_set_power()
615 * Bus power might not enable after D3 -> D0 transition due to the in sdhci_intel_set_power()
647 if (ios->enhanced_strobe) in intel_hs400_enhanced_strobe()
669 switch (ios->signal_voltage) { in intel_start_signal_voltage_switch()
711 struct device *dev = &slot->chip->pdev->dev; in byt_read_dsm()
712 struct mmc_host *mmc = slot->host->mmc; in byt_read_dsm()
715 slot->chip->rpm_retune = intel_host->d3_retune; in byt_read_dsm()
748 struct sdhci_host *host = slot->host; in intel_cache_ltr()
750 intel_host->active_ltr = readl(host->ioaddr + INTEL_ACTIVELTR); in intel_cache_ltr()
751 intel_host->idle_ltr = readl(host->ioaddr + INTEL_IDLELTR); in intel_cache_ltr()
757 struct sdhci_pci_slot *slot = chip->slots[0]; in intel_ltr_set()
759 struct sdhci_host *host = slot->host; in intel_ltr_set()
769 ltr = readl(host->ioaddr + INTEL_ACTIVELTR); in intel_ltr_set()
788 if (ltr == intel_host->active_ltr) in intel_ltr_set()
791 writel(ltr, host->ioaddr + INTEL_ACTIVELTR); in intel_ltr_set()
792 writel(ltr, host->ioaddr + INTEL_IDLELTR); in intel_ltr_set()
802 switch (chip->pdev->device) { in intel_use_ltr()
818 struct device *dev = &chip->pdev->dev; in intel_ltr_expose()
823 dev->power.set_latency_tolerance = intel_ltr_set; in intel_ltr_expose()
829 struct device *dev = &chip->pdev->dev; in intel_ltr_hide()
835 dev->power.set_latency_tolerance = NULL; in intel_ltr_hide()
840 struct mmc_host_ops *ops = &slot->host->mmc_host_ops; in byt_probe_slot()
841 struct device *dev = &slot->chip->pdev->dev; in byt_probe_slot()
842 struct mmc_host *mmc = slot->host->mmc; in byt_probe_slot()
846 byt_ocp_setting(slot->chip->pdev); in byt_probe_slot()
848 ops->execute_tuning = intel_execute_tuning; in byt_probe_slot()
849 ops->start_signal_voltage_switch = intel_start_signal_voltage_switch; in byt_probe_slot()
851 device_property_read_u32(dev, "max-frequency", &mmc->f_max); in byt_probe_slot()
853 if (!mmc->slotno) { in byt_probe_slot()
854 slot->chip->slots[mmc->slotno] = slot; in byt_probe_slot()
855 intel_ltr_expose(slot->chip); in byt_probe_slot()
862 struct mmc_host *mmc = slot->host->mmc; in byt_add_debugfs()
863 struct dentry *dir = mmc->debugfs_root; in byt_add_debugfs()
865 if (!intel_use_ltr(slot->chip)) in byt_add_debugfs()
868 debugfs_create_x32("active_ltr", 0444, dir, &intel_host->active_ltr); in byt_add_debugfs()
869 debugfs_create_x32("idle_ltr", 0444, dir, &intel_host->idle_ltr); in byt_add_debugfs()
876 int ret = sdhci_add_host(slot->host); in byt_add_host()
885 struct mmc_host *mmc = slot->host->mmc; in byt_remove_slot()
887 if (!mmc->slotno) in byt_remove_slot()
888 intel_ltr_hide(slot->chip); in byt_remove_slot()
894 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | in byt_emmc_probe_slot()
898 slot->hw_reset = sdhci_pci_int_hw_reset; in byt_emmc_probe_slot()
899 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) in byt_emmc_probe_slot()
900 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ in byt_emmc_probe_slot()
901 slot->host->mmc_host_ops.select_drive_strength = in byt_emmc_probe_slot()
908 return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC && in glk_broken_cqhci()
915 return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC && in jsl_broken_hs400es()
924 slot->host->mmc->caps2 |= MMC_CAP2_CQE; in glk_emmc_probe_slot()
926 if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) { in glk_emmc_probe_slot()
928 slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES; in glk_emmc_probe_slot()
929 slot->host->mmc_host_ops.hs400_enhanced_strobe = in glk_emmc_probe_slot()
932 slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD; in glk_emmc_probe_slot()
946 struct device *dev = &slot->chip->pdev->dev; in glk_emmc_add_host()
947 struct sdhci_host *host = slot->host; in glk_emmc_add_host()
958 ret = -ENOMEM; in glk_emmc_add_host()
962 cq_host->mmio = host->ioaddr + 0x200; in glk_emmc_add_host()
963 cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ; in glk_emmc_add_host()
964 cq_host->ops = &glk_cqhci_ops; in glk_emmc_add_host()
966 dma64 = host->flags & SDHCI_USE_64_BIT_DMA; in glk_emmc_add_host()
968 cq_host->caps |= CQHCI_TASK_DESC_SZ_128; in glk_emmc_add_host()
970 ret = cqhci_init(cq_host, host->mmc, dma64); in glk_emmc_add_host()
995 struct sdhci_pci_slot *slot = chip->slots[0]; in glk_rpm_retune_wa()
997 struct sdhci_host *host = slot->host; in glk_rpm_retune_wa()
1002 if (intel_host->rpm_retune_ok || !mmc_can_retune(host->mmc)) in glk_rpm_retune_wa()
1009 intel_host->glk_rx_ctrl1 = glk_rx_ctrl1; in glk_rpm_retune_wa()
1010 intel_host->glk_tun_val = glk_tun_val; in glk_rpm_retune_wa()
1014 if (!intel_host->glk_tun_val) in glk_rpm_retune_wa()
1017 if (glk_rx_ctrl1 != intel_host->glk_rx_ctrl1) { in glk_rpm_retune_wa()
1018 intel_host->rpm_retune_ok = true; in glk_rpm_retune_wa()
1023 (intel_host->glk_tun_val << 1)); in glk_rpm_retune_wa()
1030 intel_host->rpm_retune_ok = true; in glk_rpm_retune_wa()
1031 chip->rpm_retune = true; in glk_rpm_retune_wa()
1032 mmc_retune_needed(host->mmc); in glk_rpm_retune_wa()
1033 pr_info("%s: Requiring re-tune after rpm resume", mmc_hostname(host->mmc)); in glk_rpm_retune_wa()
1038 if (chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC && in glk_rpm_retune_chk()
1039 !chip->rpm_retune) in glk_rpm_retune_chk()
1064 status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev), in ni_set_max_freq()
1067 dev_err(&slot->chip->pdev->dev, in ni_set_max_freq()
1069 return -EINVAL; in ni_set_max_freq()
1072 slot->host->mmc->f_max = max_freq * 1000000; in ni_set_max_freq()
1093 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | in ni_byt_sdio_probe_slot()
1101 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE | in byt_sdio_probe_slot()
1109 u8 reg = sdhci_readb(slot->host, SDHCI_POWER_CONTROL); in byt_needs_pwr_off()
1111 intel_host->needs_pwr_off = reg & SDHCI_POWER_ON; in byt_needs_pwr_off()
1117 slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | in byt_sd_probe_slot()
1119 slot->cd_idx = 0; in byt_sd_probe_slot()
1120 slot->cd_override_level = true; in byt_sd_probe_slot()
1121 if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD || in byt_sd_probe_slot()
1122 slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD || in byt_sd_probe_slot()
1123 slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD || in byt_sd_probe_slot()
1124 slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD) in byt_sd_probe_slot()
1125 slot->host->mmc_host_ops.get_cd = bxt_get_cd; in byt_sd_probe_slot()
1127 if (slot->chip->pdev->subsystem_vendor == PCI_VENDOR_ID_NI && in byt_sd_probe_slot()
1128 slot->chip->pdev->subsystem_device == PCI_SUBDEVICE_ID_NI_78E3) in byt_sd_probe_slot()
1129 slot->host->mmc->caps2 |= MMC_CAP2_AVOID_3_3V; in byt_sd_probe_slot()
1140 byt_ocp_setting(chip->pdev); in byt_resume()
1151 byt_ocp_setting(chip->pdev); in byt_runtime_resume()
1270 device = ACPI_COMPANION(&slot->chip->pdev->dev); in intel_mrfld_mmc_fix_up_power_slot()
1280 unsigned int func = PCI_FUNC(slot->chip->pdev->devfn); in intel_mrfld_mmc_probe_slot()
1285 slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | in intel_mrfld_mmc_probe_slot()
1290 slot->cd_idx = 0; in intel_mrfld_mmc_probe_slot()
1291 slot->cd_override_level = true; in intel_mrfld_mmc_probe_slot()
1295 * completely in the custom ->get_cd() callback. in intel_mrfld_mmc_probe_slot()
1297 slot->host->mmc_host_ops.get_cd = mrfld_get_cd; in intel_mrfld_mmc_probe_slot()
1298 slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; in intel_mrfld_mmc_probe_slot()
1302 slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195; in intel_mrfld_mmc_probe_slot()
1303 slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | in intel_mrfld_mmc_probe_slot()
1307 return -ENODEV; in intel_mrfld_mmc_probe_slot()
1327 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); in jmicron_pmos()
1340 return pci_write_config_byte(chip->pdev, 0xAE, scratch); in jmicron_pmos()
1348 if (chip->pdev->revision == 0) { in jmicron_probe()
1349 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR | in jmicron_probe()
1368 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) in jmicron_probe()
1370 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD) in jmicron_probe()
1379 if ((PCI_SLOT(chip->pdev->devfn) == in jmicron_probe()
1380 PCI_SLOT(sd_dev->devfn)) && in jmicron_probe()
1381 (chip->pdev->bus == sd_dev->bus)) in jmicron_probe()
1387 dev_info(&chip->pdev->dev, "Refusing to bind to " in jmicron_probe()
1389 return -ENODEV; in jmicron_probe()
1399 dev_err(&chip->pdev->dev, "Failure enabling card power\n"); in jmicron_probe()
1403 /* quirk for unsable RO-detection on JM388 chips */ in jmicron_probe()
1404 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD || in jmicron_probe()
1405 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) in jmicron_probe()
1406 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT; in jmicron_probe()
1415 scratch = readb(host->ioaddr + 0xC0); in jmicron_enable_mmc()
1422 writeb(scratch, host->ioaddr + 0xC0); in jmicron_enable_mmc()
1427 if (slot->chip->pdev->revision == 0) { in jmicron_probe_slot()
1430 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION); in jmicron_probe_slot()
1440 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA; in jmicron_probe_slot()
1444 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { in jmicron_probe_slot()
1445 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 | in jmicron_probe_slot()
1448 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 | in jmicron_probe_slot()
1456 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || in jmicron_probe_slot()
1457 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) in jmicron_probe_slot()
1458 jmicron_enable_mmc(slot->host, 1); in jmicron_probe_slot()
1460 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST; in jmicron_probe_slot()
1470 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || in jmicron_remove_slot()
1471 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) in jmicron_remove_slot()
1472 jmicron_enable_mmc(slot->host, 0); in jmicron_remove_slot()
1484 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || in jmicron_suspend()
1485 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { in jmicron_suspend()
1486 for (i = 0; i < chip->num_slots; i++) in jmicron_suspend()
1487 jmicron_enable_mmc(chip->slots[i]->host, 0); in jmicron_suspend()
1497 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC || in jmicron_resume()
1498 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) { in jmicron_resume()
1499 for (i = 0; i < chip->num_slots; i++) in jmicron_resume()
1500 jmicron_enable_mmc(chip->slots[i]->host, 1); in jmicron_resume()
1505 dev_err(&chip->pdev->dev, "Failure enabling card power\n"); in jmicron_resume()
1546 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { in syskt_probe()
1547 chip->pdev->class &= ~0x0000FF; in syskt_probe()
1548 chip->pdev->class |= PCI_SDHCI_IFDMA; in syskt_probe()
1557 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV); in syskt_probe_slot()
1558 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV); in syskt_probe_slot()
1559 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, " in syskt_probe_slot()
1564 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA; in syskt_probe_slot()
1566 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA); in syskt_probe_slot()
1567 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD); in syskt_probe_slot()
1571 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS); in syskt_probe_slot()
1575 } while (--tm); in syskt_probe_slot()
1577 dev_err(&slot->chip->pdev->dev, in syskt_probe_slot()
1579 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD); in syskt_probe_slot()
1580 return -ENODEV; in syskt_probe_slot()
1594 if (chip->pdev->revision == 0x10) in via_probe()
1595 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER; in via_probe()
1606 slot->host->mmc->caps2 |= MMC_CAP2_HS200; in rtsx_probe_slot()
1669 struct pci_dev *pdev = slot->chip->pdev; in amd_execute_tuning_hs200()
1680 if (mmc_send_tuning(host->mmc, opcode, NULL)) { in amd_execute_tuning_hs200()
1692 dev_err(&pdev->dev, "no tuning point found\n"); in amd_execute_tuning_hs200()
1693 return -EIO; in amd_execute_tuning_hs200()
1696 amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2); in amd_execute_tuning_hs200()
1700 host->mmc->retune_period = 0; in amd_execute_tuning_hs200()
1710 if (host->timing == MMC_TIMING_MMC_HS200) in amd_execute_tuning()
1713 /* Otherwise perform standard SDHCI tuning */ in amd_execute_tuning()
1719 struct mmc_host_ops *ops = &slot->host->mmc_host_ops; in amd_probe_slot()
1721 ops->execute_tuning = amd_execute_tuning; in amd_probe_slot()
1739 if (smbus_dev->revision < 0x51) in amd_probe()
1751 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; in amd_probe()
1764 struct pci_dev *pdev = slot->chip->pdev; in amd_sdhci_reset()
1772 if (pdev->device == 0x7906 && (mask & SDHCI_RESET_ALL)) { in amd_sdhci_reset()
1778 pr_debug("%s: power_state=%u\n", mmc_hostname(host->mmc), in amd_sdhci_reset()
1779 pdev->current_state); in amd_sdhci_reset()
1922 * SDHCI core callbacks *
1932 pdev = slot->chip->pdev; in sdhci_pci_enable_dma()
1934 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && in sdhci_pci_enable_dma()
1935 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && in sdhci_pci_enable_dma()
1936 (host->flags & SDHCI_USE_SDMA)) { in sdhci_pci_enable_dma()
1937 dev_warn(&pdev->dev, "Will use DMA mode even though HW " in sdhci_pci_enable_dma()
1950 if (slot->hw_reset) in sdhci_pci_hw_reset()
1951 slot->hw_reset(host); in sdhci_pci_hw_reset()
1977 if (chip->fixes && chip->fixes->suspend) in sdhci_pci_suspend()
1978 return chip->fixes->suspend(chip); in sdhci_pci_suspend()
1990 if (chip->fixes && chip->fixes->resume) in sdhci_pci_resume()
1991 return chip->fixes->resume(chip); in sdhci_pci_resume()
2005 if (chip->fixes && chip->fixes->runtime_suspend) in sdhci_pci_runtime_suspend()
2006 return chip->fixes->runtime_suspend(chip); in sdhci_pci_runtime_suspend()
2018 if (chip->fixes && chip->fixes->runtime_resume) in sdhci_pci_runtime_resume()
2019 return chip->fixes->runtime_resume(chip); in sdhci_pci_runtime_resume()
2044 size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0; in sdhci_pci_probe_slot()
2047 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); in sdhci_pci_probe_slot()
2048 return ERR_PTR(-ENODEV); in sdhci_pci_probe_slot()
2052 dev_err(&pdev->dev, "Invalid iomem size. You may " in sdhci_pci_probe_slot()
2056 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { in sdhci_pci_probe_slot()
2057 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); in sdhci_pci_probe_slot()
2058 return ERR_PTR(-ENODEV); in sdhci_pci_probe_slot()
2061 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { in sdhci_pci_probe_slot()
2062 dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); in sdhci_pci_probe_slot()
2063 return ERR_PTR(-ENODEV); in sdhci_pci_probe_slot()
2066 host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size); in sdhci_pci_probe_slot()
2068 dev_err(&pdev->dev, "cannot allocate host\n"); in sdhci_pci_probe_slot()
2074 slot->chip = chip; in sdhci_pci_probe_slot()
2075 slot->host = host; in sdhci_pci_probe_slot()
2076 slot->cd_idx = -1; in sdhci_pci_probe_slot()
2078 host->hw_name = "PCI"; in sdhci_pci_probe_slot()
2079 host->ops = chip->fixes && chip->fixes->ops ? in sdhci_pci_probe_slot()
2080 chip->fixes->ops : in sdhci_pci_probe_slot()
2082 host->quirks = chip->quirks; in sdhci_pci_probe_slot()
2083 host->quirks2 = chip->quirks2; in sdhci_pci_probe_slot()
2085 host->irq = pdev->irq; in sdhci_pci_probe_slot()
2087 ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc)); in sdhci_pci_probe_slot()
2089 dev_err(&pdev->dev, "cannot request region\n"); in sdhci_pci_probe_slot()
2093 host->ioaddr = pcim_iomap_table(pdev)[bar]; in sdhci_pci_probe_slot()
2095 if (chip->fixes && chip->fixes->probe_slot) { in sdhci_pci_probe_slot()
2096 ret = chip->fixes->probe_slot(slot); in sdhci_pci_probe_slot()
2101 host->mmc->pm_caps = MMC_PM_KEEP_POWER; in sdhci_pci_probe_slot()
2102 host->mmc->slotno = slotno; in sdhci_pci_probe_slot()
2103 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; in sdhci_pci_probe_slot()
2105 if (device_can_wakeup(&pdev->dev)) in sdhci_pci_probe_slot()
2106 host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ; in sdhci_pci_probe_slot()
2108 if (host->mmc->caps & MMC_CAP_CD_WAKE) in sdhci_pci_probe_slot()
2109 device_init_wakeup(&pdev->dev, true); in sdhci_pci_probe_slot()
2111 if (slot->cd_idx >= 0) { in sdhci_pci_probe_slot()
2112 ret = mmc_gpiod_request_cd(host->mmc, "cd", slot->cd_idx, in sdhci_pci_probe_slot()
2113 slot->cd_override_level, 0); in sdhci_pci_probe_slot()
2114 if (ret && ret != -EPROBE_DEFER) in sdhci_pci_probe_slot()
2115 ret = mmc_gpiod_request_cd(host->mmc, NULL, in sdhci_pci_probe_slot()
2116 slot->cd_idx, in sdhci_pci_probe_slot()
2117 slot->cd_override_level, in sdhci_pci_probe_slot()
2119 if (ret == -EPROBE_DEFER) in sdhci_pci_probe_slot()
2123 dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); in sdhci_pci_probe_slot()
2124 slot->cd_idx = -1; in sdhci_pci_probe_slot()
2128 if (chip->fixes && chip->fixes->add_host) in sdhci_pci_probe_slot()
2129 ret = chip->fixes->add_host(slot); in sdhci_pci_probe_slot()
2139 if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && slot->cd_idx < 0) in sdhci_pci_probe_slot()
2140 chip->allow_runtime_pm = false; in sdhci_pci_probe_slot()
2145 if (chip->fixes && chip->fixes->remove_slot) in sdhci_pci_probe_slot()
2146 chip->fixes->remove_slot(slot, 0); in sdhci_pci_probe_slot()
2160 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS); in sdhci_pci_remove_slot()
2161 if (scratch == (u32)-1) in sdhci_pci_remove_slot()
2164 sdhci_remove_host(slot->host, dead); in sdhci_pci_remove_slot()
2166 if (slot->chip->fixes && slot->chip->fixes->remove_slot) in sdhci_pci_remove_slot()
2167 slot->chip->fixes->remove_slot(slot, dead); in sdhci_pci_remove_slot()
2169 sdhci_free_host(slot->host); in sdhci_pci_remove_slot()
2200 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", in sdhci_pci_probe()
2201 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision); in sdhci_pci_probe()
2208 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); in sdhci_pci_probe()
2219 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); in sdhci_pci_probe()
2220 return -ENODEV; in sdhci_pci_probe()
2227 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); in sdhci_pci_probe()
2229 return -ENOMEM; in sdhci_pci_probe()
2231 chip->pdev = pdev; in sdhci_pci_probe()
2232 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data; in sdhci_pci_probe()
2233 if (chip->fixes) { in sdhci_pci_probe()
2234 chip->quirks = chip->fixes->quirks; in sdhci_pci_probe()
2235 chip->quirks2 = chip->fixes->quirks2; in sdhci_pci_probe()
2236 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm; in sdhci_pci_probe()
2238 chip->num_slots = slots; in sdhci_pci_probe()
2239 chip->pm_retune = true; in sdhci_pci_probe()
2240 chip->rpm_retune = true; in sdhci_pci_probe()
2244 if (chip->fixes && chip->fixes->probe) { in sdhci_pci_probe()
2245 ret = chip->fixes->probe(chip); in sdhci_pci_probe()
2250 slots = chip->num_slots; /* Quirk may have changed this */ in sdhci_pci_probe()
2255 for (i--; i >= 0; i--) in sdhci_pci_probe()
2256 sdhci_pci_remove_slot(chip->slots[i]); in sdhci_pci_probe()
2260 chip->slots[i] = slot; in sdhci_pci_probe()
2263 if (chip->allow_runtime_pm) in sdhci_pci_probe()
2264 sdhci_pci_runtime_pm_allow(&pdev->dev); in sdhci_pci_probe()
2274 if (chip->allow_runtime_pm) in sdhci_pci_remove()
2275 sdhci_pci_runtime_pm_forbid(&pdev->dev); in sdhci_pci_remove()
2277 for (i = 0; i < chip->num_slots; i++) in sdhci_pci_remove()
2278 sdhci_pci_remove_slot(chip->slots[i]); in sdhci_pci_remove()
2282 .name = "sdhci-pci",