mmc/host/mtk-sd.c

425 struct msdc_host {  struct
426 	struct device *dev;
427 	const struct mtk_mmc_compatible *dev_comp;
428 	int cmd_rsp;
430 	spinlock_t lock;
431 	struct mmc_request *mrq;
432 	struct mmc_command *cmd;
433 	struct mmc_data *data;
434 	int error;
436 	void __iomem *base;		/* host base address */
437 	void __iomem *top_base;		/* host top register base address */
439 	struct msdc_dma dma;	/* dma channel */
440 	u64 dma_mask;
442 	u32 timeout_ns;		/* data timeout ns */
443 	u32 timeout_clks;	/* data timeout clks */
445 	struct pinctrl *pinctrl;
446 	struct pinctrl_state *pins_default;
447 	struct pinctrl_state *pins_uhs;
448 	struct pinctrl_state *pins_eint;
449 	struct delayed_work req_timeout;
450 	int irq;		/* host interrupt */
451 	int eint_irq;		/* interrupt from sdio device for waking up system */
452 	struct reset_control *reset;
454 	struct clk *src_clk;	/* msdc source clock */
455 	struct clk *h_clk;      /* msdc h_clk */
456 	struct clk *bus_clk;	/* bus clock which used to access register */
457 	struct clk *src_clk_cg; /* msdc source clock control gate */
458 	struct clk *sys_clk_cg;	/* msdc subsys clock control gate */
459 	struct clk *crypto_clk; /* msdc crypto clock control gate */
460 	struct clk_bulk_data bulk_clks[MSDC_NR_CLOCKS];
461 	u32 mclk;		/* mmc subsystem clock frequency */
462 	u32 src_clk_freq;	/* source clock frequency */
463 	unsigned char timing;
464 	bool vqmmc_enabled;
465 	u32 latch_ck;
466 	u32 hs400_ds_delay;
467 	u32 hs400_ds_dly3;
468 	u32 hs200_cmd_int_delay; /* cmd internal delay for HS200/SDR104 */
469 	u32 hs400_cmd_int_delay; /* cmd internal delay for HS400 */
470 	u32 tuning_step;
471 	bool hs400_cmd_resp_sel_rising;
473 	bool hs400_mode;	/* current eMMC will run at hs400 mode */
474 	bool hs400_tuning;	/* hs400 mode online tuning */
475 	bool internal_cd;	/* Use internal card-detect logic */
476 	bool cqhci;		/* support eMMC hw cmdq */
477 	struct msdc_save_para save_para; /* used when gate HCLK */
478 	struct msdc_tune_para def_tune_para; /* default tune setting */
479 	struct msdc_tune_para saved_tune_para; /* tune result of CMD21/CMD19 */
480 	struct cqhci_host *cq_host;
481 	u32 cq_ssc1_time;