Lines Matching +full:disable +full:- +full:cqe +full:- +full:dcmd
1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
21 #include "cqhci-crypto.h"
38 return cq_host->desc_base + (tag * cq_host->slot_sz); in get_desc()
45 return desc + cq_host->task_desc_len; in get_link_desc()
50 return cq_host->trans_desc_len * cq_host->mmc->max_segs * tag; in get_trans_desc_offset()
57 return cq_host->trans_desc_dma_base + offset; in get_trans_desc_dma()
64 return cq_host->trans_desc_base + offset; in get_trans_desc()
75 memset(link_temp, 0, cq_host->link_desc_len); in setup_trans_desc()
76 if (cq_host->link_desc_len > 8) in setup_trans_desc()
79 if (tag == DCMD_SLOT && (cq_host->mmc->caps2 & MMC_CAP2_CQE_DCMD)) { in setup_trans_desc()
86 if (cq_host->dma64) { in setup_trans_desc()
110 struct mmc_host *mmc = cq_host->mmc; in cqhci_dumpregs()
138 CQHCI_DUMP("SSC2: 0x%08x | DCMD rsp: 0x%08x\n", in cqhci_dumpregs()
148 if (cq_host->ops->dumpregs) in cqhci_dumpregs()
149 cq_host->ops->dumpregs(mmc); in cqhci_dumpregs()
157 * |----------|
158 * |task desc | |->|----------|
159 * |----------| | |trans desc|
160 * |link desc-|->| |----------|
161 * |----------| .
163 * no. of slots max-segs
164 * . |----------|
165 * |----------|
174 if (cq_host->caps & CQHCI_TASK_DESC_SZ_128) { in cqhci_host_alloc_tdl()
177 cq_host->task_desc_len = 16; in cqhci_host_alloc_tdl()
179 cq_host->task_desc_len = 8; in cqhci_host_alloc_tdl()
187 if (cq_host->dma64) { in cqhci_host_alloc_tdl()
188 if (cq_host->quirks & CQHCI_QUIRK_SHORT_TXFR_DESC_SZ) in cqhci_host_alloc_tdl()
189 cq_host->trans_desc_len = 12; in cqhci_host_alloc_tdl()
191 cq_host->trans_desc_len = 16; in cqhci_host_alloc_tdl()
192 cq_host->link_desc_len = 16; in cqhci_host_alloc_tdl()
194 cq_host->trans_desc_len = 8; in cqhci_host_alloc_tdl()
195 cq_host->link_desc_len = 8; in cqhci_host_alloc_tdl()
199 cq_host->slot_sz = cq_host->task_desc_len + cq_host->link_desc_len; in cqhci_host_alloc_tdl()
201 cq_host->desc_size = cq_host->slot_sz * cq_host->num_slots; in cqhci_host_alloc_tdl()
203 cq_host->data_size = get_trans_desc_offset(cq_host, cq_host->mmc->cqe_qdepth); in cqhci_host_alloc_tdl()
205 pr_debug("%s: cqhci: desc_size: %zu data_sz: %zu slot-sz: %d\n", in cqhci_host_alloc_tdl()
206 mmc_hostname(cq_host->mmc), cq_host->desc_size, cq_host->data_size, in cqhci_host_alloc_tdl()
207 cq_host->slot_sz); in cqhci_host_alloc_tdl()
210 * allocate a dma-mapped chunk of memory for the descriptors in cqhci_host_alloc_tdl()
211 * allocate a dma-mapped chunk of memory for link descriptors in cqhci_host_alloc_tdl()
212 * setup each link-desc memory offset per slot-number to in cqhci_host_alloc_tdl()
215 cq_host->desc_base = dmam_alloc_coherent(mmc_dev(cq_host->mmc), in cqhci_host_alloc_tdl()
216 cq_host->desc_size, in cqhci_host_alloc_tdl()
217 &cq_host->desc_dma_base, in cqhci_host_alloc_tdl()
219 if (!cq_host->desc_base) in cqhci_host_alloc_tdl()
220 return -ENOMEM; in cqhci_host_alloc_tdl()
222 cq_host->trans_desc_base = dmam_alloc_coherent(mmc_dev(cq_host->mmc), in cqhci_host_alloc_tdl()
223 cq_host->data_size, in cqhci_host_alloc_tdl()
224 &cq_host->trans_desc_dma_base, in cqhci_host_alloc_tdl()
226 if (!cq_host->trans_desc_base) { in cqhci_host_alloc_tdl()
227 dmam_free_coherent(mmc_dev(cq_host->mmc), cq_host->desc_size, in cqhci_host_alloc_tdl()
228 cq_host->desc_base, in cqhci_host_alloc_tdl()
229 cq_host->desc_dma_base); in cqhci_host_alloc_tdl()
230 cq_host->desc_base = NULL; in cqhci_host_alloc_tdl()
231 cq_host->desc_dma_base = 0; in cqhci_host_alloc_tdl()
232 return -ENOMEM; in cqhci_host_alloc_tdl()
235 pr_debug("%s: cqhci: desc-base: 0x%p trans-base: 0x%p\n desc_dma 0x%llx trans_dma: 0x%llx\n", in cqhci_host_alloc_tdl()
236 mmc_hostname(cq_host->mmc), cq_host->desc_base, cq_host->trans_desc_base, in cqhci_host_alloc_tdl()
237 (unsigned long long)cq_host->desc_dma_base, in cqhci_host_alloc_tdl()
238 (unsigned long long)cq_host->trans_desc_dma_base); in cqhci_host_alloc_tdl()
240 for (; i < (cq_host->num_slots); i++) in cqhci_host_alloc_tdl()
248 struct mmc_host *mmc = cq_host->mmc; in __cqhci_enable()
261 if (mmc->caps2 & MMC_CAP2_CQE_DCMD) in __cqhci_enable()
264 if (cq_host->caps & CQHCI_TASK_DESC_SZ_128) in __cqhci_enable()
267 if (mmc->caps2 & MMC_CAP2_CRYPTO) in __cqhci_enable()
272 cqhci_writel(cq_host, lower_32_bits(cq_host->desc_dma_base), in __cqhci_enable()
274 cqhci_writel(cq_host, upper_32_bits(cq_host->desc_dma_base), in __cqhci_enable()
277 cqhci_writel(cq_host, cq_host->rca, CQHCI_SSC2); in __cqhci_enable()
288 mmc->cqe_on = true; in __cqhci_enable()
290 if (cq_host->ops->enable) in __cqhci_enable()
291 cq_host->ops->enable(mmc); in __cqhci_enable()
298 cq_host->activated = true; in __cqhci_enable()
309 cq_host->mmc->cqe_on = false; in __cqhci_disable()
311 cq_host->activated = false; in __cqhci_disable()
316 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_deactivate()
318 if (cq_host->enabled && cq_host->activated) in cqhci_deactivate()
327 /* Re-enable is done upon first request */ in cqhci_resume()
334 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_enable()
337 if (!card->ext_csd.cmdq_en) in cqhci_enable()
338 return -EINVAL; in cqhci_enable()
340 if (cq_host->enabled) in cqhci_enable()
343 cq_host->rca = card->rca; in cqhci_enable()
347 pr_err("%s: Failed to enable CQE, error %d\n", in cqhci_enable()
354 cq_host->enabled = true; in cqhci_enable()
372 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_off()
376 if (!cq_host->enabled || !mmc->cqe_on || cq_host->recovery_halt) in cqhci_off()
379 if (cq_host->ops->disable) in cqhci_off()
380 cq_host->ops->disable(mmc, false); in cqhci_off()
387 pr_err("%s: cqhci: CQE stuck on\n", mmc_hostname(mmc)); in cqhci_off()
389 pr_debug("%s: cqhci: CQE off\n", mmc_hostname(mmc)); in cqhci_off()
391 if (cq_host->ops->post_disable) in cqhci_off()
392 cq_host->ops->post_disable(mmc); in cqhci_off()
394 mmc->cqe_on = false; in cqhci_off()
399 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_disable()
401 if (!cq_host->enabled) in cqhci_disable()
408 dmam_free_coherent(mmc_dev(mmc), cq_host->data_size, in cqhci_disable()
409 cq_host->trans_desc_base, in cqhci_disable()
410 cq_host->trans_desc_dma_base); in cqhci_disable()
412 dmam_free_coherent(mmc_dev(mmc), cq_host->desc_size, in cqhci_disable()
413 cq_host->desc_base, in cqhci_disable()
414 cq_host->desc_dma_base); in cqhci_disable()
416 cq_host->trans_desc_base = NULL; in cqhci_disable()
417 cq_host->desc_base = NULL; in cqhci_disable()
419 cq_host->enabled = false; in cqhci_disable()
426 u32 req_flags = mrq->data->flags; in cqhci_prep_task_desc()
439 CQHCI_BLK_COUNT(mrq->data->blocks) | in cqhci_prep_task_desc()
440 CQHCI_BLK_ADDR((u64)mrq->data->blk_addr); in cqhci_prep_task_desc()
444 if (cq_host->caps & CQHCI_TASK_DESC_SZ_128) { in cqhci_prep_task_desc()
450 mmc_hostname(mrq->host), mrq->tag, desc1, desc0); in cqhci_prep_task_desc()
453 mmc_hostname(mrq->host), mrq->tag, desc0); in cqhci_prep_task_desc()
460 struct mmc_data *data = mrq->data; in cqhci_dma_map()
463 return -EINVAL; in cqhci_dma_map()
465 sg_count = dma_map_sg(mmc_dev(host), data->sg, in cqhci_dma_map()
466 data->sg_len, in cqhci_dma_map()
467 (data->flags & MMC_DATA_WRITE) ? in cqhci_dma_map()
470 pr_err("%s: sg-len: %d\n", __func__, data->sg_len); in cqhci_dma_map()
471 return -ENOMEM; in cqhci_dma_map()
502 struct mmc_data *data = mrq->data; in cqhci_prep_tran_desc()
505 bool dma64 = cq_host->dma64; in cqhci_prep_tran_desc()
510 sg_count = cqhci_dma_map(mrq->host, mrq); in cqhci_prep_tran_desc()
513 mmc_hostname(mrq->host), __func__, sg_count); in cqhci_prep_tran_desc()
519 for_each_sg(data->sg, sg, sg_count, i) { in cqhci_prep_tran_desc()
526 desc += cq_host->trans_desc_len; in cqhci_prep_tran_desc()
540 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_prep_dcmd_desc()
543 if (!(mrq->cmd->flags & MMC_RSP_PRESENT)) { in cqhci_prep_dcmd_desc()
547 if (mrq->cmd->flags & MMC_RSP_R1B) { in cqhci_prep_dcmd_desc()
556 task_desc = (__le64 __force *)get_desc(cq_host, cq_host->dcmd_slot); in cqhci_prep_dcmd_desc()
557 memset(task_desc, 0, cq_host->task_desc_len); in cqhci_prep_dcmd_desc()
563 CQHCI_CMD_INDEX(mrq->cmd->opcode) | in cqhci_prep_dcmd_desc()
565 if (cq_host->ops->update_dcmd_desc) in cqhci_prep_dcmd_desc()
566 cq_host->ops->update_dcmd_desc(mmc, mrq, &data); in cqhci_prep_dcmd_desc()
569 pr_debug("%s: cqhci: dcmd: cmd: %d timing: %d resp: %d\n", in cqhci_prep_dcmd_desc()
570 mmc_hostname(mmc), mrq->cmd->opcode, timing, resp_type); in cqhci_prep_dcmd_desc()
572 dataddr[0] = cpu_to_le64((u64)mrq->cmd->arg); in cqhci_prep_dcmd_desc()
578 struct mmc_data *data = mrq->data; in cqhci_post_req()
581 dma_unmap_sg(mmc_dev(host), data->sg, data->sg_len, in cqhci_post_req()
582 (data->flags & MMC_DATA_READ) ? in cqhci_post_req()
589 return mrq->cmd ? DCMD_SLOT : mrq->tag; in cqhci_tag()
596 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_request()
599 if (!cq_host->enabled) { in cqhci_request()
601 return -EINVAL; in cqhci_request()
604 /* First request after resume has to re-enable */ in cqhci_request()
605 if (!cq_host->activated) in cqhci_request()
608 if (!mmc->cqe_on) { in cqhci_request()
609 if (cq_host->ops->pre_enable) in cqhci_request()
610 cq_host->ops->pre_enable(mmc); in cqhci_request()
613 mmc->cqe_on = true; in cqhci_request()
614 pr_debug("%s: cqhci: CQE on\n", mmc_hostname(mmc)); in cqhci_request()
616 pr_err("%s: cqhci: CQE failed to exit halt state\n", in cqhci_request()
619 if (cq_host->ops->enable) in cqhci_request()
620 cq_host->ops->enable(mmc); in cqhci_request()
623 if (mrq->data) { in cqhci_request()
636 spin_lock_irqsave(&cq_host->lock, flags); in cqhci_request()
638 if (cq_host->recovery_halt) { in cqhci_request()
639 err = -EBUSY; in cqhci_request()
643 cq_host->slot[tag].mrq = mrq; in cqhci_request()
644 cq_host->slot[tag].flags = 0; in cqhci_request()
646 cq_host->qcnt += 1; in cqhci_request()
654 spin_unlock_irqrestore(&cq_host->lock, flags); in cqhci_request()
665 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_recovery_needed()
667 if (!cq_host->recovery_halt) { in cqhci_recovery_needed()
668 cq_host->recovery_halt = true; in cqhci_recovery_needed()
670 wake_up(&cq_host->wait_queue); in cqhci_recovery_needed()
671 if (notify && mrq->recovery_notifier) in cqhci_recovery_needed()
672 mrq->recovery_notifier(mrq); in cqhci_recovery_needed()
681 case -EILSEQ: in cqhci_error_flags()
683 case -ETIMEDOUT: in cqhci_error_flags()
693 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_error_irq()
699 spin_lock(&cq_host->lock); in cqhci_error_irq()
707 if (cq_host->recovery_halt) in cqhci_error_irq()
710 if (!cq_host->qcnt) { in cqhci_error_irq()
719 slot = &cq_host->slot[tag]; in cqhci_error_irq()
720 if (slot->mrq) { in cqhci_error_irq()
721 slot->flags = cqhci_error_flags(cmd_error, data_error); in cqhci_error_irq()
722 cqhci_recovery_needed(mmc, slot->mrq, true); in cqhci_error_irq()
728 slot = &cq_host->slot[tag]; in cqhci_error_irq()
729 if (slot->mrq) { in cqhci_error_irq()
730 slot->flags = cqhci_error_flags(data_error, cmd_error); in cqhci_error_irq()
731 cqhci_recovery_needed(mmc, slot->mrq, true); in cqhci_error_irq()
737 * never happen, since the block layer ensures that all crypto-enabled in cqhci_error_irq()
751 slot = &cq_host->slot[tag]; in cqhci_error_irq()
752 if (!slot->mrq) in cqhci_error_irq()
754 slot->flags = cqhci_error_flags(data_error, cmd_error); in cqhci_error_irq()
755 cqhci_recovery_needed(mmc, slot->mrq, true); in cqhci_error_irq()
759 if (!cq_host->recovery_halt) { in cqhci_error_irq()
765 slot = &cq_host->slot[tag]; in cqhci_error_irq()
766 if (!slot->mrq) in cqhci_error_irq()
768 slot->flags = cqhci_error_flags(data_error, cmd_error); in cqhci_error_irq()
769 cqhci_recovery_needed(mmc, slot->mrq, true); in cqhci_error_irq()
775 spin_unlock(&cq_host->lock); in cqhci_error_irq()
780 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_finish_mrq()
781 struct cqhci_slot *slot = &cq_host->slot[tag]; in cqhci_finish_mrq()
782 struct mmc_request *mrq = slot->mrq; in cqhci_finish_mrq()
792 if (cq_host->recovery_halt) { in cqhci_finish_mrq()
793 slot->flags |= CQHCI_COMPLETED; in cqhci_finish_mrq()
797 slot->mrq = NULL; in cqhci_finish_mrq()
799 cq_host->qcnt -= 1; in cqhci_finish_mrq()
801 data = mrq->data; in cqhci_finish_mrq()
803 if (data->error) in cqhci_finish_mrq()
804 data->bytes_xfered = 0; in cqhci_finish_mrq()
806 data->bytes_xfered = data->blksz * data->blocks; in cqhci_finish_mrq()
817 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_irq()
842 spin_lock(&cq_host->lock); in cqhci_irq()
844 for_each_set_bit(tag, &comp_status, cq_host->num_slots) { in cqhci_irq()
851 if (cq_host->waiting_for_idle && !cq_host->qcnt) { in cqhci_irq()
852 cq_host->waiting_for_idle = false; in cqhci_irq()
853 wake_up(&cq_host->wait_queue); in cqhci_irq()
856 spin_unlock(&cq_host->lock); in cqhci_irq()
860 wake_up(&cq_host->wait_queue); in cqhci_irq()
863 wake_up(&cq_host->wait_queue); in cqhci_irq()
874 spin_lock_irqsave(&cq_host->lock, flags); in cqhci_is_idle()
875 is_idle = !cq_host->qcnt || cq_host->recovery_halt; in cqhci_is_idle()
876 *ret = cq_host->recovery_halt ? -EBUSY : 0; in cqhci_is_idle()
877 cq_host->waiting_for_idle = !is_idle; in cqhci_is_idle()
878 spin_unlock_irqrestore(&cq_host->lock, flags); in cqhci_is_idle()
885 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_wait_for_idle()
888 wait_event(cq_host->wait_queue, cqhci_is_idle(cq_host, &ret)); in cqhci_wait_for_idle()
896 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_timeout()
898 struct cqhci_slot *slot = &cq_host->slot[tag]; in cqhci_timeout()
902 spin_lock_irqsave(&cq_host->lock, flags); in cqhci_timeout()
903 timed_out = slot->mrq == mrq; in cqhci_timeout()
905 slot->flags |= CQHCI_EXTERNAL_TIMEOUT; in cqhci_timeout()
907 *recovery_needed = cq_host->recovery_halt; in cqhci_timeout()
909 spin_unlock_irqrestore(&cq_host->lock, flags); in cqhci_timeout()
913 mmc_hostname(mmc), tag, cq_host->qcnt); in cqhci_timeout()
927 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_clear_all_tasks()
937 wait_event_timeout(cq_host->wait_queue, cqhci_tasks_cleared(cq_host), in cqhci_clear_all_tasks()
958 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_halt()
971 wait_event_timeout(cq_host->wait_queue, cqhci_halted(cq_host), in cqhci_halt()
994 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_recovery_start()
998 WARN_ON(!cq_host->recovery_halt); in cqhci_recovery_start()
1002 if (cq_host->ops->disable) in cqhci_recovery_start()
1003 cq_host->ops->disable(mmc, true); in cqhci_recovery_start()
1005 mmc->cqe_on = false; in cqhci_recovery_start()
1013 /* CRC errors might indicate re-tuning so prefer to report that */ in cqhci_error_from_flags()
1015 return -EILSEQ; in cqhci_error_from_flags()
1018 return -ETIMEDOUT; in cqhci_error_from_flags()
1020 return -EIO; in cqhci_error_from_flags()
1025 struct cqhci_slot *slot = &cq_host->slot[tag]; in cqhci_recover_mrq()
1026 struct mmc_request *mrq = slot->mrq; in cqhci_recover_mrq()
1032 slot->mrq = NULL; in cqhci_recover_mrq()
1034 cq_host->qcnt -= 1; in cqhci_recover_mrq()
1036 data = mrq->data; in cqhci_recover_mrq()
1038 data->bytes_xfered = 0; in cqhci_recover_mrq()
1039 data->error = cqhci_error_from_flags(slot->flags); in cqhci_recover_mrq()
1041 mrq->cmd->error = cqhci_error_from_flags(slot->flags); in cqhci_recover_mrq()
1044 mmc_cqe_request_done(cq_host->mmc, mrq); in cqhci_recover_mrq()
1051 for (i = 0; i < cq_host->num_slots; i++) in cqhci_recover_mrqs()
1067 struct cqhci_host *cq_host = mmc->cqe_private; in cqhci_recovery_finish()
1074 WARN_ON(!cq_host->recovery_halt); in cqhci_recovery_finish()
1081 * be disabled/re-enabled, but not to disable before clearing tasks. in cqhci_recovery_finish()
1087 /* Disable to make sure tasks really are cleared */ in cqhci_recovery_finish()
1103 WARN_ON(cq_host->qcnt); in cqhci_recovery_finish()
1105 spin_lock_irqsave(&cq_host->lock, flags); in cqhci_recovery_finish()
1106 cq_host->qcnt = 0; in cqhci_recovery_finish()
1107 cq_host->recovery_halt = false; in cqhci_recovery_finish()
1108 mmc->cqe_on = false; in cqhci_recovery_finish()
1109 spin_unlock_irqrestore(&cq_host->lock, flags); in cqhci_recovery_finish()
1111 /* Ensure all writes are done before interrupts are re-enabled */ in cqhci_recovery_finish()
1142 dev_dbg(&pdev->dev, "CMDQ not supported\n"); in cqhci_pltfm_init()
1143 return ERR_PTR(-EINVAL); in cqhci_pltfm_init()
1146 cq_host = devm_kzalloc(&pdev->dev, sizeof(*cq_host), GFP_KERNEL); in cqhci_pltfm_init()
1148 return ERR_PTR(-ENOMEM); in cqhci_pltfm_init()
1149 cq_host->mmio = devm_ioremap(&pdev->dev, in cqhci_pltfm_init()
1150 cqhci_memres->start, in cqhci_pltfm_init()
1152 if (!cq_host->mmio) { in cqhci_pltfm_init()
1153 dev_err(&pdev->dev, "failed to remap cqhci regs\n"); in cqhci_pltfm_init()
1154 return ERR_PTR(-EBUSY); in cqhci_pltfm_init()
1156 dev_dbg(&pdev->dev, "CMDQ ioremap: done\n"); in cqhci_pltfm_init()
1179 cq_host->dma64 = dma64; in cqhci_init()
1180 cq_host->mmc = mmc; in cqhci_init()
1181 cq_host->mmc->cqe_private = cq_host; in cqhci_init()
1183 cq_host->num_slots = NUM_SLOTS; in cqhci_init()
1184 cq_host->dcmd_slot = DCMD_SLOT; in cqhci_init()
1186 mmc->cqe_ops = &cqhci_cqe_ops; in cqhci_init()
1188 mmc->cqe_qdepth = NUM_SLOTS; in cqhci_init()
1189 if (mmc->caps2 & MMC_CAP2_CQE_DCMD) in cqhci_init()
1190 mmc->cqe_qdepth -= 1; in cqhci_init()
1192 cq_host->slot = devm_kcalloc(mmc_dev(mmc), cq_host->num_slots, in cqhci_init()
1193 sizeof(*cq_host->slot), GFP_KERNEL); in cqhci_init()
1194 if (!cq_host->slot) { in cqhci_init()
1195 err = -ENOMEM; in cqhci_init()
1206 spin_lock_init(&cq_host->lock); in cqhci_init()
1208 init_completion(&cq_host->halt_comp); in cqhci_init()
1209 init_waitqueue_head(&cq_host->wait_queue); in cqhci_init()