1 // SPDX-License-Identifier: GPL-2.0-only
46  * The memory controller driver exposes some files in debugfs that can be used
47  * to control the EMC frequency. The top-level directory can be found here:
53  *   - available_rates: This file contains a list of valid, space-separated
56  *   - min_rate: Writing a value to this file sets the given frequency as the
61  *   - max_rate: Similarily to the min_rate file, writing a value to this file
73 	for (i = 0; i < emc->num_dvfs; i++)  in tegra186_emc_validate_rate()
74 		if (rate == emc->dvfs[i].rate)  in tegra186_emc_validate_rate()
83 	struct tegra186_emc *emc = s->private;  in tegra186_emc_debug_available_rates_show()
87 	for (i = 0; i < emc->num_dvfs; i++) {  in tegra186_emc_debug_available_rates_show()
88 		seq_printf(s, "%s%lu", prefix, emc->dvfs[i].rate);  in tegra186_emc_debug_available_rates_show()
102 	*rate = emc->debugfs.min_rate;  in tegra186_emc_debug_min_rate_get()
113 		return -EINVAL;  in tegra186_emc_debug_min_rate_set()
115 	err = clk_set_min_rate(emc->clk, rate);  in tegra186_emc_debug_min_rate_set()
119 	emc->debugfs.min_rate = rate;  in tegra186_emc_debug_min_rate_set()
132 	*rate = emc->debugfs.max_rate;  in tegra186_emc_debug_max_rate_get()
143 		return -EINVAL;  in tegra186_emc_debug_max_rate_set()
145 	err = clk_set_max_rate(emc->clk, rate);  in tegra186_emc_debug_max_rate_set()
149 	emc->debugfs.max_rate = rate;  in tegra186_emc_debug_max_rate_set()
172 	err = tegra_bpmp_transfer(emc->bpmp, &msg);  in tegra186_emc_get_emc_dvfs_latency()
174 		dev_err(emc->dev, "failed to EMC DVFS pairs: %d\n", err);  in tegra186_emc_get_emc_dvfs_latency()
178 		dev_err(emc->dev, "EMC DVFS MRQ failed: %d (BPMP error code)\n", msg.rx.ret);  in tegra186_emc_get_emc_dvfs_latency()
179 		return -EINVAL;  in tegra186_emc_get_emc_dvfs_latency()
182 	emc->debugfs.min_rate = ULONG_MAX;  in tegra186_emc_get_emc_dvfs_latency()
183 	emc->debugfs.max_rate = 0;  in tegra186_emc_get_emc_dvfs_latency()
185 	emc->num_dvfs = response.num_pairs;  in tegra186_emc_get_emc_dvfs_latency()
187 	emc->dvfs = devm_kmalloc_array(emc->dev, emc->num_dvfs, sizeof(*emc->dvfs), GFP_KERNEL);  in tegra186_emc_get_emc_dvfs_latency()
188 	if (!emc->dvfs)  in tegra186_emc_get_emc_dvfs_latency()
189 		return -ENOMEM;  in tegra186_emc_get_emc_dvfs_latency()
191 	dev_dbg(emc->dev, "%u DVFS pairs:\n", emc->num_dvfs);  in tegra186_emc_get_emc_dvfs_latency()
193 	for (i = 0; i < emc->num_dvfs; i++) {  in tegra186_emc_get_emc_dvfs_latency()
194 		emc->dvfs[i].rate = response.pairs[i].freq * 1000;  in tegra186_emc_get_emc_dvfs_latency()
195 		emc->dvfs[i].latency = response.pairs[i].latency;  in tegra186_emc_get_emc_dvfs_latency()
197 		if (emc->dvfs[i].rate < emc->debugfs.min_rate)  in tegra186_emc_get_emc_dvfs_latency()
198 			emc->debugfs.min_rate = emc->dvfs[i].rate;  in tegra186_emc_get_emc_dvfs_latency()
200 		if (emc->dvfs[i].rate > emc->debugfs.max_rate)  in tegra186_emc_get_emc_dvfs_latency()
201 			emc->debugfs.max_rate = emc->dvfs[i].rate;  in tegra186_emc_get_emc_dvfs_latency()
203 		dev_dbg(emc->dev, "  %2u: %lu Hz -> %lu us\n", i,  in tegra186_emc_get_emc_dvfs_latency()
204 			emc->dvfs[i].rate, emc->dvfs[i].latency);  in tegra186_emc_get_emc_dvfs_latency()
207 	err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate, emc->debugfs.max_rate);  in tegra186_emc_get_emc_dvfs_latency()
209 		dev_err(emc->dev, "failed to set rate range [%lu-%lu] for %pC\n",  in tegra186_emc_get_emc_dvfs_latency()
210 			emc->debugfs.min_rate, emc->debugfs.max_rate, emc->clk);  in tegra186_emc_get_emc_dvfs_latency()
214 	emc->debugfs.root = debugfs_create_dir("emc", NULL);  in tegra186_emc_get_emc_dvfs_latency()
215 	debugfs_create_file("available_rates", 0444, emc->debugfs.root, emc,  in tegra186_emc_get_emc_dvfs_latency()
217 	debugfs_create_file("min_rate", 0644, emc->debugfs.root, emc,  in tegra186_emc_get_emc_dvfs_latency()
219 	debugfs_create_file("max_rate", 0644, emc->debugfs.root, emc,  in tegra186_emc_get_emc_dvfs_latency()
226  * tegra_emc_icc_set_bw() - Set BW api for EMC provider
227  * @src: ICC node for External Memory Controller (EMC)
228  * @dst: ICC node for External Memory (DRAM)
230  * Do nothing here as info to BPMP-FW is now passed in the BW set function
231  * of the MC driver. BPMP-FW sets the final Freq based on the passed values.
244 	/* External Memory is the only possible ICC route */  in tegra_emc_of_icc_xlate()
245 	list_for_each_entry(node, &provider->nodes, node_list) {  in tegra_emc_of_icc_xlate()
246 		if (node->id != TEGRA_ICC_EMEM)  in tegra_emc_of_icc_xlate()
252 	return ERR_PTR(-EPROBE_DEFER);  in tegra_emc_of_icc_xlate()
265 	struct tegra_mc *mc = dev_get_drvdata(emc->dev->parent);  in tegra_emc_interconnect_init()
266 	const struct tegra_mc_soc *soc = mc->soc;  in tegra_emc_interconnect_init()
270 	emc->provider.dev = emc->dev;  in tegra_emc_interconnect_init()
271 	emc->provider.set = tegra_emc_icc_set_bw;  in tegra_emc_interconnect_init()
272 	emc->provider.data = &emc->provider;  in tegra_emc_interconnect_init()
273 	emc->provider.aggregate = soc->icc_ops->aggregate;  in tegra_emc_interconnect_init()
274 	emc->provider.xlate = tegra_emc_of_icc_xlate;  in tegra_emc_interconnect_init()
275 	emc->provider.get_bw = tegra_emc_icc_get_init_bw;  in tegra_emc_interconnect_init()
277 	icc_provider_init(&emc->provider);  in tegra_emc_interconnect_init()
279 	/* create External Memory Controller node */  in tegra_emc_interconnect_init()
286 	node->name = "External Memory Controller";  in tegra_emc_interconnect_init()
287 	icc_node_add(node, &emc->provider);  in tegra_emc_interconnect_init()
289 	/* link External Memory Controller to External Memory (DRAM) */  in tegra_emc_interconnect_init()
294 	/* create External Memory node */  in tegra_emc_interconnect_init()
301 	node->name = "External Memory (DRAM)";  in tegra_emc_interconnect_init()
302 	icc_node_add(node, &emc->provider);  in tegra_emc_interconnect_init()
304 	err = icc_provider_register(&emc->provider);  in tegra_emc_interconnect_init()
311 	icc_nodes_remove(&emc->provider);  in tegra_emc_interconnect_init()
313 	dev_err(emc->dev, "failed to initialize ICC: %d\n", err);  in tegra_emc_interconnect_init()
320 	struct tegra_mc *mc = dev_get_drvdata(pdev->dev.parent);  in tegra186_emc_probe()
324 	emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL);  in tegra186_emc_probe()
326 		return -ENOMEM;  in tegra186_emc_probe()
328 	emc->bpmp = tegra_bpmp_get(&pdev->dev);  in tegra186_emc_probe()
329 	if (IS_ERR(emc->bpmp))  in tegra186_emc_probe()
330 		return dev_err_probe(&pdev->dev, PTR_ERR(emc->bpmp), "failed to get BPMP\n");  in tegra186_emc_probe()
332 	emc->clk = devm_clk_get(&pdev->dev, "emc");  in tegra186_emc_probe()
333 	if (IS_ERR(emc->clk)) {  in tegra186_emc_probe()
334 		err = PTR_ERR(emc->clk);  in tegra186_emc_probe()
335 		dev_err(&pdev->dev, "failed to get EMC clock: %d\n", err);  in tegra186_emc_probe()
340 	emc->dev = &pdev->dev;  in tegra186_emc_probe()
342 	if (tegra_bpmp_mrq_is_supported(emc->bpmp, MRQ_EMC_DVFS_LATENCY)) {  in tegra186_emc_probe()
348 	if (mc && mc->soc->icc_ops) {  in tegra186_emc_probe()
349 		if (tegra_bpmp_mrq_is_supported(emc->bpmp, MRQ_BWMGR_INT)) {  in tegra186_emc_probe()
350 			mc->bwmgr_mrq_supported = true;  in tegra186_emc_probe()
355 			 * DT node in the mc->bpmp and use it in MC's icc_set hook.  in tegra186_emc_probe()
357 			mc->bpmp = emc->bpmp;  in tegra186_emc_probe()
362 		 * Initialize the ICC even if BPMP-FW doesn't support 'MRQ_BWMGR_INT'.  in tegra186_emc_probe()
363 		 * Use the flag 'mc->bwmgr_mrq_supported' within MC driver and return  in tegra186_emc_probe()
364 		 * EINVAL instead of passing the request to BPMP-FW later when the BW  in tegra186_emc_probe()
369 			mc->bpmp = NULL;  in tegra186_emc_probe()
377 	tegra_bpmp_put(emc->bpmp);  in tegra186_emc_probe()
383 	struct tegra_mc *mc = dev_get_drvdata(pdev->dev.parent);  in tegra186_emc_remove()
386 	debugfs_remove_recursive(emc->debugfs.root);  in tegra186_emc_remove()
388 	mc->bpmp = NULL;  in tegra186_emc_remove()
389 	tegra_bpmp_put(emc->bpmp);  in tegra186_emc_remove()
394 	{ .compatible = "nvidia,tegra186-emc" },
397 	{ .compatible = "nvidia,tegra194-emc" },
400 	{ .compatible = "nvidia,tegra234-emc" },
408 		.name = "tegra186-emc",
419 MODULE_DESCRIPTION("NVIDIA Tegra186 External Memory Controller driver");