Lines Matching +full:cs +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
18 #define FMC2_BCR1 0x0
19 #define FMC2_BTR1 0x4
20 #define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1)
21 #define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1)
22 #define FMC2_PCSCNTR 0x20
23 #define FMC2_BWTR1 0x104
24 #define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1)
31 #define FMC2_BCR_MBKEN BIT(0)
48 #define FMC2_BXTR_ADDSET GENMASK(3, 0)
58 #define FMC2_PCSCNTR_CSCOUNT GENMASK(15, 0)
64 #define FMC2_BCR_CPSIZE_0 0x0
65 #define FMC2_BCR_CPSIZE_128 0x1
66 #define FMC2_BCR_CPSIZE_256 0x2
67 #define FMC2_BCR_CPSIZE_512 0x3
68 #define FMC2_BCR_CPSIZE_1024 0x4
70 #define FMC2_BCR_MWID_8 0x0
71 #define FMC2_BCR_MWID_16 0x1
73 #define FMC2_BCR_MTYP_SRAM 0x0
74 #define FMC2_BCR_MTYP_PSRAM 0x1
75 #define FMC2_BCR_MTYP_NOR 0x2
77 #define FMC2_BXTR_EXTMOD_A 0x0
78 #define FMC2_BXTR_EXTMOD_B 0x1
79 #define FMC2_BXTR_EXTMOD_C 0x2
80 #define FMC2_BXTR_EXTMOD_D 0x3
82 #define FMC2_BCR_NBLSET_MAX 0x3
83 #define FMC2_BXTR_ADDSET_MAX 0xf
84 #define FMC2_BXTR_ADDHLD_MAX 0xf
85 #define FMC2_BXTR_DATAST_MAX 0xff
86 #define FMC2_BXTR_BUSTURN_MAX 0xf
87 #define FMC2_BXTR_DATAHLD_MAX 0x3
88 #define FMC2_BTR_CLKDIV_MAX 0xf
89 #define FMC2_BTR_DATLAT_MAX 0xf
90 #define FMC2_PCSCNTR_CSCOUNT_MAX 0xff
93 FMC2_EBI1 = 0,
108 FMC2_ASYNC_MODE_1_SRAM = 0,
128 FMC2_CPSIZE_0 = 0,
148 * struct stm32_fmc2_prop - STM32 FMC2 EBI property
172 const struct stm32_fmc2_prop *prop, int cs);
173 u32 (*calculate)(struct stm32_fmc2_ebi *ebi, int cs, u32 setup);
176 int cs, u32 setup);
181 int cs) in stm32_fmc2_ebi_check_mux() argument
185 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_mux()
188 return 0; in stm32_fmc2_ebi_check_mux()
190 return -EINVAL; in stm32_fmc2_ebi_check_mux()
195 int cs) in stm32_fmc2_ebi_check_waitcfg() argument
199 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_waitcfg()
202 return 0; in stm32_fmc2_ebi_check_waitcfg()
204 return -EINVAL; in stm32_fmc2_ebi_check_waitcfg()
209 int cs) in stm32_fmc2_ebi_check_sync_trans() argument
213 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_sync_trans()
216 return 0; in stm32_fmc2_ebi_check_sync_trans()
218 return -EINVAL; in stm32_fmc2_ebi_check_sync_trans()
223 int cs) in stm32_fmc2_ebi_check_async_trans() argument
227 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_async_trans()
230 return 0; in stm32_fmc2_ebi_check_async_trans()
232 return -EINVAL; in stm32_fmc2_ebi_check_async_trans()
237 int cs) in stm32_fmc2_ebi_check_cpsize() argument
241 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_cpsize()
244 return 0; in stm32_fmc2_ebi_check_cpsize()
246 return -EINVAL; in stm32_fmc2_ebi_check_cpsize()
251 int cs) in stm32_fmc2_ebi_check_address_hold() argument
255 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_address_hold()
256 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_check_address_hold()
257 regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
259 regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
263 return 0; in stm32_fmc2_ebi_check_address_hold()
265 return -EINVAL; in stm32_fmc2_ebi_check_address_hold()
270 int cs) in stm32_fmc2_ebi_check_clk_period() argument
274 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_clk_period()
275 if (cs) in stm32_fmc2_ebi_check_clk_period()
276 regmap_read(ebi->regmap, FMC2_BCR1, &bcr1); in stm32_fmc2_ebi_check_clk_period()
280 if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN))) in stm32_fmc2_ebi_check_clk_period()
281 return 0; in stm32_fmc2_ebi_check_clk_period()
283 return -EINVAL; in stm32_fmc2_ebi_check_clk_period()
288 int cs) in stm32_fmc2_ebi_check_cclk() argument
290 if (cs) in stm32_fmc2_ebi_check_cclk()
291 return -EINVAL; in stm32_fmc2_ebi_check_cclk()
293 return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); in stm32_fmc2_ebi_check_cclk()
297 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clock_cycles() argument
299 unsigned long hclk = clk_get_rate(ebi->clk); in stm32_fmc2_ebi_ns_to_clock_cycles()
306 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clk_period() argument
308 u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup); in stm32_fmc2_ebi_ns_to_clk_period()
311 regmap_read(ebi->regmap, FMC2_BCR1, &bcr); in stm32_fmc2_ebi_ns_to_clk_period()
312 if (bcr & FMC2_BCR1_CCLKEN || !cs) in stm32_fmc2_ebi_ns_to_clk_period()
313 regmap_read(ebi->regmap, FMC2_BTR1, &btr); in stm32_fmc2_ebi_ns_to_clk_period()
315 regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_ns_to_clk_period()
322 static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) in stm32_fmc2_ebi_get_reg() argument
326 *reg = FMC2_BCR(cs); in stm32_fmc2_ebi_get_reg()
329 *reg = FMC2_BTR(cs); in stm32_fmc2_ebi_get_reg()
332 *reg = FMC2_BWTR(cs); in stm32_fmc2_ebi_get_reg()
338 return -EINVAL; in stm32_fmc2_ebi_get_reg()
341 return 0; in stm32_fmc2_ebi_get_reg()
346 int cs, u32 setup) in stm32_fmc2_ebi_set_bit_field() argument
351 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bit_field()
355 regmap_update_bits(ebi->regmap, reg, prop->reg_mask, in stm32_fmc2_ebi_set_bit_field()
356 setup ? prop->reg_mask : 0); in stm32_fmc2_ebi_set_bit_field()
358 return 0; in stm32_fmc2_ebi_set_bit_field()
363 int cs, u32 setup) in stm32_fmc2_ebi_set_trans_type() argument
366 u32 btr_mask, btr = 0; in stm32_fmc2_ebi_set_trans_type()
367 u32 bwtr_mask, bwtr = 0; in stm32_fmc2_ebi_set_trans_type()
379 * MUXEN = 0, MTYP = 0, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
380 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
385 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
386 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
392 * MUXEN = 0, MTYP = 0, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
393 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
402 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
403 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
412 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
413 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
420 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
421 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 1 in stm32_fmc2_ebi_set_trans_type()
430 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
431 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 2 in stm32_fmc2_ebi_set_trans_type()
440 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
441 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 3 in stm32_fmc2_ebi_set_trans_type()
450 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
451 * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
458 * MUXEN = 0, MTYP = 1, FACCEN = 0, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
459 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
466 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
467 * WREN = 1, EXTMOD = 0, CBURSTRW = 1, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
474 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
475 * WREN = 1, EXTMOD = 0, CBURSTRW = 0, ACCMOD = 0 in stm32_fmc2_ebi_set_trans_type()
482 return -EINVAL; in stm32_fmc2_ebi_set_trans_type()
486 regmap_update_bits(ebi->regmap, FMC2_BWTR(cs), in stm32_fmc2_ebi_set_trans_type()
488 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), btr_mask, btr); in stm32_fmc2_ebi_set_trans_type()
489 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), bcr_mask, bcr); in stm32_fmc2_ebi_set_trans_type()
491 return 0; in stm32_fmc2_ebi_set_trans_type()
496 int cs, u32 setup) in stm32_fmc2_ebi_set_buswidth() argument
509 return -EINVAL; in stm32_fmc2_ebi_set_buswidth()
512 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MWID, val); in stm32_fmc2_ebi_set_buswidth()
514 return 0; in stm32_fmc2_ebi_set_buswidth()
519 int cs, u32 setup) in stm32_fmc2_ebi_set_cpsize() argument
541 return -EINVAL; in stm32_fmc2_ebi_set_cpsize()
544 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_CPSIZE, val); in stm32_fmc2_ebi_set_cpsize()
546 return 0; in stm32_fmc2_ebi_set_cpsize()
551 int cs, u32 setup) in stm32_fmc2_ebi_set_bl_setup() argument
557 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_NBLSET, val); in stm32_fmc2_ebi_set_bl_setup()
559 return 0; in stm32_fmc2_ebi_set_bl_setup()
564 int cs, u32 setup) in stm32_fmc2_ebi_set_address_setup() argument
570 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_setup()
574 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_set_address_setup()
575 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_address_setup()
576 regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
578 regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
585 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDSET, val); in stm32_fmc2_ebi_set_address_setup()
587 return 0; in stm32_fmc2_ebi_set_address_setup()
592 int cs, u32 setup) in stm32_fmc2_ebi_set_address_hold() argument
597 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_hold()
603 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDHLD, val); in stm32_fmc2_ebi_set_address_hold()
605 return 0; in stm32_fmc2_ebi_set_address_hold()
610 int cs, u32 setup) in stm32_fmc2_ebi_set_data_setup() argument
615 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_setup()
621 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAST, val); in stm32_fmc2_ebi_set_data_setup()
623 return 0; in stm32_fmc2_ebi_set_data_setup()
628 int cs, u32 setup) in stm32_fmc2_ebi_set_bus_turnaround() argument
633 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bus_turnaround()
637 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_BUSTURN_MAX) : 0; in stm32_fmc2_ebi_set_bus_turnaround()
639 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_BUSTURN, val); in stm32_fmc2_ebi_set_bus_turnaround()
641 return 0; in stm32_fmc2_ebi_set_bus_turnaround()
646 int cs, u32 setup) in stm32_fmc2_ebi_set_data_hold() argument
651 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_hold()
655 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_data_hold()
656 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_DATAHLD_MAX) : 0; in stm32_fmc2_ebi_set_data_hold()
660 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAHLD, val); in stm32_fmc2_ebi_set_data_hold()
662 return 0; in stm32_fmc2_ebi_set_data_hold()
667 int cs, u32 setup) in stm32_fmc2_ebi_set_clk_period() argument
671 val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1; in stm32_fmc2_ebi_set_clk_period()
673 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_CLKDIV, val); in stm32_fmc2_ebi_set_clk_period()
675 return 0; in stm32_fmc2_ebi_set_clk_period()
680 int cs, u32 setup) in stm32_fmc2_ebi_set_data_latency() argument
684 val = setup > 1 ? min_t(u32, setup - 2, FMC2_BTR_DATLAT_MAX) : 0; in stm32_fmc2_ebi_set_data_latency()
686 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_DATLAT, val); in stm32_fmc2_ebi_set_data_latency()
688 return 0; in stm32_fmc2_ebi_set_data_latency()
693 int cs, u32 setup) in stm32_fmc2_ebi_set_max_low_pulse() argument
698 return 0; in stm32_fmc2_ebi_set_max_low_pulse()
700 regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr); in stm32_fmc2_ebi_set_max_low_pulse()
703 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
704 FMC2_PCSCNTR_CNTBEN(cs), in stm32_fmc2_ebi_set_max_low_pulse()
705 FMC2_PCSCNTR_CNTBEN(cs)); in stm32_fmc2_ebi_set_max_low_pulse()
707 new_val = min_t(u32, setup - 1, FMC2_PCSCNTR_CSCOUNT_MAX); in stm32_fmc2_ebi_set_max_low_pulse()
711 return 0; in stm32_fmc2_ebi_set_max_low_pulse()
714 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
717 return 0; in stm32_fmc2_ebi_set_max_low_pulse()
721 /* st,fmc2-ebi-cs-trans-type must be the first property */
723 .name = "st,fmc2-ebi-cs-transaction-type",
728 .name = "st,fmc2-ebi-cs-cclk-enable",
736 .name = "st,fmc2-ebi-cs-mux-enable",
744 .name = "st,fmc2-ebi-cs-buswidth",
749 .name = "st,fmc2-ebi-cs-waitpol-high",
756 .name = "st,fmc2-ebi-cs-waitcfg-enable",
764 .name = "st,fmc2-ebi-cs-wait-enable",
772 .name = "st,fmc2-ebi-cs-asyncwait-enable",
780 .name = "st,fmc2-ebi-cs-cpsize",
785 .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
790 .name = "st,fmc2-ebi-cs-address-setup-ns",
798 .name = "st,fmc2-ebi-cs-address-hold-ns",
806 .name = "st,fmc2-ebi-cs-data-setup-ns",
814 .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
821 .name = "st,fmc2-ebi-cs-data-hold-ns",
828 .name = "st,fmc2-ebi-cs-clk-period-ns",
835 .name = "st,fmc2-ebi-cs-data-latency-ns",
841 .name = "st,fmc2-ebi-cs-write-address-setup-ns",
849 .name = "st,fmc2-ebi-cs-write-address-hold-ns",
857 .name = "st,fmc2-ebi-cs-write-data-setup-ns",
865 .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
872 .name = "st,fmc2-ebi-cs-write-data-hold-ns",
879 .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
888 int cs) in stm32_fmc2_ebi_parse_prop() argument
890 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_prop()
891 u32 setup = 0; in stm32_fmc2_ebi_parse_prop()
893 if (!prop->set) { in stm32_fmc2_ebi_parse_prop()
894 dev_err(dev, "property %s is not well defined\n", prop->name); in stm32_fmc2_ebi_parse_prop()
895 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
898 if (prop->check && prop->check(ebi, prop, cs)) in stm32_fmc2_ebi_parse_prop()
900 return 0; in stm32_fmc2_ebi_parse_prop()
902 if (prop->bprop) { in stm32_fmc2_ebi_parse_prop()
905 bprop = of_property_read_bool(dev_node, prop->name); in stm32_fmc2_ebi_parse_prop()
906 if (prop->mprop && !bprop) { in stm32_fmc2_ebi_parse_prop()
908 prop->name); in stm32_fmc2_ebi_parse_prop()
909 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
918 ret = of_property_read_u32(dev_node, prop->name, &val); in stm32_fmc2_ebi_parse_prop()
919 if (prop->mprop && ret) { in stm32_fmc2_ebi_parse_prop()
921 prop->name); in stm32_fmc2_ebi_parse_prop()
926 setup = prop->reset_val; in stm32_fmc2_ebi_parse_prop()
927 else if (prop->calculate) in stm32_fmc2_ebi_parse_prop()
928 setup = prop->calculate(ebi, cs, val); in stm32_fmc2_ebi_parse_prop()
933 return prop->set(ebi, prop, cs, setup); in stm32_fmc2_ebi_parse_prop()
936 static void stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_enable_bank() argument
938 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), in stm32_fmc2_ebi_enable_bank()
942 static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_disable_bank() argument
944 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0); in stm32_fmc2_ebi_disable_bank()
949 unsigned int cs; in stm32_fmc2_ebi_save_setup() local
951 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_save_setup()
952 regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]); in stm32_fmc2_ebi_save_setup()
953 regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]); in stm32_fmc2_ebi_save_setup()
954 regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]); in stm32_fmc2_ebi_save_setup()
957 regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr); in stm32_fmc2_ebi_save_setup()
962 unsigned int cs; in stm32_fmc2_ebi_set_setup() local
964 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_set_setup()
965 regmap_write(ebi->regmap, FMC2_BCR(cs), ebi->bcr[cs]); in stm32_fmc2_ebi_set_setup()
966 regmap_write(ebi->regmap, FMC2_BTR(cs), ebi->btr[cs]); in stm32_fmc2_ebi_set_setup()
967 regmap_write(ebi->regmap, FMC2_BWTR(cs), ebi->bwtr[cs]); in stm32_fmc2_ebi_set_setup()
970 regmap_write(ebi->regmap, FMC2_PCSCNTR, ebi->pcscntr); in stm32_fmc2_ebi_set_setup()
975 unsigned int cs; in stm32_fmc2_ebi_disable_banks() local
977 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_disable_banks()
978 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_disable_banks()
981 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_disable_banks()
988 unsigned int cs; in stm32_fmc2_ebi_nwait_used_by_ctrls() local
991 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_nwait_used_by_ctrls()
992 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_nwait_used_by_ctrls()
995 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_nwait_used_by_ctrls()
997 ebi->bank_assigned & BIT(FMC2_NAND)) in stm32_fmc2_ebi_nwait_used_by_ctrls()
1006 regmap_update_bits(ebi->regmap, FMC2_BCR1, in stm32_fmc2_ebi_enable()
1012 regmap_update_bits(ebi->regmap, FMC2_BCR1, FMC2_BCR1_FMC2EN, 0); in stm32_fmc2_ebi_disable()
1017 u32 cs) in stm32_fmc2_ebi_setup_cs() argument
1022 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1024 for (i = 0; i < ARRAY_SIZE(stm32_fmc2_child_props); i++) { in stm32_fmc2_ebi_setup_cs()
1027 ret = stm32_fmc2_ebi_parse_prop(ebi, dev_node, p, cs); in stm32_fmc2_ebi_setup_cs()
1029 dev_err(ebi->dev, "property %s could not be set: %d\n", in stm32_fmc2_ebi_setup_cs()
1030 p->name, ret); in stm32_fmc2_ebi_setup_cs()
1035 stm32_fmc2_ebi_enable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1037 return 0; in stm32_fmc2_ebi_setup_cs()
1042 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_dt()
1048 for_each_available_child_of_node(dev->of_node, child) { in stm32_fmc2_ebi_parse_dt()
1060 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1063 if (ebi->bank_assigned & BIT(bank)) { in stm32_fmc2_ebi_parse_dt()
1066 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1079 ebi->bank_assigned |= BIT(bank); in stm32_fmc2_ebi_parse_dt()
1085 return -ENODEV; in stm32_fmc2_ebi_parse_dt()
1090 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1095 return of_platform_populate(dev->of_node, NULL, NULL, dev); in stm32_fmc2_ebi_parse_dt()
1100 struct device *dev = &pdev->dev; in stm32_fmc2_ebi_probe()
1105 ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL); in stm32_fmc2_ebi_probe()
1107 return -ENOMEM; in stm32_fmc2_ebi_probe()
1109 ebi->dev = dev; in stm32_fmc2_ebi_probe()
1111 ebi->regmap = device_node_to_regmap(dev->of_node); in stm32_fmc2_ebi_probe()
1112 if (IS_ERR(ebi->regmap)) in stm32_fmc2_ebi_probe()
1113 return PTR_ERR(ebi->regmap); in stm32_fmc2_ebi_probe()
1115 ebi->clk = devm_clk_get(dev, NULL); in stm32_fmc2_ebi_probe()
1116 if (IS_ERR(ebi->clk)) in stm32_fmc2_ebi_probe()
1117 return PTR_ERR(ebi->clk); in stm32_fmc2_ebi_probe()
1120 if (PTR_ERR(rstc) == -EPROBE_DEFER) in stm32_fmc2_ebi_probe()
1121 return -EPROBE_DEFER; in stm32_fmc2_ebi_probe()
1123 ret = clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_probe()
1139 return 0; in stm32_fmc2_ebi_probe()
1144 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_probe()
1153 of_platform_depopulate(&pdev->dev); in stm32_fmc2_ebi_remove()
1156 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_remove()
1164 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_suspend()
1167 return 0; in stm32_fmc2_ebi_suspend()
1177 ret = clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_resume()
1184 return 0; in stm32_fmc2_ebi_resume()
1191 {.compatible = "st,stm32mp1-fmc2-ebi"},