Lines Matching +full:emc +full:- +full:cfg +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
9 * TI AEMIF driver, Copyright (C) 2010 - 2013 Texas Instruments Inc.
65 cycles = DIV_ROUND_UP(val * pl172->rate, NSEC_PER_MSEC) - start; in pl172_timing_prop()
69 dev_err(&adev->dev, "%s timing too tight\n", name); in pl172_timing_prop()
70 return -EINVAL; in pl172_timing_prop()
73 writel(cycles, pl172->base + reg_offset); in pl172_timing_prop()
76 dev_dbg(&adev->dev, "%s: %u cycle(s)\n", name, start + in pl172_timing_prop()
77 readl(pl172->base + reg_offset)); in pl172_timing_prop()
86 u32 cfg; in pl172_setup_static() local
90 if (!of_property_read_u32(np, "mpmc,memory-width", &cfg)) { in pl172_setup_static()
91 if (cfg == 8) { in pl172_setup_static()
92 cfg = MPMC_STATIC_CFG_MW_8BIT; in pl172_setup_static()
93 } else if (cfg == 16) { in pl172_setup_static()
94 cfg = MPMC_STATIC_CFG_MW_16BIT; in pl172_setup_static()
95 } else if (cfg == 32) { in pl172_setup_static()
96 cfg = MPMC_STATIC_CFG_MW_32BIT; in pl172_setup_static()
98 dev_err(&adev->dev, "invalid memory width cs%u\n", cs); in pl172_setup_static()
99 return -EINVAL; in pl172_setup_static()
102 dev_err(&adev->dev, "memory-width property required\n"); in pl172_setup_static()
103 return -EINVAL; in pl172_setup_static()
106 if (of_property_read_bool(np, "mpmc,async-page-mode")) in pl172_setup_static()
107 cfg |= MPMC_STATIC_CFG_PM; in pl172_setup_static()
109 if (of_property_read_bool(np, "mpmc,cs-active-high")) in pl172_setup_static()
110 cfg |= MPMC_STATIC_CFG_PC; in pl172_setup_static()
112 if (of_property_read_bool(np, "mpmc,byte-lane-low")) in pl172_setup_static()
113 cfg |= MPMC_STATIC_CFG_PB; in pl172_setup_static()
115 if (of_property_read_bool(np, "mpmc,extended-wait")) in pl172_setup_static()
116 cfg |= MPMC_STATIC_CFG_EW; in pl172_setup_static()
119 of_property_read_bool(np, "mpmc,buffer-enable")) in pl172_setup_static()
120 cfg |= MPMC_STATIC_CFG_B; in pl172_setup_static()
122 if (of_property_read_bool(np, "mpmc,write-protect")) in pl172_setup_static()
123 cfg |= MPMC_STATIC_CFG_P; in pl172_setup_static()
125 writel(cfg, pl172->base + MPMC_STATIC_CFG(cs)); in pl172_setup_static()
126 dev_dbg(&adev->dev, "mpmc static config cs%u: 0x%08x\n", cs, cfg); in pl172_setup_static()
129 ret = pl172_timing_prop(adev, np, "mpmc,write-enable-delay", in pl172_setup_static()
135 ret = pl172_timing_prop(adev, np, "mpmc,output-enable-delay", in pl172_setup_static()
141 ret = pl172_timing_prop(adev, np, "mpmc,read-access-delay", in pl172_setup_static()
147 ret = pl172_timing_prop(adev, np, "mpmc,page-mode-read-delay", in pl172_setup_static()
153 ret = pl172_timing_prop(adev, np, "mpmc,write-access-delay", in pl172_setup_static()
155 MPMC_STATIC_WAIT_WR_MAX, 2); in pl172_setup_static()
159 ret = pl172_timing_prop(adev, np, "mpmc,turn-round-delay", in pl172_setup_static()
167 dev_err(&adev->dev, "failed to configure cs%u\n", cs); in pl172_setup_static()
178 dev_err(&adev->dev, "cs%u invalid\n", cs); in pl172_parse_cs_config()
179 return -EINVAL; in pl172_parse_cs_config()
185 dev_err(&adev->dev, "cs property required\n"); in pl172_parse_cs_config()
187 return -EINVAL; in pl172_parse_cs_config()
196 struct device_node *child_np, *np = adev->dev.of_node; in pl172_probe()
197 struct device *dev = &adev->dev; in pl172_probe()
217 return -ENOMEM; in pl172_probe()
219 pl172->clk = devm_clk_get(dev, "mpmcclk"); in pl172_probe()
220 if (IS_ERR(pl172->clk)) { in pl172_probe()
222 return PTR_ERR(pl172->clk); in pl172_probe()
225 ret = clk_prepare_enable(pl172->clk); in pl172_probe()
231 pl172->rate = clk_get_rate(pl172->clk) / MSEC_PER_SEC; in pl172_probe()
232 if (!pl172->rate) { in pl172_probe()
234 ret = -EINVAL; in pl172_probe()
244 pl172->base = devm_ioremap(dev, adev->res.start, in pl172_probe()
245 resource_size(&adev->res)); in pl172_probe()
246 if (!pl172->base) { in pl172_probe()
248 ret = -ENOMEM; in pl172_probe()
272 clk_disable_unprepare(pl172->clk); in pl172_probe()
280 clk_disable_unprepare(pl172->clk); in pl172_remove()
285 /* PrimeCell MPMC PL172, EMC found on NXP LPC18xx and LPC43xx */
290 /* PrimeCell MPMC PL175, EMC found on NXP LPC32xx */
306 .name = "memory-pl172",