Lines Matching +full:4 +full:- +full:pixel +full:- +full:align
1 // SPDX-License-Identifier: GPL-2.0
9 #include <media/v4l2-mem2mem.h>
14 #define VERT_FILTER_RAM_SIZE 8 /* bytes per pixel row */
17 * 128 bits per 4x4 tile = 128/(8*4) bytes per row
19 #define BSD_CTRL_RAM_SIZE 4 /* bytes per pixel row */
21 #define VERT_SAO_RAM_SIZE 48 /* bytes per pixel */
30 struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; in hantro_hevc_ref_init()
32 hevc_dec->ref_bufs_used = 0; in hantro_hevc_ref_init()
38 struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; in hantro_hevc_get_ref_buf()
43 if (hevc_dec->ref_bufs_poc[i] == poc) { in hantro_hevc_get_ref_buf()
44 hevc_dec->ref_bufs_used |= 1 << i; in hantro_hevc_get_ref_buf()
45 return hevc_dec->ref_bufs[i].dma; in hantro_hevc_get_ref_buf()
54 struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; in hantro_hevc_add_ref_buf()
59 if (!(hevc_dec->ref_bufs_used & 1 << i)) { in hantro_hevc_add_ref_buf()
60 hevc_dec->ref_bufs_used |= 1 << i; in hantro_hevc_add_ref_buf()
61 hevc_dec->ref_bufs_poc[i] = poc; in hantro_hevc_add_ref_buf()
62 hevc_dec->ref_bufs[i].dma = addr; in hantro_hevc_add_ref_buf()
67 return -EINVAL; in hantro_hevc_add_ref_buf()
72 struct hantro_dev *vpu = ctx->dev; in tile_buffer_reallocate()
73 struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; in tile_buffer_reallocate()
74 const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls; in tile_buffer_reallocate()
75 const struct v4l2_ctrl_hevc_pps *pps = ctrls->pps; in tile_buffer_reallocate()
76 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in tile_buffer_reallocate()
77 unsigned int num_tile_cols = pps->num_tile_columns_minus1 + 1; in tile_buffer_reallocate()
78 unsigned int height64 = (sps->pic_height_in_luma_samples + 63) & ~63; in tile_buffer_reallocate()
82 num_tile_cols <= hevc_dec->num_tile_cols_allocated) in tile_buffer_reallocate()
86 if (hevc_dec->tile_filter.cpu) { in tile_buffer_reallocate()
87 dma_free_coherent(vpu->dev, hevc_dec->tile_filter.size, in tile_buffer_reallocate()
88 hevc_dec->tile_filter.cpu, in tile_buffer_reallocate()
89 hevc_dec->tile_filter.dma); in tile_buffer_reallocate()
90 hevc_dec->tile_filter.cpu = NULL; in tile_buffer_reallocate()
93 if (hevc_dec->tile_sao.cpu) { in tile_buffer_reallocate()
94 dma_free_coherent(vpu->dev, hevc_dec->tile_sao.size, in tile_buffer_reallocate()
95 hevc_dec->tile_sao.cpu, in tile_buffer_reallocate()
96 hevc_dec->tile_sao.dma); in tile_buffer_reallocate()
97 hevc_dec->tile_sao.cpu = NULL; in tile_buffer_reallocate()
100 if (hevc_dec->tile_bsd.cpu) { in tile_buffer_reallocate()
101 dma_free_coherent(vpu->dev, hevc_dec->tile_bsd.size, in tile_buffer_reallocate()
102 hevc_dec->tile_bsd.cpu, in tile_buffer_reallocate()
103 hevc_dec->tile_bsd.dma); in tile_buffer_reallocate()
104 hevc_dec->tile_bsd.cpu = NULL; in tile_buffer_reallocate()
107 size = (VERT_FILTER_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8; in tile_buffer_reallocate()
108 hevc_dec->tile_filter.cpu = dma_alloc_coherent(vpu->dev, size, in tile_buffer_reallocate()
109 &hevc_dec->tile_filter.dma, in tile_buffer_reallocate()
111 if (!hevc_dec->tile_filter.cpu) in tile_buffer_reallocate()
112 return -ENOMEM; in tile_buffer_reallocate()
113 hevc_dec->tile_filter.size = size; in tile_buffer_reallocate()
115 size = (VERT_SAO_RAM_SIZE * height64 * (num_tile_cols - 1) * ctx->bit_depth) / 8; in tile_buffer_reallocate()
116 hevc_dec->tile_sao.cpu = dma_alloc_coherent(vpu->dev, size, in tile_buffer_reallocate()
117 &hevc_dec->tile_sao.dma, in tile_buffer_reallocate()
119 if (!hevc_dec->tile_sao.cpu) in tile_buffer_reallocate()
121 hevc_dec->tile_sao.size = size; in tile_buffer_reallocate()
123 size = BSD_CTRL_RAM_SIZE * height64 * (num_tile_cols - 1); in tile_buffer_reallocate()
124 hevc_dec->tile_bsd.cpu = dma_alloc_coherent(vpu->dev, size, in tile_buffer_reallocate()
125 &hevc_dec->tile_bsd.dma, in tile_buffer_reallocate()
127 if (!hevc_dec->tile_bsd.cpu) in tile_buffer_reallocate()
129 hevc_dec->tile_bsd.size = size; in tile_buffer_reallocate()
131 hevc_dec->num_tile_cols_allocated = num_tile_cols; in tile_buffer_reallocate()
136 if (hevc_dec->tile_sao.cpu) in tile_buffer_reallocate()
137 dma_free_coherent(vpu->dev, hevc_dec->tile_sao.size, in tile_buffer_reallocate()
138 hevc_dec->tile_sao.cpu, in tile_buffer_reallocate()
139 hevc_dec->tile_sao.dma); in tile_buffer_reallocate()
140 hevc_dec->tile_sao.cpu = NULL; in tile_buffer_reallocate()
143 if (hevc_dec->tile_filter.cpu) in tile_buffer_reallocate()
144 dma_free_coherent(vpu->dev, hevc_dec->tile_filter.size, in tile_buffer_reallocate()
145 hevc_dec->tile_filter.cpu, in tile_buffer_reallocate()
146 hevc_dec->tile_filter.dma); in tile_buffer_reallocate()
147 hevc_dec->tile_filter.cpu = NULL; in tile_buffer_reallocate()
149 return -ENOMEM; in tile_buffer_reallocate()
155 * for tile pixel format check if the width and height match in hantro_hevc_validate_sps()
158 if (ctx->vpu_dst_fmt->fourcc == V4L2_PIX_FMT_NV12_4L4) { in hantro_hevc_validate_sps()
159 if (ctx->dst_fmt.width != in hantro_hevc_validate_sps()
160 ALIGN(sps->pic_width_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_width)) in hantro_hevc_validate_sps()
161 return -EINVAL; in hantro_hevc_validate_sps()
163 if (ctx->dst_fmt.height != in hantro_hevc_validate_sps()
164 ALIGN(sps->pic_height_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_height)) in hantro_hevc_validate_sps()
165 return -EINVAL; in hantro_hevc_validate_sps()
173 struct hantro_hevc_dec_hw_ctx *hevc_ctx = &ctx->hevc_dec; in hantro_hevc_dec_prepare_run()
174 struct hantro_hevc_dec_ctrls *ctrls = &hevc_ctx->ctrls; in hantro_hevc_dec_prepare_run()
179 ctrls->decode_params = in hantro_hevc_dec_prepare_run()
181 if (WARN_ON(!ctrls->decode_params)) in hantro_hevc_dec_prepare_run()
182 return -EINVAL; in hantro_hevc_dec_prepare_run()
184 ctrls->scaling = in hantro_hevc_dec_prepare_run()
186 if (WARN_ON(!ctrls->scaling)) in hantro_hevc_dec_prepare_run()
187 return -EINVAL; in hantro_hevc_dec_prepare_run()
189 ctrls->sps = in hantro_hevc_dec_prepare_run()
191 if (WARN_ON(!ctrls->sps)) in hantro_hevc_dec_prepare_run()
192 return -EINVAL; in hantro_hevc_dec_prepare_run()
194 ret = hantro_hevc_validate_sps(ctx, ctrls->sps); in hantro_hevc_dec_prepare_run()
198 ctrls->pps = in hantro_hevc_dec_prepare_run()
200 if (WARN_ON(!ctrls->pps)) in hantro_hevc_dec_prepare_run()
201 return -EINVAL; in hantro_hevc_dec_prepare_run()
212 struct hantro_dev *vpu = ctx->dev; in hantro_hevc_dec_exit()
213 struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; in hantro_hevc_dec_exit()
215 if (hevc_dec->tile_sizes.cpu) in hantro_hevc_dec_exit()
216 dma_free_coherent(vpu->dev, hevc_dec->tile_sizes.size, in hantro_hevc_dec_exit()
217 hevc_dec->tile_sizes.cpu, in hantro_hevc_dec_exit()
218 hevc_dec->tile_sizes.dma); in hantro_hevc_dec_exit()
219 hevc_dec->tile_sizes.cpu = NULL; in hantro_hevc_dec_exit()
221 if (hevc_dec->scaling_lists.cpu) in hantro_hevc_dec_exit()
222 dma_free_coherent(vpu->dev, hevc_dec->scaling_lists.size, in hantro_hevc_dec_exit()
223 hevc_dec->scaling_lists.cpu, in hantro_hevc_dec_exit()
224 hevc_dec->scaling_lists.dma); in hantro_hevc_dec_exit()
225 hevc_dec->scaling_lists.cpu = NULL; in hantro_hevc_dec_exit()
227 if (hevc_dec->tile_filter.cpu) in hantro_hevc_dec_exit()
228 dma_free_coherent(vpu->dev, hevc_dec->tile_filter.size, in hantro_hevc_dec_exit()
229 hevc_dec->tile_filter.cpu, in hantro_hevc_dec_exit()
230 hevc_dec->tile_filter.dma); in hantro_hevc_dec_exit()
231 hevc_dec->tile_filter.cpu = NULL; in hantro_hevc_dec_exit()
233 if (hevc_dec->tile_sao.cpu) in hantro_hevc_dec_exit()
234 dma_free_coherent(vpu->dev, hevc_dec->tile_sao.size, in hantro_hevc_dec_exit()
235 hevc_dec->tile_sao.cpu, in hantro_hevc_dec_exit()
236 hevc_dec->tile_sao.dma); in hantro_hevc_dec_exit()
237 hevc_dec->tile_sao.cpu = NULL; in hantro_hevc_dec_exit()
239 if (hevc_dec->tile_bsd.cpu) in hantro_hevc_dec_exit()
240 dma_free_coherent(vpu->dev, hevc_dec->tile_bsd.size, in hantro_hevc_dec_exit()
241 hevc_dec->tile_bsd.cpu, in hantro_hevc_dec_exit()
242 hevc_dec->tile_bsd.dma); in hantro_hevc_dec_exit()
243 hevc_dec->tile_bsd.cpu = NULL; in hantro_hevc_dec_exit()
248 struct hantro_dev *vpu = ctx->dev; in hantro_hevc_dec_init()
249 struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec; in hantro_hevc_dec_init()
259 size = round_up(MAX_TILE_COLS * MAX_TILE_ROWS * 4 * sizeof(u16) + 16, 16); in hantro_hevc_dec_init()
260 hevc_dec->tile_sizes.cpu = dma_alloc_coherent(vpu->dev, size, in hantro_hevc_dec_init()
261 &hevc_dec->tile_sizes.dma, in hantro_hevc_dec_init()
263 if (!hevc_dec->tile_sizes.cpu) in hantro_hevc_dec_init()
264 return -ENOMEM; in hantro_hevc_dec_init()
266 hevc_dec->tile_sizes.size = size; in hantro_hevc_dec_init()
268 hevc_dec->scaling_lists.cpu = dma_alloc_coherent(vpu->dev, SCALING_LIST_SIZE, in hantro_hevc_dec_init()
269 &hevc_dec->scaling_lists.dma, in hantro_hevc_dec_init()
271 if (!hevc_dec->scaling_lists.cpu) in hantro_hevc_dec_init()
272 return -ENOMEM; in hantro_hevc_dec_init()
274 hevc_dec->scaling_lists.size = SCALING_LIST_SIZE; in hantro_hevc_dec_init()