Lines Matching defs:reg_val
86 u32 reg_val; in _wave5_print_reg_err() local
306 u32 reg_val; in setup_wave5_properties() local
348 u32 reg_val; in wave5_vpu_get_version() local
376 u32 i, reg_val, reason_code; in wave5_vpu_init() local
522 u32 reg_val = 0; in wave5_vpu_hw_flush_instance() local
557 u32 reg_val, fail_res; in wave5_vpu_dec_init_seq() local
586 u32 reg_val; in wave5_get_dec_seq_result() local
641 u32 reg_val; in wave5_vpu_dec_get_seq_info() local
680 u32 reg_val, cbcr_interleave, nv21, pic_size; in wave5_vpu_dec_register_framebuffer() local
835 u32 reg_val; in wave5_vpu_decode() local
880 u32 index, nal_unit_type, reg_val, sub_layer_info; in wave5_vpu_dec_get_result() local
989 u32 reg_val; in wave5_vpu_re_init() local
1081 u32 reg_val; in wave5_vpu_sleep_wake() local
1375 u32 reg_val; in wave5_vpu_build_up_enc_param() local
1522 u32 reg_val = 0, rot_mir_mode, fixed_cu_size_mode = 0x7; in wave5_vpu_enc_init_seq() local
1703 u32 reg_val; in wave5_vpu_enc_get_seq_info() local
1754 u32 reg_val = 0, pic_size = 0, mv_col_size, fbc_y_tbl_size, fbc_c_tbl_size; in wave5_vpu_enc_register_framebuffer() local
1949 u32 reg_val = 0; in wave5_vpu_encode() local
2128 u32 reg_val; in wave5_vpu_enc_get_result() local