Lines Matching +full:y +full:- +full:offset
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020-2021 NXP
16 #include <media/videobuf2-v4l2.h>
17 #include <media/videobuf2-dma-contig.h>
49 //x means source data , y means destination data
50 #define STREAM_CONFIG_FORMAT_SET(x, y) CONFIG_SET(x, y, 0, 0x0000000F) argument
51 #define STREAM_CONFIG_STRBUFIDX_SET(x, y) CONFIG_SET(x, y, 8, 0x00000300) argument
52 #define STREAM_CONFIG_NOSEQ_SET(x, y) CONFIG_SET(x, y, 10, 0x00000400) argument
53 #define STREAM_CONFIG_DEBLOCK_SET(x, y) CONFIG_SET(x, y, 11, 0x00000800) argument
54 #define STREAM_CONFIG_DERING_SET(x, y) CONFIG_SET(x, y, 12, 0x00001000) argument
55 #define STREAM_CONFIG_IBWAIT_SET(x, y) CONFIG_SET(x, y, 13, 0x00002000) argument
56 #define STREAM_CONFIG_FBC_SET(x, y) CONFIG_SET(x, y, 14, 0x00004000) argument
57 #define STREAM_CONFIG_PLAY_MODE_SET(x, y) CONFIG_SET(x, y, 16, 0x00030000) argument
58 #define STREAM_CONFIG_ENABLE_DCP_SET(x, y) CONFIG_SET(x, y, 20, 0x00100000) argument
59 #define STREAM_CONFIG_NUM_STR_BUF_SET(x, y) CONFIG_SET(x, y, 21, 0x00600000) argument
60 #define STREAM_CONFIG_MALONE_USAGE_SET(x, y) CONFIG_SET(x, y, 23, 0x01800000) argument
61 #define STREAM_CONFIG_MULTI_VID_SET(x, y) CONFIG_SET(x, y, 25, 0x02000000) argument
62 #define STREAM_CONFIG_OBFUSC_EN_SET(x, y) CONFIG_SET(x, y, 26, 0x04000000) argument
63 #define STREAM_CONFIG_RC4_EN_SET(x, y) CONFIG_SET(x, y, 27, 0x08000000) argument
64 #define STREAM_CONFIG_MCX_SET(x, y) CONFIG_SET(x, y, 28, 0x10000000) argument
65 #define STREAM_CONFIG_PES_SET(x, y) CONFIG_SET(x, y, 29, 0x20000000) argument
66 #define STREAM_CONFIG_NUM_DBE_SET(x, y) CONFIG_SET(x, y, 30, 0x40000000) argument
67 #define STREAM_CONFIG_FS_CTRL_MODE_SET(x, y) CONFIG_SET(x, y, 31, 0x80000000) argument
352 unsigned long offset; in vpu_malone_init_rpc() local
355 if (rpc->phys < boot_addr) in vpu_malone_init_rpc()
358 iface = rpc->virt; in vpu_malone_init_rpc()
359 base_phy_addr = rpc->phys - boot_addr; in vpu_malone_init_rpc()
360 hc = shared->priv; in vpu_malone_init_rpc()
362 shared->iface = iface; in vpu_malone_init_rpc()
363 shared->boot_addr = boot_addr; in vpu_malone_init_rpc()
365 iface->exec_base_addr = base_phy_addr; in vpu_malone_init_rpc()
366 iface->exec_area_size = rpc->length; in vpu_malone_init_rpc()
368 offset = sizeof(struct malone_iface); in vpu_malone_init_rpc()
369 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
371 shared->cmd_desc = &iface->cmd_buffer_desc.buffer; in vpu_malone_init_rpc()
372 shared->cmd_mem_vir = rpc->virt + offset; in vpu_malone_init_rpc()
373 iface->cmd_buffer_desc.buffer.start = in vpu_malone_init_rpc()
374 iface->cmd_buffer_desc.buffer.rptr = in vpu_malone_init_rpc()
375 iface->cmd_buffer_desc.buffer.wptr = phy_addr; in vpu_malone_init_rpc()
376 iface->cmd_buffer_desc.buffer.end = iface->cmd_buffer_desc.buffer.start + CMD_SIZE; in vpu_malone_init_rpc()
377 offset += CMD_SIZE; in vpu_malone_init_rpc()
378 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
380 shared->msg_desc = &iface->msg_buffer_desc.buffer; in vpu_malone_init_rpc()
381 shared->msg_mem_vir = rpc->virt + offset; in vpu_malone_init_rpc()
382 iface->msg_buffer_desc.buffer.start = in vpu_malone_init_rpc()
383 iface->msg_buffer_desc.buffer.wptr = in vpu_malone_init_rpc()
384 iface->msg_buffer_desc.buffer.rptr = phy_addr; in vpu_malone_init_rpc()
385 iface->msg_buffer_desc.buffer.end = iface->msg_buffer_desc.buffer.start + MSG_SIZE; in vpu_malone_init_rpc()
386 offset += MSG_SIZE; in vpu_malone_init_rpc()
387 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
389 iface->codec_param_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
390 hc->codec_param = rpc->virt + offset; in vpu_malone_init_rpc()
391 offset += CODEC_SIZE; in vpu_malone_init_rpc()
392 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
394 iface->jpeg_param_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
395 hc->jpg = rpc->virt + offset; in vpu_malone_init_rpc()
396 offset += JPEG_SIZE; in vpu_malone_init_rpc()
397 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
399 iface->seq_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
400 hc->seq_mem = rpc->virt + offset; in vpu_malone_init_rpc()
401 offset += SEQ_SIZE; in vpu_malone_init_rpc()
402 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
404 iface->pic_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
405 hc->pic_mem = rpc->virt + offset; in vpu_malone_init_rpc()
406 offset += PIC_SIZE; in vpu_malone_init_rpc()
407 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
409 iface->gop_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
410 hc->gop_mem = rpc->virt + offset; in vpu_malone_init_rpc()
411 offset += GOP_SIZE; in vpu_malone_init_rpc()
412 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
414 iface->qmeter_info_tab_desc.array_base = phy_addr; in vpu_malone_init_rpc()
415 hc->qmeter_mem = rpc->virt + offset; in vpu_malone_init_rpc()
416 offset += QMETER_SIZE; in vpu_malone_init_rpc()
417 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
419 iface->dbglog_desc.addr = phy_addr; in vpu_malone_init_rpc()
420 iface->dbglog_desc.size = DBGLOG_SIZE; in vpu_malone_init_rpc()
421 hc->dbglog_mem = rpc->virt + offset; in vpu_malone_init_rpc()
422 offset += DBGLOG_SIZE; in vpu_malone_init_rpc()
423 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
426 iface->eng_access_buff_desc[i].buffer.start = in vpu_malone_init_rpc()
427 iface->eng_access_buff_desc[i].buffer.wptr = in vpu_malone_init_rpc()
428 iface->eng_access_buff_desc[i].buffer.rptr = phy_addr; in vpu_malone_init_rpc()
429 iface->eng_access_buff_desc[i].buffer.end = in vpu_malone_init_rpc()
430 iface->eng_access_buff_desc[i].buffer.start + ENG_SIZE; in vpu_malone_init_rpc()
431 offset += ENG_SIZE; in vpu_malone_init_rpc()
432 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
436 iface->encrypt_info[i] = phy_addr; in vpu_malone_init_rpc()
437 offset += sizeof(struct vpu_malone_encrypt_info); in vpu_malone_init_rpc()
438 phy_addr = base_phy_addr + offset; in vpu_malone_init_rpc()
441 rpc->bytesused = offset; in vpu_malone_init_rpc()
447 struct malone_iface *iface = shared->iface; in vpu_malone_set_log_buf()
449 iface->debug_buffer_desc.buffer.start = in vpu_malone_set_log_buf()
450 iface->debug_buffer_desc.buffer.wptr = in vpu_malone_set_log_buf()
451 iface->debug_buffer_desc.buffer.rptr = log->phys - shared->boot_addr; in vpu_malone_set_log_buf()
452 iface->debug_buffer_desc.buffer.end = iface->debug_buffer_desc.buffer.start + log->length; in vpu_malone_set_log_buf()
463 struct malone_iface *iface = shared->iface; in vpu_malone_set_system_cfg()
464 struct vpu_rpc_system_config *config = &iface->system_cfg; in vpu_malone_set_system_cfg()
465 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_set_system_cfg()
470 u32 offset = get_str_buffer_offset(i); in vpu_malone_set_system_cfg() local
472 hc->buf_addr[i] = regs_base + offset; in vpu_malone_set_system_cfg()
473 hc->str_buf[i] = regs + offset; in vpu_malone_set_system_cfg()
479 struct malone_iface *iface = shared->iface; in vpu_malone_get_version()
481 vpu_malone_enable_format(V4L2_PIX_FMT_RV30, iface->fw_version & MALONE_DEC_FMT_RV_MASK); in vpu_malone_get_version()
482 vpu_malone_enable_format(V4L2_PIX_FMT_RV40, iface->fw_version & MALONE_DEC_FMT_RV_MASK); in vpu_malone_get_version()
484 return iface->fw_version; in vpu_malone_get_version()
496 struct malone_iface *iface = shared->iface; in vpu_malone_config_stream_buffer()
497 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_config_stream_buffer()
498 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_config_stream_buffer()
500 writel(buf->phys, &str_buf->start); in vpu_malone_config_stream_buffer()
501 writel(buf->phys, &str_buf->rptr); in vpu_malone_config_stream_buffer()
502 writel(buf->phys, &str_buf->wptr); in vpu_malone_config_stream_buffer()
503 writel(buf->phys + buf->length, &str_buf->end); in vpu_malone_config_stream_buffer()
504 writel(0x1, &str_buf->lwm); in vpu_malone_config_stream_buffer()
506 iface->stream_buffer_desc[instance][0] = hc->buf_addr[instance]; in vpu_malone_config_stream_buffer()
515 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_get_stream_buffer_desc()
516 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_get_stream_buffer_desc()
519 desc->wptr = readl(&str_buf->wptr); in vpu_malone_get_stream_buffer_desc()
520 desc->rptr = readl(&str_buf->rptr); in vpu_malone_get_stream_buffer_desc()
521 desc->start = readl(&str_buf->start); in vpu_malone_get_stream_buffer_desc()
522 desc->end = readl(&str_buf->end); in vpu_malone_get_stream_buffer_desc()
532 writel(wptr, &str_buf->wptr); in vpu_malone_update_wptr()
539 writel(rptr, &str_buf->rptr); in vpu_malone_update_rptr()
545 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_update_stream_buffer()
546 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_update_stream_buffer()
617 struct malone_iface *iface = shared->iface; in vpu_malone_set_stream_cfg()
618 u32 *curr_str_cfg = &iface->stream_config[instance]; in vpu_malone_set_stream_cfg()
643 struct malone_iface *iface = shared->iface; in vpu_malone_set_params()
644 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_set_params()
647 malone_format = vpu_malone_format_remap(params->codec_format); in vpu_malone_set_params()
649 return -EINVAL; in vpu_malone_set_params()
650 iface->udata_buffer[instance].base = params->udata.base; in vpu_malone_set_params()
651 iface->udata_buffer[instance].slot_size = params->udata.size; in vpu_malone_set_params()
657 hc->jpg[instance].jpg_mjpeg_mode = 1; in vpu_malone_set_params()
659 hc->jpg[instance].jpg_mjpeg_interlaced = 0; in vpu_malone_set_params()
662 hc->codec_param[instance].disp_imm = params->display_delay_enable ? 1 : 0; in vpu_malone_set_params()
664 hc->codec_param[instance].disp_imm = 0; in vpu_malone_set_params()
665 hc->codec_param[instance].dbglog_enable = 0; in vpu_malone_set_params()
666 iface->dbglog_desc.level = 0; in vpu_malone_set_params()
668 if (params->b_non_frame) in vpu_malone_set_params()
669 iface->stream_buff_info[instance].stream_input_mode = NON_FRAME_LVL; in vpu_malone_set_params()
671 iface->stream_buff_info[instance].stream_input_mode = FRAME_LVL; in vpu_malone_set_params()
672 iface->stream_buff_info[instance].stream_buffer_threshold = 0; in vpu_malone_set_params()
673 iface->stream_buff_info[instance].stream_pic_input_count = 0; in vpu_malone_set_params()
680 struct malone_iface *iface = shared->iface; in vpu_malone_is_non_frame_mode()
682 if (iface->stream_buff_info[instance].stream_input_mode == NON_FRAME_LVL) in vpu_malone_is_non_frame_mode()
692 struct malone_iface *iface = shared->iface; in vpu_malone_update_params()
694 if (params->end_flag) in vpu_malone_update_params()
695 iface->stream_buff_info[instance].stream_pic_end_flag = params->end_flag; in vpu_malone_update_params()
696 params->end_flag = 0; in vpu_malone_update_params()
707 return -EINVAL; in vpu_malone_set_decode_params()
760 pkt->hdr.num = 7; in vpu_malone_pack_fs_alloc()
761 pkt->data[0] = fs->id | (fs->tag << 24); in vpu_malone_pack_fs_alloc()
762 pkt->data[1] = fs->luma_addr; in vpu_malone_pack_fs_alloc()
763 if (fs->type == MEM_RES_FRAME) { in vpu_malone_pack_fs_alloc()
767 * same fd -- usage of NXP codec2. Need to manually in vpu_malone_pack_fs_alloc()
768 * offset chroma addr. in vpu_malone_pack_fs_alloc()
770 if (fs->luma_addr == fs->chroma_addr) in vpu_malone_pack_fs_alloc()
771 fs->chroma_addr = fs->luma_addr + fs->luma_size; in vpu_malone_pack_fs_alloc()
772 pkt->data[2] = fs->luma_addr + fs->luma_size / 2; in vpu_malone_pack_fs_alloc()
773 pkt->data[3] = fs->chroma_addr; in vpu_malone_pack_fs_alloc()
774 pkt->data[4] = fs->chroma_addr + fs->chromau_size / 2; in vpu_malone_pack_fs_alloc()
775 pkt->data[5] = fs->bytesperline; in vpu_malone_pack_fs_alloc()
777 pkt->data[2] = fs->luma_size; in vpu_malone_pack_fs_alloc()
778 pkt->data[3] = 0; in vpu_malone_pack_fs_alloc()
779 pkt->data[4] = 0; in vpu_malone_pack_fs_alloc()
780 pkt->data[5] = 0; in vpu_malone_pack_fs_alloc()
782 pkt->data[6] = fs_type[fs->type]; in vpu_malone_pack_fs_alloc()
788 pkt->hdr.num = 1; in vpu_malone_pack_fs_release()
789 pkt->data[0] = fs->id | (fs->tag << 24); in vpu_malone_pack_fs_release()
795 struct timespec64 ts = ns_to_timespec64(info->timestamp); in vpu_malone_pack_timestamp()
797 pkt->hdr.num = 3; in vpu_malone_pack_timestamp()
799 pkt->data[0] = ts.tv_sec; in vpu_malone_pack_timestamp()
800 pkt->data[1] = ts.tv_nsec; in vpu_malone_pack_timestamp()
801 pkt->data[2] = info->size; in vpu_malone_pack_timestamp()
812 pkt->hdr.id = ret; in vpu_malone_pack_cmd()
813 pkt->hdr.num = 0; in vpu_malone_pack_cmd()
814 pkt->hdr.index = index; in vpu_malone_pack_cmd()
828 pkt->hdr.index = index; in vpu_malone_pack_cmd()
839 u32 interlaced = info->progressive ? 0 : 1; in vpu_malone_fill_planes()
841 info->bytesperline[0] = 0; in vpu_malone_fill_planes()
842 info->sizeimage[0] = vpu_helper_get_plane_size(info->pixfmt, in vpu_malone_fill_planes()
843 info->decoded_width, in vpu_malone_fill_planes()
844 info->decoded_height, in vpu_malone_fill_planes()
846 info->stride, in vpu_malone_fill_planes()
848 &info->bytesperline[0]); in vpu_malone_fill_planes()
849 info->bytesperline[1] = 0; in vpu_malone_fill_planes()
850 info->sizeimage[1] = vpu_helper_get_plane_size(info->pixfmt, in vpu_malone_fill_planes()
851 info->decoded_width, in vpu_malone_fill_planes()
852 info->decoded_height, in vpu_malone_fill_planes()
854 info->stride, in vpu_malone_fill_planes()
856 &info->bytesperline[1]); in vpu_malone_fill_planes()
861 u32 chunks = info->num_dfe_area >> MALONE_DCP_CHUNK_BIT; in vpu_malone_init_seq_hdr()
865 info->mbi_size = (info->sizeimage[0] + info->sizeimage[1]) >> 2; in vpu_malone_init_seq_hdr()
866 info->mbi_size = ALIGN(info->mbi_size, MALONE_ALIGN_MBI); in vpu_malone_init_seq_hdr()
868 info->dcp_size = MALONE_DCP_SIZE_MAX; in vpu_malone_init_seq_hdr()
874 mb_w = DIV_ROUND_UP(info->decoded_width, 16); in vpu_malone_init_seq_hdr()
875 mb_h = DIV_ROUND_UP(info->decoded_height, 16); in vpu_malone_init_seq_hdr()
877 info->dcp_size = mb_num * MALONE_DCP_FIXED_MB_ALLOC * chunks; in vpu_malone_init_seq_hdr()
878 info->dcp_size = clamp_t(u32, info->dcp_size, in vpu_malone_init_seq_hdr()
886 info->num_ref_frms = pkt->data[0]; in vpu_malone_unpack_seq_hdr()
887 info->num_dpb_frms = pkt->data[1]; in vpu_malone_unpack_seq_hdr()
888 info->num_dfe_area = pkt->data[2]; in vpu_malone_unpack_seq_hdr()
889 info->progressive = pkt->data[3]; in vpu_malone_unpack_seq_hdr()
890 info->width = pkt->data[5]; in vpu_malone_unpack_seq_hdr()
891 info->height = pkt->data[4]; in vpu_malone_unpack_seq_hdr()
892 info->decoded_width = pkt->data[12]; in vpu_malone_unpack_seq_hdr()
893 info->decoded_height = pkt->data[11]; in vpu_malone_unpack_seq_hdr()
894 info->frame_rate.numerator = 1000; in vpu_malone_unpack_seq_hdr()
895 info->frame_rate.denominator = pkt->data[8]; in vpu_malone_unpack_seq_hdr()
896 info->dsp_asp_ratio = pkt->data[9]; in vpu_malone_unpack_seq_hdr()
897 info->level_idc = pkt->data[10]; in vpu_malone_unpack_seq_hdr()
898 info->bit_depth_luma = pkt->data[13]; in vpu_malone_unpack_seq_hdr()
899 info->bit_depth_chroma = pkt->data[14]; in vpu_malone_unpack_seq_hdr()
900 info->chroma_fmt = pkt->data[15]; in vpu_malone_unpack_seq_hdr()
901 info->color_primaries = vpu_color_cvrt_primaries_i2v(pkt->data[16]); in vpu_malone_unpack_seq_hdr()
902 info->transfer_chars = vpu_color_cvrt_transfers_i2v(pkt->data[17]); in vpu_malone_unpack_seq_hdr()
903 info->matrix_coeffs = vpu_color_cvrt_matrix_i2v(pkt->data[18]); in vpu_malone_unpack_seq_hdr()
904 info->full_range = vpu_color_cvrt_full_range_i2v(pkt->data[19]); in vpu_malone_unpack_seq_hdr()
905 info->vui_present = pkt->data[20]; in vpu_malone_unpack_seq_hdr()
906 info->mvc_num_views = pkt->data[21]; in vpu_malone_unpack_seq_hdr()
907 info->offset_x = pkt->data[23]; in vpu_malone_unpack_seq_hdr()
908 info->offset_y = pkt->data[25]; in vpu_malone_unpack_seq_hdr()
909 info->tag = pkt->data[27]; in vpu_malone_unpack_seq_hdr()
910 if (info->bit_depth_luma > 8) in vpu_malone_unpack_seq_hdr()
911 info->pixfmt = V4L2_PIX_FMT_NV12M_10BE_8L128; in vpu_malone_unpack_seq_hdr()
913 info->pixfmt = V4L2_PIX_FMT_NV12M_8L128; in vpu_malone_unpack_seq_hdr()
914 if (info->frame_rate.numerator && info->frame_rate.denominator) { in vpu_malone_unpack_seq_hdr()
917 rational_best_approximation(info->frame_rate.numerator, in vpu_malone_unpack_seq_hdr()
918 info->frame_rate.denominator, in vpu_malone_unpack_seq_hdr()
919 info->frame_rate.numerator, in vpu_malone_unpack_seq_hdr()
920 info->frame_rate.denominator, in vpu_malone_unpack_seq_hdr()
922 info->frame_rate.numerator = n; in vpu_malone_unpack_seq_hdr()
923 info->frame_rate.denominator = d; in vpu_malone_unpack_seq_hdr()
931 info->id = pkt->data[7]; in vpu_malone_unpack_pic_info()
932 info->luma = pkt->data[0]; in vpu_malone_unpack_pic_info()
933 info->start = pkt->data[10]; in vpu_malone_unpack_pic_info()
934 info->end = pkt->data[12]; in vpu_malone_unpack_pic_info()
935 info->pic_size = pkt->data[11]; in vpu_malone_unpack_pic_info()
936 info->stride = pkt->data[5]; in vpu_malone_unpack_pic_info()
937 info->consumed_count = pkt->data[13]; in vpu_malone_unpack_pic_info()
938 if (info->id == MALONE_SKIPPED_FRAME_ID) in vpu_malone_unpack_pic_info()
939 info->skipped = 1; in vpu_malone_unpack_pic_info()
941 info->skipped = 0; in vpu_malone_unpack_pic_info()
947 info->type = pkt->data[1]; in vpu_malone_unpack_req_frame()
953 info->id = pkt->data[0]; in vpu_malone_unpack_rel_frame()
954 info->type = pkt->data[1]; in vpu_malone_unpack_rel_frame()
955 info->not_displayed = pkt->data[2]; in vpu_malone_unpack_rel_frame()
961 struct timespec64 ts = { pkt->data[9], pkt->data[10] }; in vpu_malone_unpack_buff_rdy()
963 info->id = pkt->data[0]; in vpu_malone_unpack_buff_rdy()
964 info->luma = pkt->data[1]; in vpu_malone_unpack_buff_rdy()
965 info->stride = pkt->data[3]; in vpu_malone_unpack_buff_rdy()
966 if (info->id == MALONE_SKIPPED_FRAME_ID) in vpu_malone_unpack_buff_rdy()
967 info->skipped = 1; in vpu_malone_unpack_buff_rdy()
969 info->skipped = 0; in vpu_malone_unpack_buff_rdy()
971 info->timestamp = timespec64_to_ns(&ts); in vpu_malone_unpack_buff_rdy()
977 return -EINVAL; in vpu_malone_unpack_msg_data()
979 switch (pkt->hdr.id) { in vpu_malone_unpack_msg_data()
1043 if (s->scode_type == type && s->pixelformat == fmt) in get_padding_scode()
1066 return -EINVAL; in vpu_malone_add_padding_scode()
1068 wptr = readl(&str_buf->wptr); in vpu_malone_add_padding_scode()
1069 if (wptr < stream_buffer->phys || wptr > stream_buffer->phys + stream_buffer->length) in vpu_malone_add_padding_scode()
1070 return -EINVAL; in vpu_malone_add_padding_scode()
1071 if (wptr == stream_buffer->phys + stream_buffer->length) in vpu_malone_add_padding_scode()
1072 wptr = stream_buffer->phys; in vpu_malone_add_padding_scode()
1073 size = ALIGN(wptr, 4) - wptr; in vpu_malone_add_padding_scode()
1078 size = sizeof(ps->data); in vpu_malone_add_padding_scode()
1079 ret = vpu_helper_copy_to_stream_buffer(stream_buffer, &wptr, size, (void *)ps->data); in vpu_malone_add_padding_scode()
1081 return -EINVAL; in vpu_malone_add_padding_scode()
1084 size = padding_size - sizeof(ps->data); in vpu_malone_add_padding_scode()
1098 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_add_scode()
1099 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[instance]; in vpu_malone_add_scode()
1100 int ret = -EINVAL; in vpu_malone_add_scode()
1142 /* payload_size = buffer_size + itself_size(16) - start_code(4) */ in set_payload_hdr()
1173 /* 0-3byte signature "DKIF" */ in set_vp8_ivf_seqhdr()
1178 /* 4-5byte version: should be 0*/ in set_vp8_ivf_seqhdr()
1181 /* 6-7 length of Header */ in set_vp8_ivf_seqhdr()
1184 /* 8-11 VP8 fourcc */ in set_vp8_ivf_seqhdr()
1189 /* 12-13 width in pixels */ in set_vp8_ivf_seqhdr()
1192 /* 14-15 height in pixels */ in set_vp8_ivf_seqhdr()
1195 /* 16-19 frame rate */ in set_vp8_ivf_seqhdr()
1200 /* 20-23 time scale */ in set_vp8_ivf_seqhdr()
1205 /* 24-27 number frames */ in set_vp8_ivf_seqhdr()
1210 /* 28-31 reserved */ in set_vp8_ivf_seqhdr()
1216 * firmware just parse 64-bit timestamp(8 bytes). in set_vp8_ivf_pichdr()
1227 /* 0-2 Number of frames, used default value 0xFF */ in set_vc1_rcv_seqhdr()
1235 /* 4-7 extension data size */ in set_vc1_rcv_seqhdr()
1240 /* 8-11 extension data */ in set_vc1_rcv_seqhdr()
1284 scode->inst->out_format.width, in vpu_malone_insert_scode_seq()
1285 scode->inst->out_format.height); in vpu_malone_insert_scode_seq()
1286 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_seq()
1287 &scode->wptr, in vpu_malone_insert_scode_seq()
1303 ext_size + vb2_get_plane_payload(scode->vb, 0), in vpu_malone_insert_scode_pic()
1304 scode->inst->out_format.width, in vpu_malone_insert_scode_pic()
1305 scode->inst->out_format.height); in vpu_malone_insert_scode_pic()
1306 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_pic()
1307 &scode->wptr, in vpu_malone_insert_scode_pic()
1317 if (!scode->inst->total_input_count) in vpu_malone_insert_scode_vc1_g_seq()
1319 if (vpu_vb_is_codecconfig(to_vb2_v4l2_buffer(scode->vb))) in vpu_malone_insert_scode_vc1_g_seq()
1320 scode->need_data = 0; in vpu_malone_insert_scode_vc1_g_seq()
1331 vbuf = to_vb2_v4l2_buffer(scode->vb); in vpu_malone_insert_scode_vc1_g_pic()
1332 data = vb2_plane_vaddr(scode->vb, 0); in vpu_malone_insert_scode_vc1_g_pic()
1334 if (scode->inst->total_input_count == 0 || vpu_vb_is_codecconfig(vbuf)) in vpu_malone_insert_scode_vc1_g_pic()
1340 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vc1_g_pic()
1341 &scode->wptr, in vpu_malone_insert_scode_vc1_g_pic()
1355 if (vpu_vb_is_codecconfig(to_vb2_v4l2_buffer(scode->vb))) in vpu_malone_insert_scode_vc1_l_seq()
1356 scode->need_data = 0; in vpu_malone_insert_scode_vc1_l_seq()
1357 if (scode->inst->total_input_count) in vpu_malone_insert_scode_vc1_l_seq()
1359 scode->need_data = 0; in vpu_malone_insert_scode_vc1_l_seq()
1367 vb2_plane_vaddr(scode->vb, 0), in vpu_malone_insert_scode_vc1_l_seq()
1368 scode->inst->out_format.width, in vpu_malone_insert_scode_vc1_l_seq()
1369 scode->inst->out_format.height); in vpu_malone_insert_scode_vc1_l_seq()
1370 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vc1_l_seq()
1371 &scode->wptr, in vpu_malone_insert_scode_vc1_l_seq()
1393 set_vc1_rcv_pichdr(rcv_pichdr, vb2_get_plane_payload(scode->vb, 0)); in vpu_malone_insert_scode_vc1_l_pic()
1394 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vc1_l_pic()
1395 &scode->wptr, in vpu_malone_insert_scode_vc1_l_pic()
1416 scode->inst->out_format.width, in vpu_malone_insert_scode_vp8_seq()
1417 scode->inst->out_format.height); in vpu_malone_insert_scode_vp8_seq()
1418 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vp8_seq()
1419 &scode->wptr, in vpu_malone_insert_scode_vp8_seq()
1440 set_vp8_ivf_pichdr(ivf_hdr, vb2_get_plane_payload(scode->vb, 0)); in vpu_malone_insert_scode_vp8_pic()
1441 ret = vpu_helper_copy_to_stream_buffer(&scode->inst->stream_buffer, in vpu_malone_insert_scode_vp8_pic()
1442 &scode->wptr, in vpu_malone_insert_scode_vp8_pic()
1503 if (!scode || !scode->inst || !scode->vb) in vpu_malone_insert_scode()
1506 scode->need_data = 1; in vpu_malone_insert_scode()
1507 handler = get_scode_handler(scode->inst->out_format.pixfmt); in vpu_malone_insert_scode()
1513 if (handler->insert_scode_seq) in vpu_malone_insert_scode()
1514 ret = handler->insert_scode_seq(scode); in vpu_malone_insert_scode()
1517 if (handler->insert_scode_pic) in vpu_malone_insert_scode()
1518 ret = handler->insert_scode_pic(scode); in vpu_malone_insert_scode()
1533 u32 wptr = readl(&str_buf->wptr); in vpu_malone_input_frame_data()
1542 if (vbuf->sequence == 0 || vpu_vb_is_codecconfig(vbuf)) in vpu_malone_input_frame_data()
1546 return -ENOMEM; in vpu_malone_input_frame_data()
1556 return -ENOMEM; in vpu_malone_input_frame_data()
1560 ret = vpu_helper_copy_to_stream_buffer(&inst->stream_buffer, in vpu_malone_input_frame_data()
1565 return -ENOMEM; in vpu_malone_input_frame_data()
1571 ret = vpu_malone_add_scode(inst->core->iface, in vpu_malone_input_frame_data()
1572 inst->id, in vpu_malone_input_frame_data()
1573 &inst->stream_buffer, in vpu_malone_input_frame_data()
1574 inst->out_format.pixfmt, in vpu_malone_input_frame_data()
1587 u32 wptr = readl(&str_buf->wptr); in vpu_malone_input_stream_data()
1590 ret = vpu_helper_copy_to_stream_buffer(&inst->stream_buffer, in vpu_malone_input_stream_data()
1595 return -ENOMEM; in vpu_malone_input_stream_data()
1616 struct vpu_dec_ctrl *hc = shared->priv; in vpu_malone_input_frame()
1618 struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[inst->id]; in vpu_malone_input_frame()
1619 u32 disp_imm = hc->codec_param[inst->id].disp_imm; in vpu_malone_input_frame()
1623 if (vpu_malone_is_non_frame_mode(shared, inst->id)) in vpu_malone_input_frame()
1638 inst->extra_size += size; in vpu_malone_input_frame()
1641 if (inst->extra_size) { in vpu_malone_input_frame()
1642 size += inst->extra_size; in vpu_malone_input_frame()
1643 inst->extra_size = 0; in vpu_malone_input_frame()
1646 ret = vpu_malone_input_ts(inst, vb->timestamp, size); in vpu_malone_input_frame()
1655 struct malone_iface *iface = shared->iface; in vpu_malone_check_ready()
1656 struct vpu_rpc_buffer_desc *desc = &iface->api_cmd_buffer_desc[instance]; in vpu_malone_check_ready()
1657 u32 size = desc->end - desc->start; in vpu_malone_check_ready()
1658 u32 rptr = desc->rptr; in vpu_malone_check_ready()
1659 u32 wptr = desc->wptr; in vpu_malone_check_ready()
1665 used = (wptr + size - rptr) % size; in vpu_malone_check_ready()
1688 return -EINVAL; in vpu_malone_pre_cmd()
1695 struct malone_iface *iface = shared->iface; in vpu_malone_post_cmd()
1696 struct vpu_rpc_buffer_desc *desc = &iface->api_cmd_buffer_desc[instance]; in vpu_malone_post_cmd()
1698 desc->wptr++; in vpu_malone_post_cmd()
1699 if (desc->wptr == desc->end) in vpu_malone_post_cmd()
1700 desc->wptr = desc->start; in vpu_malone_post_cmd()
1707 struct malone_iface *iface = shared->iface; in vpu_malone_init_instance()
1708 struct vpu_rpc_buffer_desc *desc = &iface->api_cmd_buffer_desc[instance]; in vpu_malone_init_instance()
1710 desc->wptr = desc->rptr; in vpu_malone_init_instance()
1711 if (desc->wptr == desc->end) in vpu_malone_init_instance()
1712 desc->wptr = desc->start; in vpu_malone_init_instance()
1719 struct malone_iface *iface = shared->iface; in vpu_malone_get_max_instance_count()
1721 return iface->max_streams; in vpu_malone_get_max_instance_count()