Lines Matching full:enum
45 enum cxd2880_tnrdmd_chip_id {
55 enum cxd2880_tnrdmd_state {
62 enum cxd2880_tnrdmd_divermode {
68 enum cxd2880_tnrdmd_clockmode {
75 enum cxd2880_tnrdmd_tsout_if {
81 enum cxd2880_tnrdmd_xtal_share {
88 enum cxd2880_tnrdmd_spectrum_sense {
93 enum cxd2880_tnrdmd_cfg_id {
131 enum cxd2880_tnrdmd_lock_result {
137 enum cxd2880_tnrdmd_gpio_mode {
147 enum cxd2880_tnrdmd_serial_ts_clk {
153 enum cxd2880_io_tgt tgt;
184 enum cxd2880_tnrdmd_tsout_if ts_output_if;
186 enum cxd2880_tnrdmd_xtal_share xtal_share_type;
194 enum cxd2880_tnrdmd_tsout_if ts_output_if;
207 enum cxd2880_tnrdmd_divermode diver_mode;
208 enum cxd2880_tnrdmd_clockmode fixed_clk_mode;
218 enum cxd2880_tnrdmd_serial_ts_clk srl_ts_clk_frq;
226 enum cxd2880_tnrdmd_chip_id chip_id;
227 enum cxd2880_tnrdmd_state state;
228 enum cxd2880_tnrdmd_clockmode clk_mode;
230 enum cxd2880_dtv_sys sys;
231 enum cxd2880_dtv_bandwidth bandwidth;
260 enum cxd2880_dtv_sys sys,
262 enum cxd2880_dtv_bandwidth
268 enum cxd2880_dtv_sys sys,
274 enum cxd2880_tnrdmd_cfg_id id,
280 enum cxd2880_tnrdmd_gpio_mode mode,
286 enum cxd2880_tnrdmd_gpio_mode
314 enum cxd2880_tnrdmd_chip_id *chip_id);
318 enum cxd2880_io_tgt tgt,
323 enum cxd2880_dtv_sys sys,