Lines Matching +full:a +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin-priv.h - internal cec-pin header
13 #include <media/cec-pin.h>
16 ((pin && pin->ops->op && !pin->adap->devnode.unregistered) ? \
17 pin->ops->op(pin->adap, ## arg) : 0)
21 if (pin && pin->ops->op && \
22 !pin->adap->devnode.unregistered) \
23 pin->ops->op(pin->adap, ## arg); \
36 /* Low-drive was detected, wait for bus to go high */
38 /* Drive CEC low for the start bit */
40 /* Drive CEC high for the start bit */
42 /* Generate a start bit period that is too short */
44 /* Generate a start bit period that is too long */
46 /* Drive CEC low for the start bit using the custom timing */
48 /* Drive CEC high for the start bit using the custom timing */
50 /* Drive CEC low for the 0 bit */
52 /* Drive CEC high for the 0 bit */
54 /* Generate a bit period that is too short */
56 /* Generate a bit period that is too long */
58 /* Drive CEC low for the 1 bit */
60 /* Drive CEC high for the 1 bit */
62 /* Generate a bit period that is too short */
64 /* Generate a bit period that is too long */
67 * Wait for start of sample time to check for Ack bit or first
71 /* Wait for end of bit period after sampling */
73 /* Generate a bit period that is too short */
75 /* Generate a bit period that is too long */
77 /* Drive CEC low for a data bit using the custom timing */
79 /* Drive CEC high for a data bit using the custom timing */
81 /* Drive CEC low for a standalone pulse using the custom timing */
83 /* Drive CEC high for a standalone pulse using the custom timing */
90 /* Start bit low detected */
92 /* Start bit high detected */
94 /* Wait for bit sample time */
96 /* Wait for earliest end of bit period after sampling */
98 /* Wait for CEC to go low (i.e. end of bit period) */
100 /* Drive CEC low to send 0 Ack bit */
102 /* End of 0 Ack time, wait for earliest end of bit period */
104 /* Wait for CEC to go high (i.e. end of bit period */
106 /* Wait for earliest end of bit period and end of message */