Lines Matching full:dcfg
92 const struct imx_mu_dcfg *dcfg; member
162 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_tx_waiting_write()
163 can_write = status & IMX_MU_xSR_TEn(priv->dcfg->type, idx % 4); in imx_mu_tx_waiting_write()
172 imx_mu_write(priv, val, priv->dcfg->xTR + (idx % 4) * 4); in imx_mu_tx_waiting_write()
186 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_rx_waiting_read()
187 can_read = status & IMX_MU_xSR_RFn(priv->dcfg->type, idx % 4); in imx_mu_rx_waiting_read()
196 *val = imx_mu_read(priv, priv->dcfg->xRR + (idx % 4) * 4); in imx_mu_rx_waiting_read()
208 val = imx_mu_read(priv, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
211 imx_mu_write(priv, val, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
225 imx_mu_write(priv, *arg, priv->dcfg->xTR + cp->idx * 4); in imx_mu_generic_tx()
226 imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
229 imx_mu_xcr_rmw(priv, IMX_MU_GCR, IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
233 imx_mu_xcr_rmw(priv, IMX_MU_GCR, IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_generic_tx()
248 dat = imx_mu_read(priv, priv->dcfg->xRR + (cp->idx) * 4); in imx_mu_generic_rx()
257 imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx), in imx_mu_generic_rxdb()
258 priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_generic_rxdb()
271 if (priv->dcfg->type & IMX_MU_V2_S4) { in imx_mu_specific_tx()
298 imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); in imx_mu_specific_tx()
300 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_TSR], in imx_mu_specific_tx()
302 xsr & IMX_MU_xSR_TEn(priv->dcfg->type, i % num_tr), in imx_mu_specific_tx()
308 imx_mu_write(priv, *arg++, priv->dcfg->xTR + (i % num_tr) * 4); in imx_mu_specific_tx()
311 imx_mu_xcr_rmw(priv, IMX_MU_TCR, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_specific_tx()
330 imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, 0)); in imx_mu_specific_rx()
331 *data++ = imx_mu_read(priv, priv->dcfg->xRR); in imx_mu_specific_rx()
333 if (priv->dcfg->type & IMX_MU_V2_S4) { in imx_mu_specific_rx()
347 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_RSR], xsr, in imx_mu_specific_rx()
348 xsr & IMX_MU_xSR_RFn(priv->dcfg->type, i % 4), 0, in imx_mu_specific_rx()
354 *data++ = imx_mu_read(priv, priv->dcfg->xRR + (i % 4) * 4); in imx_mu_specific_rx()
357 imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, 0), 0); in imx_mu_specific_rx()
393 imx_mu_write(priv, *arg++, priv->dcfg->xTR); in imx_mu_seco_tx()
398 IMX_MU_xCR_GIRn(priv->dcfg->type, cp->idx), 0); in imx_mu_seco_tx()
404 priv->dcfg->xTR + (i % 4) * 4); in imx_mu_seco_tx()
443 *data++ = imx_mu_read(priv, priv->dcfg->xRR); in imx_mu_seco_rxdb()
463 imx_mu_write(priv, IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx), in imx_mu_seco_rxdb()
464 priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_seco_rxdb()
498 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_TCR]); in imx_mu_isr()
499 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_isr()
500 val &= IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
501 (ctrl & IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
504 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_RCR]); in imx_mu_isr()
505 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_isr()
506 val &= IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
507 (ctrl & IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
510 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_GIER]); in imx_mu_isr()
511 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_isr()
512 val &= IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx) & in imx_mu_isr()
513 (ctrl & IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
526 if ((val == IMX_MU_xSR_TEn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
528 imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_isr()
530 } else if ((val == IMX_MU_xSR_RFn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
532 priv->dcfg->rx(priv, cp); in imx_mu_isr()
533 } else if ((val == IMX_MU_xSR_GIPn(priv->dcfg->type, cp->idx)) && in imx_mu_isr()
535 priv->dcfg->rxdb(priv, cp); in imx_mu_isr()
552 return priv->dcfg->tx(priv, cp, data); in imx_mu_send_data()
577 if (!(priv->dcfg->type & IMX_MU_V2_IRQ)) in imx_mu_startup()
588 imx_mu_xcr_rmw(priv, IMX_MU_RCR, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_startup()
591 imx_mu_xcr_rmw(priv, IMX_MU_GIER, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx), 0); in imx_mu_startup()
620 imx_mu_xcr_rmw(priv, IMX_MU_TCR, 0, IMX_MU_xCR_TIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
623 imx_mu_xcr_rmw(priv, IMX_MU_RCR, 0, IMX_MU_xCR_RIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
626 imx_mu_xcr_rmw(priv, IMX_MU_GIER, 0, IMX_MU_xCR_GIEn(priv->dcfg->type, cp->idx)); in imx_mu_shutdown()
629 imx_mu_xcr_rmw(priv, IMX_MU_CR, IMX_MU_xCR_RST(priv->dcfg->type), 0); in imx_mu_shutdown()
630 ret = readl_poll_timeout(priv->base + priv->dcfg->xSR[IMX_MU_SR], sr, in imx_mu_shutdown()
631 !(sr & IMX_MU_xSR_RST(priv->dcfg->type)), 1, 5); in imx_mu_shutdown()
764 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_generic()
767 val = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_init_generic()
768 imx_mu_write(priv, val, priv->dcfg->xSR[IMX_MU_GSR]); in imx_mu_init_generic()
772 imx_mu_read(priv, priv->dcfg->xRR + (i % 4) * 4); in imx_mu_init_generic()
778 int num_chans = priv->dcfg->type & IMX_MU_V2_S4 ? IMX_MU_S4_CHANS : IMX_MU_SCU_CHANS; in imx_mu_init_specific()
796 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_specific()
810 const struct imx_mu_dcfg *dcfg; in imx_mu_probe() local
824 dcfg = of_device_get_match_data(dev); in imx_mu_probe()
825 if (!dcfg) in imx_mu_probe()
827 priv->dcfg = dcfg; in imx_mu_probe()
828 if (priv->dcfg->type & IMX_MU_V2_IRQ) { in imx_mu_probe()
844 if (priv->dcfg->type & IMX_MU_V2_S4) in imx_mu_probe()
869 priv->dcfg->init(priv); in imx_mu_probe()
1010 priv->xcr[i] = imx_mu_read(priv, priv->dcfg->xCR[i]); in imx_mu_suspend_noirq()
1031 if (!priv->clk && !imx_mu_read(priv, priv->dcfg->xCR[0])) { in imx_mu_resume_noirq()
1033 imx_mu_write(priv, priv->xcr[i], priv->dcfg->xCR[i]); in imx_mu_resume_noirq()