Lines Matching +full:echo +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * hfcmulti.c low level driver for hfc-4s/hfc-8s/hfc-e1 based cards
7 * Peter Sprenger (sprengermoving-bytes.de)
9 * inspired by existing hfc-pci driver:
10 * Copyright 1999 by Werner Cornelius (werner@isdn-development.de)
22 * Bit 0-7 = 0x00001 = HFC-E1 (1 port)
23 * or Bit 0-7 = 0x00004 = HFC-4S (4 ports)
24 * or Bit 0-7 = 0x00008 = HFC-8S (8 ports)
26 * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware
38 * example: 0x20204 one HFC-4S with dtmf detection and 128 timeslots on PCM
42 * HFC-4S/HFC-8S only bits:
47 * Bit 2 = 0x004 = Disable E-channel. (No E-channel processing)
48 * example: 0x0001,0x0000,0x0000,0x0000 one HFC-4S with master clock
51 * HFC-E1 only bits:
53 * Bit 1 = 0x0002 = reserved (later for 32 B-channels transparent mode)
58 * Bit 8 = 0x0100 = Turn off CRC-4 Multiframe Mode, use double frame
64 * Bit 12-13 = 0xX000 = elastic jitter buffer (1-3), Set both bits to 0
88 * -1 means no support of PCM bus not even.
93 * NOTE: One dmask value must be given for every HFC-E1 card.
94 * If omitted, the E1 card has D-channel on time slot 16, which is default.
98 * value stands for a B-channel. The bmask may not overlap with dmask or
101 * This will create one fragment with D-channel on slot 1 with
102 * B-channels on slots 2..15, and a second fragment with D-channel
103 * on slot 17 with B-channels on slot 18..31. Slot 16 is unused.
104 * If bit 0 is set (dmask=0x00000001) the D-channel is on slot 0 and will
108 * B-channels.
109 * If no bits are set on bmask, no B-channel is created for that fragment.
110 * Example: dmask=0xfffffffe bmask=0,0,0,0.... (31 0-values for bmask)
111 * This will create 31 ports with one D-channel only.
116 * -> See hfc_multi.h for HFC_IO_MODE_* values
138 * Set to card number starting with 1. Set to -1 to disable.
242 (hc->HFC_outb(hc, reg, val, __func__, __LINE__))
244 (hc->HFC_outb_nodebug(hc, reg, val, __func__, __LINE__))
246 (hc->HFC_inb(hc, reg, __func__, __LINE__))
248 (hc->HFC_inb_nodebug(hc, reg, __func__, __LINE__))
250 (hc->HFC_inw(hc, reg, __func__, __LINE__))
252 (hc->HFC_inw_nodebug(hc, reg, __func__, __LINE__))
254 (hc->HFC_wait(hc, __func__, __LINE__))
256 (hc->HFC_wait_nodebug(hc, __func__, __LINE__))
258 #define HFC_outb(hc, reg, val) (hc->HFC_outb(hc, reg, val))
259 #define HFC_outb_nodebug(hc, reg, val) (hc->HFC_outb_nodebug(hc, reg, val))
260 #define HFC_inb(hc, reg) (hc->HFC_inb(hc, reg))
261 #define HFC_inb_nodebug(hc, reg) (hc->HFC_inb_nodebug(hc, reg))
262 #define HFC_inw(hc, reg) (hc->HFC_inw(hc, reg))
263 #define HFC_inw_nodebug(hc, reg) (hc->HFC_inw_nodebug(hc, reg))
264 #define HFC_wait(hc) (hc->HFC_wait(hc))
265 #define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc))
281 writeb(val, hc->pci_membase + reg); in HFC_outb_pcimem()
290 return readb(hc->pci_membase + reg); in HFC_inb_pcimem()
299 return readw(hc->pci_membase + reg); in HFC_inw_pcimem()
308 while (readb(hc->pci_membase + R_STATUS) & V_BUSY) in HFC_wait_pcimem()
321 outb(reg, hc->pci_iobase + 4); in HFC_outb_regio()
322 outb(val, hc->pci_iobase); in HFC_outb_regio()
331 outb(reg, hc->pci_iobase + 4); in HFC_inb_regio()
332 return inb(hc->pci_iobase); in HFC_inb_regio()
341 outb(reg, hc->pci_iobase + 4); in HFC_inw_regio()
342 return inw(hc->pci_iobase); in HFC_inw_regio()
351 outb(R_STATUS, hc->pci_iobase + 4); in HFC_wait_regio()
352 while (inb(hc->pci_iobase) & V_BUSY) in HFC_wait_regio()
364 i = -1; in HFC_outb_debug()
382 hc->id, reg, regname, val, bits, function, line); in HFC_outb_debug()
412 hc->id, reg, regname, val, bits, function, line); in HFC_inb_debug()
434 hc->id, reg, regname, val, function, line); in HFC_inw_debug()
441 hc->id, function, line); in HFC_wait_debug()
450 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in write_fifo_regio()
452 outl(cpu_to_le32(*(u32 *)data), hc->pci_iobase); in write_fifo_regio()
454 len -= 4; in write_fifo_regio()
457 outw(cpu_to_le16(*(u16 *)data), hc->pci_iobase); in write_fifo_regio()
459 len -= 2; in write_fifo_regio()
462 outb(*data, hc->pci_iobase); in write_fifo_regio()
464 len--; in write_fifo_regio()
473 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
475 len -= 4; in write_fifo_pcimem()
479 hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
481 len -= 2; in write_fifo_pcimem()
484 writeb(*data, hc->pci_membase + A_FIFO_DATA0); in write_fifo_pcimem()
486 len--; in write_fifo_pcimem()
494 outb(A_FIFO_DATA0, (hc->pci_iobase) + 4); in read_fifo_regio()
496 *(u32 *)data = le32_to_cpu(inl(hc->pci_iobase)); in read_fifo_regio()
498 len -= 4; in read_fifo_regio()
501 *(u16 *)data = le16_to_cpu(inw(hc->pci_iobase)); in read_fifo_regio()
503 len -= 2; in read_fifo_regio()
506 *data = inb(hc->pci_iobase); in read_fifo_regio()
508 len--; in read_fifo_regio()
518 le32_to_cpu(readl(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
520 len -= 4; in read_fifo_pcimem()
524 le16_to_cpu(readw(hc->pci_membase + A_FIFO_DATA0)); in read_fifo_pcimem()
526 len -= 2; in read_fifo_pcimem()
529 *data = readb(hc->pci_membase + A_FIFO_DATA0); in read_fifo_pcimem()
531 len--; in read_fifo_pcimem()
538 hc->hw.r_irq_ctrl |= V_GLOB_IRQ_EN; in enable_hwirq()
539 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in enable_hwirq()
545 hc->hw.r_irq_ctrl &= ~((u_char)V_GLOB_IRQ_EN); in disable_hwirq()
546 HFC_outb(hc, R_IRQ_CTRL, hc->hw.r_irq_ctrl); in disable_hwirq()
571 if (!hc->pci_iobase) in readpcibridge()
584 outw(cipv, hc->pci_iobase + 4); in readpcibridge()
585 data = inb(hc->pci_iobase); in readpcibridge()
599 if (!hc->pci_iobase) in writepcibridge()
608 outw(cipv, hc->pci_iobase + 4); in writepcibridge()
620 outl(datav, hc->pci_iobase); in writepcibridge()
721 /* Setup TDM path - sets fsync and tdm_clk as inputs */ in vpm_init()
725 /* Setup Echo length (256 taps) */ in vpm_init()
735 vpm_out(wc, x, 0x33 - i, (mask >> (i << 3)) & 0xff); in vpm_init()
738 printk(KERN_DEBUG "VPM: A-law mode\n"); in vpm_init()
748 /* Initialize echo cans */ in vpm_init()
757 * reference at link-time. in vpm_init()
813 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_on()
815 int txadj = -4; in vpm_echocan_on()
818 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_on()
845 struct bchannel *bch = hc->chan[ch].bch; in vpm_echocan_off()
851 if (hc->chan[ch].protocol != ISDN_P_B_RAW) in vpm_echocan_off()
901 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
902 if (hc->syncronized) { in hfcmulti_resync()
912 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_resync()
913 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
917 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in hfcmulti_resync()
919 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
923 hc->e1_resync |= 1; /* get SYNC_I */ in hfcmulti_resync()
933 "interface.\n", hc->id, hc); in hfcmulti_resync()
935 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
940 if (hc->ctype == HFC_TYPE_E1 in hfcmulti_resync()
941 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { in hfcmulti_resync()
944 hc->e1_resync |= 2; /* switch to jatt */ in hfcmulti_resync()
952 "with QUARTZ\n", hc->id, hc); in hfcmulti_resync()
953 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_resync()
958 "Schedule QUARTZ for HFC-E1\n"); in hfcmulti_resync()
959 hc->e1_resync |= 4; /* switch quartz */ in hfcmulti_resync()
964 "enabled by HFC-%dS\n", hc->ctype); in hfcmulti_resync()
966 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in hfcmulti_resync()
985 if (hc->syncronized) { in plxsd_checksync()
989 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
990 hc->id); in plxsd_checksync()
997 " (id=%d)\n", __func__, hc->id + 1, in plxsd_checksync()
998 hc->id); in plxsd_checksync()
1019 hc->hw.r_cirm |= V_SRES; in release_io_hfcmulti()
1020 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1022 hc->hw.r_cirm &= ~V_SRES; in release_io_hfcmulti()
1023 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in release_io_hfcmulti()
1027 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && hc->plx_membase) { in release_io_hfcmulti()
1030 __func__, hc->id + 1); in release_io_hfcmulti()
1032 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in release_io_hfcmulti()
1051 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */ in release_io_hfcmulti()
1052 if (hc->pci_dev) in release_io_hfcmulti()
1053 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0); in release_io_hfcmulti()
1054 if (hc->pci_membase) in release_io_hfcmulti()
1055 iounmap(hc->pci_membase); in release_io_hfcmulti()
1056 if (hc->plx_membase) in release_io_hfcmulti()
1057 iounmap(hc->plx_membase); in release_io_hfcmulti()
1058 if (hc->pci_iobase) in release_io_hfcmulti()
1059 release_region(hc->pci_iobase, 8); in release_io_hfcmulti()
1060 if (hc->xhfc_membase) in release_io_hfcmulti()
1061 iounmap((void *)hc->xhfc_membase); in release_io_hfcmulti()
1063 if (hc->pci_dev) { in release_io_hfcmulti()
1064 pci_disable_device(hc->pci_dev); in release_io_hfcmulti()
1065 pci_set_drvdata(hc->pci_dev, NULL); in release_io_hfcmulti()
1088 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1090 memset(&hc->hw, 0, sizeof(struct hfcm_hw)); in init_chip()
1099 err = -EIO; in init_chip()
1105 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ? in init_chip()
1107 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) { in init_chip()
1108 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); in init_chip()
1122 /* set s-ram size */ in init_chip()
1123 hc->Flen = 0x10; in init_chip()
1124 hc->Zmin = 0x80; in init_chip()
1125 hc->Zlen = 384; in init_chip()
1126 hc->DTMFbase = 0x1000; in init_chip()
1127 if (test_bit(HFC_CHIP_EXRAM_128, &hc->chip)) { in init_chip()
1131 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1132 hc->hw.r_ram_sz = 1; in init_chip()
1133 hc->Flen = 0x20; in init_chip()
1134 hc->Zmin = 0xc0; in init_chip()
1135 hc->Zlen = 1856; in init_chip()
1136 hc->DTMFbase = 0x2000; in init_chip()
1138 if (test_bit(HFC_CHIP_EXRAM_512, &hc->chip)) { in init_chip()
1142 hc->hw.r_ctrl |= V_EXT_RAM; in init_chip()
1143 hc->hw.r_ram_sz = 2; in init_chip()
1144 hc->Flen = 0x20; in init_chip()
1145 hc->Zmin = 0xc0; in init_chip()
1146 hc->Zlen = 8000; in init_chip()
1147 hc->DTMFbase = 0x2000; in init_chip()
1149 if (hc->ctype == HFC_TYPE_XHFC) { in init_chip()
1150 hc->Flen = 0x8; in init_chip()
1151 hc->Zmin = 0x0; in init_chip()
1152 hc->Zlen = 64; in init_chip()
1153 hc->DTMFbase = 0x0; in init_chip()
1155 hc->max_trans = poll << 1; in init_chip()
1156 if (hc->max_trans > hc->Zlen) in init_chip()
1157 hc->max_trans = hc->Zlen; in init_chip()
1160 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1163 __func__, hc->id + 1); in init_chip()
1165 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1189 if (test_bit(HFC_CHIP_PLXSD, &pos->chip)) { in init_chip()
1199 __func__, plx_last_hc->id + 1); in init_chip()
1201 plx_acc_32 = plx_last_hc->plx_membase + PLX_GPIOC; in init_chip()
1212 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1215 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1216 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ in init_chip()
1218 /* we only want the real Z2 read-pointer for revision > 0 */ in init_chip()
1219 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip)) in init_chip()
1220 hc->hw.r_ram_sz |= V_FZ_MD; in init_chip()
1223 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1228 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) && !plxsd_master) { in init_chip()
1232 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1240 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); in init_chip()
1241 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1245 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1247 if (hc->ctype == HFC_TYPE_XHFC) in init_chip()
1248 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES; in init_chip()
1250 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES in init_chip()
1252 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1254 hc->hw.r_cirm = 0; in init_chip()
1255 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); in init_chip()
1257 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1258 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); in init_chip()
1261 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1263 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1266 if (hc->hw.r_pcm_md0 & V_PCM_MD) { in init_chip()
1284 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x90); in init_chip()
1285 if (hc->slots == 32) in init_chip()
1287 if (hc->slots == 64) in init_chip()
1289 if (hc->slots == 128) in init_chip()
1291 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0); in init_chip()
1292 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in init_chip()
1294 else if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1298 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1302 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1304 hc->slot_owner[i] = -1; in init_chip()
1308 if (test_bit(HFC_CHIP_CLOCK2, &hc->chip)) { in init_chip()
1315 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) in init_chip()
1319 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in init_chip()
1320 printk(KERN_NOTICE "Setting GPIOs\n"); in init_chip()
1334 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1337 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1346 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1349 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) in init_chip()
1352 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in init_chip()
1358 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { in init_chip()
1362 err = -EIO; in init_chip()
1365 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_chip()
1370 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in init_chip()
1375 err = -EIO; in init_chip()
1379 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1381 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1391 hc->hw.r_pcm_md0 |= V_PCM_MD; in init_chip()
1392 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); in init_chip()
1393 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1396 spin_lock_irqsave(&hc->lock, flags); in init_chip()
1404 &hc->chip); in init_chip()
1413 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1414 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) in init_chip()
1417 plx_acc_32 = hc->plx_membase + PLX_GPIOC; in init_chip()
1428 if (hc->pcm) in init_chip()
1430 hc->pcm); in init_chip()
1432 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip) in init_chip()
1433 || test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_chip()
1436 hc->pcm = PCM_cnt; in init_chip()
1438 "(auto selected)\n", hc->pcm); in init_chip()
1443 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK; in init_chip()
1446 if (hc->ctype == HFC_TYPE_E1) in init_chip()
1447 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK; in init_chip()
1450 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) { in init_chip()
1453 "for all B-channel\n", __func__); in init_chip()
1454 hc->hw.r_dtmf = V_DTMF_EN | V_DTMF_STOP; in init_chip()
1455 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1456 hc->hw.r_dtmf |= V_ULAW_SEL; in init_chip()
1457 HFC_outb(hc, R_DTMF_N, 102 - 1); in init_chip()
1458 hc->hw.r_irqmsk_misc |= V_DTMF_IRQMSK; in init_chip()
1462 if (test_bit(HFC_CHIP_ULAW, &hc->chip)) in init_chip()
1466 if (hc->ctype != HFC_TYPE_XHFC) in init_chip()
1470 switch (hc->leds) { in init_chip()
1471 case 1: /* HFC-E1 OEM */ in init_chip()
1472 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in init_chip()
1483 case 2: /* HFC-4S OEM */ in init_chip()
1491 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) { in init_chip()
1492 hc->hw.r_st_sync = 0x10; /* V_AUTO_SYNCI */ in init_chip()
1493 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1497 if (hc->masterclk >= 0) { in init_chip()
1501 __func__, hc->masterclk, hc->ports - 1); in init_chip()
1502 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC); in init_chip()
1503 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); in init_chip()
1509 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); in init_chip()
1512 hc->hw.r_irqmsk_misc); in init_chip()
1534 printk(KERN_DEBUG "aborting - %d RAM access errors\n", err); in init_chip()
1535 err = -EIO; in init_chip()
1542 spin_unlock_irqrestore(&hc->lock, flags); in init_chip()
1553 hc->wdcount++; in hfcmulti_watchdog()
1555 if (hc->wdcount > 10) { in hfcmulti_watchdog()
1556 hc->wdcount = 0; in hfcmulti_watchdog()
1557 hc->wdbyte = hc->wdbyte == V_GPIO_OUT2 ? in hfcmulti_watchdog()
1560 /* printk("Sending Watchdog Kill %x\n",hc->wdbyte); */ in hfcmulti_watchdog()
1562 HFC_outb(hc, R_GPIO_OUT0, hc->wdbyte); in hfcmulti_watchdog()
1580 switch (hc->leds) { in hfcmulti_leds()
1581 case 1: /* HFC-E1 OEM */ in hfcmulti_leds()
1592 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_leds()
1594 if (hc->chan[hc->dnum[0]].los) in hfcmulti_leds()
1596 if (hc->e1_state != 1) { in hfcmulti_leds()
1598 hc->flash[2] = 0; in hfcmulti_leds()
1599 hc->flash[3] = 0; in hfcmulti_leds()
1603 if (!hc->flash[2] && hc->activity_tx) in hfcmulti_leds()
1604 hc->flash[2] = poll; in hfcmulti_leds()
1605 if (!hc->flash[3] && hc->activity_rx) in hfcmulti_leds()
1606 hc->flash[3] = poll; in hfcmulti_leds()
1607 if (hc->flash[2] && hc->flash[2] < 1024) in hfcmulti_leds()
1609 if (hc->flash[3] && hc->flash[3] < 1024) in hfcmulti_leds()
1611 if (hc->flash[2] >= 2048) in hfcmulti_leds()
1612 hc->flash[2] = 0; in hfcmulti_leds()
1613 if (hc->flash[3] >= 2048) in hfcmulti_leds()
1614 hc->flash[3] = 0; in hfcmulti_leds()
1615 if (hc->flash[2]) in hfcmulti_leds()
1616 hc->flash[2] += poll; in hfcmulti_leds()
1617 if (hc->flash[3]) in hfcmulti_leds()
1618 hc->flash[3] += poll; in hfcmulti_leds()
1623 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1625 hc->ledstate = leds; in hfcmulti_leds()
1629 case 2: /* HFC-4S OEM */ in hfcmulti_leds()
1636 active = -1; in hfcmulti_leds()
1637 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1639 state = dch->state; in hfcmulti_leds()
1640 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1648 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1649 if (!hc->flash[i] && in hfcmulti_leds()
1650 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1651 hc->flash[i] = poll; in hfcmulti_leds()
1652 if (hc->flash[i] && hc->flash[i] < 1024) in hfcmulti_leds()
1654 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1655 hc->flash[i] = 0; in hfcmulti_leds()
1656 if (hc->flash[i]) in hfcmulti_leds()
1657 hc->flash[i] += poll; in hfcmulti_leds()
1660 hc->flash[i] = 0; in hfcmulti_leds()
1665 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in hfcmulti_leds()
1676 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1678 hc->ledstate = leds; in hfcmulti_leds()
1685 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1688 hc->ledstate = leds; in hfcmulti_leds()
1700 active = -1; in hfcmulti_leds()
1701 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1703 state = dch->state; in hfcmulti_leds()
1704 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1712 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1713 if (!hc->flash[i] && in hfcmulti_leds()
1714 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1715 hc->flash[i] = poll; in hfcmulti_leds()
1716 if (hc->flash[i] < 1024) in hfcmulti_leds()
1718 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1719 hc->flash[i] = 0; in hfcmulti_leds()
1720 if (hc->flash[i]) in hfcmulti_leds()
1721 hc->flash[i] += poll; in hfcmulti_leds()
1724 hc->flash[i] = 0; in hfcmulti_leds()
1731 if (leds != (int)hc->ledstate) { in hfcmulti_leds()
1736 hc->ledstate = leds; in hfcmulti_leds()
1747 active = -1; in hfcmulti_leds()
1748 dch = hc->chan[(i << 2) | 2].dch; in hfcmulti_leds()
1750 state = dch->state; in hfcmulti_leds()
1751 if (dch->dev.D.protocol == ISDN_P_NT_S0) in hfcmulti_leds()
1759 hc->activity_tx |= hc->activity_rx; in hfcmulti_leds()
1760 if (!hc->flash[i] && in hfcmulti_leds()
1761 (hc->activity_tx & (1 << i))) in hfcmulti_leds()
1762 hc->flash[i] = poll; in hfcmulti_leds()
1763 if (hc->flash[i] < 1024) in hfcmulti_leds()
1765 if (hc->flash[i] >= 2048) in hfcmulti_leds()
1766 hc->flash[i] = 0; in hfcmulti_leds()
1767 if (hc->flash[i]) in hfcmulti_leds()
1768 hc->flash[i] += poll; in hfcmulti_leds()
1770 hc->flash[i] = 0; in hfcmulti_leds()
1774 if (leddw != hc->ledstate) { in hfcmulti_leds()
1779 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_leds()
1780 outl(leddw, hc->pci_iobase); in hfcmulti_leds()
1782 hc->ledstate = leddw; in hfcmulti_leds()
1786 hc->activity_tx = 0; in hfcmulti_leds()
1787 hc->activity_rx = 0; in hfcmulti_leds()
1810 /* only process enabled B-channels */ in hfcmulti_dtmf()
1811 bch = hc->chan[ch].bch; in hfcmulti_dtmf()
1814 if (!hc->created[hc->chan[ch].port]) in hfcmulti_dtmf()
1816 if (!test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_dtmf()
1821 coeff = &(hc->chan[ch].coeff[hc->chan[ch].coeff_count * 16]); in hfcmulti_dtmf()
1824 /* read W(n-1) coefficient */ in hfcmulti_dtmf()
1825 addr = hc->DTMFbase + ((co << 7) | (ch << 2)); in hfcmulti_dtmf()
1842 mantissa <<= (exponent - 1); in hfcmulti_dtmf()
1861 mantissa <<= (exponent - 1); in hfcmulti_dtmf()
1872 hc->chan[ch].coeff_count++; in hfcmulti_dtmf()
1873 if (hc->chan[ch].coeff_count == 8) { in hfcmulti_dtmf()
1874 hc->chan[ch].coeff_count = 0; in hfcmulti_dtmf()
1882 hh->prim = PH_CONTROL_IND; in hfcmulti_dtmf()
1883 hh->id = DTMF_HFC_COEF; in hfcmulti_dtmf()
1884 skb_put_data(skb, hc->chan[ch].coeff, 512); in hfcmulti_dtmf()
1890 hc->dtmf = dtmf; in hfcmulti_dtmf()
1892 HFC_outb_nodebug(hc, R_DTMF, hc->hw.r_dtmf | V_RST_DTMF); in hfcmulti_dtmf()
1913 bch = hc->chan[ch].bch; in hfcmulti_tx()
1914 dch = hc->chan[ch].dch; in hfcmulti_tx()
1918 txpending = &hc->chan[ch].txpending; in hfcmulti_tx()
1919 slot_tx = hc->chan[ch].slot_tx; in hfcmulti_tx()
1921 if (!test_bit(FLG_ACTIVE, &dch->Flags)) in hfcmulti_tx()
1923 sp = &dch->tx_skb; in hfcmulti_tx()
1924 idxp = &dch->tx_idx; in hfcmulti_tx()
1926 if (!test_bit(FLG_ACTIVE, &bch->Flags)) in hfcmulti_tx()
1928 sp = &bch->tx_skb; in hfcmulti_tx()
1929 idxp = &bch->tx_idx; in hfcmulti_tx()
1932 len = (*sp)->len; in hfcmulti_tx()
1937 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_tx()
1938 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_tx()
1939 (hc->chan[ch].slot_rx < 0) && in hfcmulti_tx()
1940 (hc->chan[ch].slot_tx < 0)) in hfcmulti_tx()
1954 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_tx()
1961 __func__, hc->id + 1, temp, f2); in hfcmulti_tx()
1964 Fspace = f2 - f1 - 1; in hfcmulti_tx()
1966 Fspace += hc->Flen; in hfcmulti_tx()
1973 if (test_bit(HFC_CHIP_REVISION0, &hc->chip)) { in hfcmulti_tx()
1979 /* one frame only for ST D-channels, to allow resending */ in hfcmulti_tx()
1980 if (hc->ctype != HFC_TYPE_E1 && dch) { in hfcmulti_tx()
1984 /* F-counter full condition */ in hfcmulti_tx()
1988 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_tx()
1989 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_tx()
1990 while (z2 != (temp = (HFC_inw_nodebug(hc, A_Z2) - hc->Zmin))) { in hfcmulti_tx()
1993 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_tx()
1996 hc->chan[ch].Zfill = z1 - z2; in hfcmulti_tx()
1997 if (hc->chan[ch].Zfill < 0) in hfcmulti_tx()
1998 hc->chan[ch].Zfill += hc->Zlen; in hfcmulti_tx()
1999 Zspace = z2 - z1; in hfcmulti_tx()
2001 Zspace += hc->Zlen; in hfcmulti_tx()
2002 Zspace -= 4; /* keep not too full, so pointers will not overrun */ in hfcmulti_tx()
2004 if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_tx()
2005 Zspace = Zspace - hc->Zlen + hc->max_trans; in hfcmulti_tx()
2013 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && in hfcmulti_tx()
2022 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2031 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2047 if (bch && test_bit(FLG_FILLEMPTY, &bch->Flags) in hfcmulti_tx()
2048 && !test_bit(FLG_HDLC, &bch->Flags) && z2 == z1) { in hfcmulti_tx()
2053 hc->write_fifo(hc, hc->silence_data, poll >> 1); in hfcmulti_tx()
2054 Zspace -= (poll >> 1); in hfcmulti_tx()
2058 if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && (!*txpending) in hfcmulti_tx()
2065 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2074 if (hc->ctype == HFC_TYPE_XHFC) in hfcmulti_tx()
2088 hc->activity_tx |= 1 << hc->chan[ch].port; in hfcmulti_tx()
2092 if (dch || test_bit(FLG_HDLC, &bch->Flags)) in hfcmulti_tx()
2097 d = (*sp)->data + i; in hfcmulti_tx()
2098 if (ii - i > Zspace) in hfcmulti_tx()
2103 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, in hfcmulti_tx()
2107 hc->write_fifo(hc, d, ii - i); in hfcmulti_tx()
2108 hc->chan[ch].Zfill += ii - i; in hfcmulti_tx()
2118 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_tx()
2119 /* increment f-counter */ in hfcmulti_tx()
2127 len = (*sp)->len; in hfcmulti_tx()
2131 len = (*sp)->len; in hfcmulti_tx()
2140 if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) in hfcmulti_tx()
2141 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in hfcmulti_tx()
2158 bch = hc->chan[ch].bch; in hfcmulti_rx()
2160 if (!test_bit(FLG_ACTIVE, &bch->Flags)) in hfcmulti_rx()
2162 } else if (hc->chan[ch].dch) { in hfcmulti_rx()
2163 dch = hc->chan[ch].dch; in hfcmulti_rx()
2164 if (!test_bit(FLG_ACTIVE, &dch->Flags)) in hfcmulti_rx()
2172 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in hfcmulti_rx()
2173 (hc->chan[ch].protocol == ISDN_P_B_RAW) && in hfcmulti_rx()
2174 (hc->chan[ch].slot_rx < 0) && in hfcmulti_rx()
2175 (hc->chan[ch].slot_tx < 0)) in hfcmulti_rx()
2182 if (hc->chan[ch].rx_off) { in hfcmulti_rx()
2184 bch->dropcnt += poll; /* not exact but fair enough */ in hfcmulti_rx()
2188 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_rx()
2194 __func__, hc->id + 1, temp, f1); in hfcmulti_rx()
2199 z1 = HFC_inw_nodebug(hc, A_Z1) - hc->Zmin; in hfcmulti_rx()
2200 while (z1 != (temp = (HFC_inw_nodebug(hc, A_Z1) - hc->Zmin))) { in hfcmulti_rx()
2203 "%d!=%d\n", __func__, hc->id + 1, temp, z2); in hfcmulti_rx()
2206 z2 = HFC_inw_nodebug(hc, A_Z2) - hc->Zmin; in hfcmulti_rx()
2207 Zsize = z1 - z2; in hfcmulti_rx()
2208 if ((dch || test_bit(FLG_HDLC, &bch->Flags)) && f1 != f2) in hfcmulti_rx()
2212 Zsize += hc->Zlen; in hfcmulti_rx()
2221 hc->id + 1, bch->nr, Zsize); in hfcmulti_rx()
2224 sp = &bch->rx_skb; in hfcmulti_rx()
2225 maxlen = bch->maxlen; in hfcmulti_rx()
2227 sp = &dch->rx_skb; in hfcmulti_rx()
2228 maxlen = dch->maxlen + 3; in hfcmulti_rx()
2233 hc->id + 1); in hfcmulti_rx()
2240 hc->activity_rx |= 1 << hc->chan[ch].port; in hfcmulti_rx()
2243 if (dch || test_bit(FLG_HDLC, &bch->Flags)) { in hfcmulti_rx()
2247 "got=%d (again %d)\n", __func__, hc->id + 1, ch, in hfcmulti_rx()
2249 f1, f2, Zsize + (*sp)->len, again); in hfcmulti_rx()
2251 if ((Zsize + (*sp)->len) > maxlen) { in hfcmulti_rx()
2254 "%s(card %d): hdlc-frame too large.\n", in hfcmulti_rx()
2255 __func__, hc->id + 1); in hfcmulti_rx()
2262 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2265 /* increment Z2,F2-counter */ in hfcmulti_rx()
2269 if ((*sp)->len < 4) { in hfcmulti_rx()
2273 "size\n", __func__, hc->id + 1); in hfcmulti_rx()
2278 if ((*sp)->data[(*sp)->len - 1]) { in hfcmulti_rx()
2281 "%s: CRC-error\n", __func__); in hfcmulti_rx()
2285 skb_trim(*sp, (*sp)->len - 3); in hfcmulti_rx()
2286 if ((*sp)->len < MISDN_COPY_SIZE) { in hfcmulti_rx()
2288 *sp = mI_alloc_skb(skb->len, GFP_ATOMIC); in hfcmulti_rx()
2290 skb_put_data(*sp, skb->data, skb->len); in hfcmulti_rx()
2303 __func__, hc->id + 1); in hfcmulti_rx()
2305 while (temp < (*sp)->len) in hfcmulti_rx()
2306 printk(" %02x", (*sp)->data[temp++]); in hfcmulti_rx()
2320 hc->read_fifo(hc, skb_put(*sp, Zsize), Zsize); in hfcmulti_rx()
2325 __func__, hc->id + 1, ch, Zsize, z1, z2); in hfcmulti_rx()
2327 recv_Bchannel(bch, hc->chan[ch].Zfill, false); in hfcmulti_rx()
2361 if (hc->e1_resync) { in handle_timer_irq()
2364 if (hc->e1_resync & 1) { in handle_timer_irq()
2369 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in handle_timer_irq()
2372 if (hc->e1_resync & 2) { in handle_timer_irq()
2377 if (hc->e1_resync & 4) { in handle_timer_irq()
2380 "Enable QUARTZ for HFC-E1\n"); in handle_timer_irq()
2387 hc->e1_resync = 0; in handle_timer_irq()
2391 if (hc->ctype != HFC_TYPE_E1 || hc->e1_state == 1) in handle_timer_irq()
2393 if (hc->created[hc->chan[ch].port]) { in handle_timer_irq()
2395 /* fifo is started when switching to rx-fifo */ in handle_timer_irq()
2397 if (hc->chan[ch].dch && in handle_timer_irq()
2398 hc->chan[ch].nt_timer > -1) { in handle_timer_irq()
2399 dch = hc->chan[ch].dch; in handle_timer_irq()
2400 if (!(--hc->chan[ch].nt_timer)) { in handle_timer_irq()
2409 dch->state); in handle_timer_irq()
2414 if (hc->ctype == HFC_TYPE_E1 && hc->created[0]) { in handle_timer_irq()
2415 dch = hc->chan[hc->dnum[0]].dch; in handle_timer_irq()
2418 hc->chan[hc->dnum[0]].los = temp; in handle_timer_irq()
2419 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2420 if (!temp && hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2423 if (temp && !hc->chan[hc->dnum[0]].los) in handle_timer_irq()
2427 if (test_bit(HFC_CFG_REPORT_AIS, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2430 if (!temp && hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2433 if (temp && !hc->chan[hc->dnum[0]].ais) in handle_timer_irq()
2436 hc->chan[hc->dnum[0]].ais = temp; in handle_timer_irq()
2438 if (test_bit(HFC_CFG_REPORT_SLIP, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2441 if (!temp && hc->chan[hc->dnum[0]].slip_rx) in handle_timer_irq()
2444 hc->chan[hc->dnum[0]].slip_rx = temp; in handle_timer_irq()
2446 if (!temp && hc->chan[hc->dnum[0]].slip_tx) in handle_timer_irq()
2449 hc->chan[hc->dnum[0]].slip_tx = temp; in handle_timer_irq()
2451 if (test_bit(HFC_CFG_REPORT_RDI, &hc->chan[hc->dnum[0]].cfg)) { in handle_timer_irq()
2454 if (!temp && hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2457 if (temp && !hc->chan[hc->dnum[0]].rdi) in handle_timer_irq()
2460 hc->chan[hc->dnum[0]].rdi = temp; in handle_timer_irq()
2463 switch (hc->chan[hc->dnum[0]].sync) { in handle_timer_irq()
2470 __func__, hc->id); in handle_timer_irq()
2472 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2474 hc->chan[hc->dnum[0]].jitter | V_RX_INIT); in handle_timer_irq()
2475 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2485 __func__, hc->id); in handle_timer_irq()
2486 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2496 __func__, hc->id); in handle_timer_irq()
2497 hc->chan[hc->dnum[0]].sync = 2; in handle_timer_irq()
2506 __func__, hc->id); in handle_timer_irq()
2507 hc->chan[hc->dnum[0]].sync = 0; in handle_timer_irq()
2516 __func__, hc->id); in handle_timer_irq()
2517 hc->chan[hc->dnum[0]].sync = 1; in handle_timer_irq()
2523 if (test_bit(HFC_CHIP_WATCHDOG, &hc->chip)) in handle_timer_irq()
2526 if (hc->leds) in handle_timer_irq()
2540 if (hc->chan[ch].dch) { in ph_state_irq()
2541 dch = hc->chan[ch].dch; in ph_state_irq()
2544 hc->chan[ch].port); in ph_state_irq()
2559 /* Speech Design TE-sync indication */ in ph_state_irq()
2560 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) && in ph_state_irq()
2561 dch->dev.D.protocol == ISDN_P_TE_S0) { in ph_state_irq()
2563 hc->syncronized |= in ph_state_irq()
2564 (1 << hc->chan[ch].port); in ph_state_irq()
2566 hc->syncronized &= in ph_state_irq()
2567 ~(1 << hc->chan[ch].port); in ph_state_irq()
2569 dch->state = st_status & 0x0f; in ph_state_irq()
2570 if (dch->dev.D.protocol == ISDN_P_NT_S0) in ph_state_irq()
2574 if (dch->state == active) { in ph_state_irq()
2581 dch->tx_idx = 0; in ph_state_irq()
2587 __func__, dch->state, in ph_state_irq()
2588 hc->chan[ch].port); in ph_state_irq()
2593 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in ph_state_irq()
2609 dch = hc->chan[ch].dch; in fifo_irq()
2610 bch = hc->chan[ch].bch; in fifo_irq()
2611 if (((!dch) && (!bch)) || (!hc->created[hc->chan[ch].port])) { in fifo_irq()
2616 test_bit(FLG_ACTIVE, &dch->Flags)) { in fifo_irq()
2623 test_bit(FLG_ACTIVE, &bch->Flags)) { in fifo_irq()
2631 test_bit(FLG_ACTIVE, &dch->Flags)) { in fifo_irq()
2635 test_bit(FLG_ACTIVE, &bch->Flags)) { in fifo_irq()
2662 printk(KERN_ERR "HFC-multi: Spurious interrupt!\n"); in hfcmulti_interrupt()
2666 spin_lock(&hc->lock); in hfcmulti_interrupt()
2671 "card %d, this is no bug.\n", hc->id + 1, irqsem); in hfcmulti_interrupt()
2672 irqsem = hc->id + 1; in hfcmulti_interrupt()
2675 if (hc->immap->im_cpm.cp_pbdat & hc->pb_irqmsk) in hfcmulti_interrupt()
2678 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_interrupt()
2680 plx_acc = hc->plx_membase + PLX_INTCSR; in hfcmulti_interrupt()
2715 hc->irqcnt++; in hfcmulti_interrupt()
2717 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_interrupt()
2727 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */ in hfcmulti_interrupt()
2729 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_interrupt()
2731 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_interrupt()
2733 if (test_bit(HFC_CHIP_PLXSD, &hc->chip) in hfcmulti_interrupt()
2734 && hc->e1_getclock) { in hfcmulti_interrupt()
2736 hc->syncronized = 1; in hfcmulti_interrupt()
2738 hc->syncronized = 0; in hfcmulti_interrupt()
2754 __func__, hc->id, temp & 0x7); in hfcmulti_interrupt()
2755 for (i = 0; i < hc->ports; i++) { in hfcmulti_interrupt()
2756 dch = hc->chan[hc->dnum[i]].dch; in hfcmulti_interrupt()
2757 dch->state = temp & 0x7; in hfcmulti_interrupt()
2761 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) in hfcmulti_interrupt()
2766 if (hc->iclock_on) in hfcmulti_interrupt()
2767 mISDN_clock_update(hc->iclock, poll, NULL); in hfcmulti_interrupt()
2777 printk(KERN_DEBUG "%s: got V_IRQ_PROC -" in hfcmulti_interrupt()
2794 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2801 spin_unlock(&hc->lock); in hfcmulti_interrupt()
2807 * timer callback for D-chan busy resolution. Currently no function
2819 * configure B-channel with the given protocol
2820 * ch eqals to the HFC-channel (0-31)
2821 * ch is the number of channel (0-4,4-7,8-11,12-15,16-19,20-23,24-27,28-31
2822 * for S/T, 1-31 for E1)
2834 return -EINVAL; in mode_hfcmulti()
2835 oslot_tx = hc->chan[ch].slot_tx; in mode_hfcmulti()
2836 oslot_rx = hc->chan[ch].slot_rx; in mode_hfcmulti()
2837 conf = hc->chan[ch].conf; in mode_hfcmulti()
2843 __func__, hc->id, ch, protocol, oslot_tx, slot_tx, in mode_hfcmulti()
2851 if (hc->slot_owner[oslot_tx << 1] == ch) { in mode_hfcmulti()
2854 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2856 hc->slot_owner[oslot_tx << 1] = -1; in mode_hfcmulti()
2862 __func__, hc->slot_owner[oslot_tx << 1]); in mode_hfcmulti()
2872 if (hc->slot_owner[(oslot_rx << 1) | 1] == ch) { in mode_hfcmulti()
2875 hc->slot_owner[(oslot_rx << 1) | 1] = -1; in mode_hfcmulti()
2882 hc->slot_owner[(oslot_rx << 1) | 1]); in mode_hfcmulti()
2887 flow_tx = 0x80; /* FIFO->ST */ in mode_hfcmulti()
2889 hc->chan[ch].slot_tx = -1; in mode_hfcmulti()
2890 hc->chan[ch].bank_tx = 0; in mode_hfcmulti()
2893 if (hc->chan[ch].txpending) in mode_hfcmulti()
2894 flow_tx = 0x80; /* FIFO->ST */ in mode_hfcmulti()
2896 flow_tx = 0xc0; /* PCM->ST */ in mode_hfcmulti()
2908 if (hc->ctype != HFC_TYPE_XHFC) in mode_hfcmulti()
2911 hc->slot_owner[slot_tx << 1] = ch; in mode_hfcmulti()
2912 hc->chan[ch].slot_tx = slot_tx; in mode_hfcmulti()
2913 hc->chan[ch].bank_tx = bank_tx; in mode_hfcmulti()
2917 flow_rx = 0x80; /* ST->FIFO */ in mode_hfcmulti()
2918 hc->chan[ch].slot_rx = -1; in mode_hfcmulti()
2919 hc->chan[ch].bank_rx = 0; in mode_hfcmulti()
2922 if (hc->chan[ch].txpending) in mode_hfcmulti()
2923 flow_rx = 0x80; /* ST->FIFO */ in mode_hfcmulti()
2925 flow_rx = 0xc0; /* ST->(FIFO,PCM) */ in mode_hfcmulti()
2937 hc->slot_owner[(slot_rx << 1) | 1] = ch; in mode_hfcmulti()
2938 hc->chan[ch].slot_rx = slot_rx; in mode_hfcmulti()
2939 hc->chan[ch].bank_rx = bank_rx; in mode_hfcmulti()
2960 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
2961 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= in mode_hfcmulti()
2963 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
2967 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
2969 if (hc->chan[ch].bch) { in mode_hfcmulti()
2970 test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
2972 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
2975 case (ISDN_P_B_RAW): /* B-channel */ in mode_hfcmulti()
2977 if (test_bit(HFC_CHIP_B410P, &hc->chip) && in mode_hfcmulti()
2978 (hc->chan[ch].slot_rx < 0) && in mode_hfcmulti()
2979 (hc->chan[ch].slot_tx < 0)) { in mode_hfcmulti()
2982 "Setting B-channel %d to echo cancelable " in mode_hfcmulti()
2990 /* S/T -> PCM */ in mode_hfcmulti()
2998 /* PCM -> FIFO */ in mode_hfcmulti()
3004 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3013 /* PCM -> S/T */ in mode_hfcmulti()
3021 /* FIFO -> PCM */ in mode_hfcmulti()
3027 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3032 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3040 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3049 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3054 HFC_outb_nodebug(hc, A_FIFO_DATA0_NOINC, hc->silence); in mode_hfcmulti()
3058 if (hc->ctype == HFC_TYPE_XHFC) in mode_hfcmulti()
3067 if (hc->chan[ch].protocol != protocol) { in mode_hfcmulti()
3072 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3073 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3075 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3079 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3081 if (hc->chan[ch].bch) in mode_hfcmulti()
3083 &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3085 case (ISDN_P_B_HDLC): /* B-channel */ in mode_hfcmulti()
3086 case (ISDN_P_TE_S0): /* D-channel */ in mode_hfcmulti()
3093 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) { in mode_hfcmulti()
3094 /* E1 or B-channel */ in mode_hfcmulti()
3098 /* D-Channel without HDLC fill flags */ in mode_hfcmulti()
3109 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) in mode_hfcmulti()
3116 if (hc->chan[ch].bch) { in mode_hfcmulti()
3117 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); in mode_hfcmulti()
3118 if (hc->ctype != HFC_TYPE_E1) { in mode_hfcmulti()
3119 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= in mode_hfcmulti()
3121 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); in mode_hfcmulti()
3125 hc->hw.a_st_ctrl0[hc->chan[ch].port]); in mode_hfcmulti()
3132 hc->chan[ch].protocol = ISDN_P_NONE; in mode_hfcmulti()
3133 return -ENOPROTOOPT; in mode_hfcmulti()
3135 hc->chan[ch].protocol = protocol; in mode_hfcmulti()
3150 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0); in hfcmulti_pcm()
3155 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, slot_tx, bank_tx, in hfcmulti_pcm()
3167 hc->chan[ch].conf = num; in hfcmulti_conf()
3169 hc->chan[ch].conf = -1; in hfcmulti_conf()
3170 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, hc->chan[ch].slot_tx, in hfcmulti_conf()
3171 hc->chan[ch].bank_tx, hc->chan[ch].slot_rx, in hfcmulti_conf()
3172 hc->chan[ch].bank_rx); in hfcmulti_conf()
3188 struct hfc_multi *hc = dch->hw; in hfcm_l1callback()
3198 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3199 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3205 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3214 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3215 l1_event(dch->l1, HW_POWERUP_IND); in hfcm_l1callback()
3220 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3221 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3227 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3232 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcm_l1callback()
3233 hc->syncronized &= in hfcm_l1callback()
3234 ~(1 << hc->chan[dch->slot].port); in hfcm_l1callback()
3238 skb_queue_splice_init(&dch->squeue, &free_queue); in hfcm_l1callback()
3239 if (dch->tx_skb) { in hfcm_l1callback()
3240 __skb_queue_tail(&free_queue, dch->tx_skb); in hfcm_l1callback()
3241 dch->tx_skb = NULL; in hfcm_l1callback()
3243 dch->tx_idx = 0; in hfcm_l1callback()
3244 if (dch->rx_skb) { in hfcm_l1callback()
3245 __skb_queue_tail(&free_queue, dch->rx_skb); in hfcm_l1callback()
3246 dch->rx_skb = NULL; in hfcm_l1callback()
3248 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in hfcm_l1callback()
3249 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in hfcm_l1callback()
3250 del_timer(&dch->timer); in hfcm_l1callback()
3251 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3255 spin_lock_irqsave(&hc->lock, flags); in hfcm_l1callback()
3256 if (hc->ctype == HFC_TYPE_E1) { in hfcm_l1callback()
3262 HFC_outb(hc, R_ST_SEL, hc->chan[dch->slot].port); in hfcm_l1callback()
3269 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_l1callback()
3272 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in hfcm_l1callback()
3273 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfcm_l1callback()
3277 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in hfcm_l1callback()
3278 _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL, in hfcm_l1callback()
3282 if (dch->debug & DEBUG_HW) in hfcm_l1callback()
3285 return -1; in hfcm_l1callback()
3291 * Layer2 -> Layer 1 Transfer
3299 struct hfc_multi *hc = dch->hw; in handle_dmsg()
3301 int ret = -EINVAL; in handle_dmsg()
3305 switch (hh->prim) { in handle_dmsg()
3307 if (skb->len < 1) in handle_dmsg()
3309 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3312 id = hh->id; /* skb can be freed */ in handle_dmsg()
3313 hfcmulti_tx(hc, dch->slot); in handle_dmsg()
3318 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3321 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3324 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in handle_dmsg()
3325 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3330 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3331 hc->ports - 1); in handle_dmsg()
3333 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3338 __func__, dch->state); in handle_dmsg()
3341 hc->chan[dch->slot].port); in handle_dmsg()
3350 dch->state = 1; in handle_dmsg()
3352 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3354 ret = l1_event(dch->l1, hh->prim); in handle_dmsg()
3357 test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); in handle_dmsg()
3358 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in handle_dmsg()
3362 spin_lock_irqsave(&hc->lock, flags); in handle_dmsg()
3366 __func__, hc->chan[dch->slot].port, in handle_dmsg()
3367 hc->ports - 1); in handle_dmsg()
3369 if (hc->ctype == HFC_TYPE_E1) { in handle_dmsg()
3376 hc->chan[dch->slot].port); in handle_dmsg()
3381 dch->state = 1; in handle_dmsg()
3383 skb_queue_splice_init(&dch->squeue, &free_queue); in handle_dmsg()
3384 if (dch->tx_skb) { in handle_dmsg()
3385 __skb_queue_tail(&free_queue, dch->tx_skb); in handle_dmsg()
3386 dch->tx_skb = NULL; in handle_dmsg()
3388 dch->tx_idx = 0; in handle_dmsg()
3389 if (dch->rx_skb) { in handle_dmsg()
3390 __skb_queue_tail(&free_queue, dch->rx_skb); in handle_dmsg()
3391 dch->rx_skb = NULL; in handle_dmsg()
3393 test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); in handle_dmsg()
3394 if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) in handle_dmsg()
3395 del_timer(&dch->timer); in handle_dmsg()
3397 if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) in handle_dmsg()
3398 dchannel_sched_event(&hc->dch, D_CLEARBUSY); in handle_dmsg()
3401 spin_unlock_irqrestore(&hc->lock, flags); in handle_dmsg()
3404 ret = l1_event(dch->l1, hh->prim); in handle_dmsg()
3415 struct hfc_multi *hc = bch->hw; in deactivate_bchannel()
3418 spin_lock_irqsave(&hc->lock, flags); in deactivate_bchannel()
3420 hc->chan[bch->slot].coeff_count = 0; in deactivate_bchannel()
3421 hc->chan[bch->slot].rx_off = 0; in deactivate_bchannel()
3422 hc->chan[bch->slot].conf = -1; in deactivate_bchannel()
3423 mode_hfcmulti(hc, bch->slot, ISDN_P_NONE, -1, 0, -1, 0); in deactivate_bchannel()
3424 spin_unlock_irqrestore(&hc->lock, flags); in deactivate_bchannel()
3431 struct hfc_multi *hc = bch->hw; in handle_bmsg()
3432 int ret = -EINVAL; in handle_bmsg()
3436 switch (hh->prim) { in handle_bmsg()
3438 if (!skb->len) in handle_bmsg()
3440 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3443 hfcmulti_tx(hc, bch->slot); in handle_bmsg()
3449 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3454 __func__, bch->slot); in handle_bmsg()
3455 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3456 /* activate B-channel if not already activated */ in handle_bmsg()
3457 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags)) { in handle_bmsg()
3458 hc->chan[bch->slot].txpending = 0; in handle_bmsg()
3459 ret = mode_hfcmulti(hc, bch->slot, in handle_bmsg()
3460 ch->protocol, in handle_bmsg()
3461 hc->chan[bch->slot].slot_tx, in handle_bmsg()
3462 hc->chan[bch->slot].bank_tx, in handle_bmsg()
3463 hc->chan[bch->slot].slot_rx, in handle_bmsg()
3464 hc->chan[bch->slot].bank_rx); in handle_bmsg()
3466 if (ch->protocol == ISDN_P_B_RAW && !hc->dtmf in handle_bmsg()
3467 && test_bit(HFC_CHIP_DTMF, &hc->chip)) { in handle_bmsg()
3469 hc->dtmf = 1; in handle_bmsg()
3474 HFC_outb(hc, R_DTMF, hc->hw.r_dtmf | in handle_bmsg()
3480 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3486 spin_lock_irqsave(&hc->lock, flags); in handle_bmsg()
3487 switch (hh->id) { in handle_bmsg()
3492 __func__, skb->len); in handle_bmsg()
3504 __func__, hh->id); in handle_bmsg()
3505 ret = -EINVAL; in handle_bmsg()
3507 spin_unlock_irqrestore(&hc->lock, flags); in handle_bmsg()
3529 (struct dsp_features *)(*((u_long *)&cq->p1)); in channel_bctrl()
3530 struct hfc_multi *hc = bch->hw; in channel_bctrl()
3537 switch (cq->op) { in channel_bctrl()
3540 cq->op |= MISDN_CTRL_HFC_OP | MISDN_CTRL_HW_FEATURES_OP; in channel_bctrl()
3544 hc->chan[bch->slot].rx_off = !!cq->p1; in channel_bctrl()
3545 if (!hc->chan[bch->slot].rx_off) { in channel_bctrl()
3547 HFC_outb_nodebug(hc, R_FIFO, (bch->slot << 1) | 1); in channel_bctrl()
3554 __func__, bch->nr, hc->chan[bch->slot].rx_off); in channel_bctrl()
3558 hc->silence = bch->fill[0]; in channel_bctrl()
3559 memset(hc->silence_data, hc->silence, sizeof(hc->silence_data)); in channel_bctrl()
3566 features->hfc_id = hc->id; in channel_bctrl()
3567 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) in channel_bctrl()
3568 features->hfc_dtmf = 1; in channel_bctrl()
3569 if (test_bit(HFC_CHIP_CONF, &hc->chip)) in channel_bctrl()
3570 features->hfc_conf = 1; in channel_bctrl()
3571 features->hfc_loops = 0; in channel_bctrl()
3572 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { in channel_bctrl()
3573 features->hfc_echocanhw = 1; in channel_bctrl()
3575 features->pcm_id = hc->pcm; in channel_bctrl()
3576 features->pcm_slots = hc->slots; in channel_bctrl()
3577 features->pcm_banks = 2; in channel_bctrl()
3581 slot_tx = cq->p1 & 0xff; in channel_bctrl()
3582 bank_tx = cq->p1 >> 8; in channel_bctrl()
3583 slot_rx = cq->p2 & 0xff; in channel_bctrl()
3584 bank_rx = cq->p2 >> 8; in channel_bctrl()
3591 if (slot_tx < hc->slots && bank_tx <= 2 && in channel_bctrl()
3592 slot_rx < hc->slots && bank_rx <= 2) in channel_bctrl()
3593 hfcmulti_pcm(hc, bch->slot, in channel_bctrl()
3601 ret = -EINVAL; in channel_bctrl()
3608 hfcmulti_pcm(hc, bch->slot, -1, 0, -1, 0); in channel_bctrl()
3611 num = cq->p1 & 0xff; in channel_bctrl()
3616 hfcmulti_conf(hc, bch->slot, num); in channel_bctrl()
3621 ret = -EINVAL; in channel_bctrl()
3627 hfcmulti_conf(hc, bch->slot, -1); in channel_bctrl()
3632 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3633 vpm_echocan_on(hc, bch->slot, cq->p1); in channel_bctrl()
3635 ret = -EINVAL; in channel_bctrl()
3642 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in channel_bctrl()
3643 vpm_echocan_off(hc, bch->slot); in channel_bctrl()
3645 ret = -EINVAL; in channel_bctrl()
3658 struct hfc_multi *hc = bch->hw; in hfcm_bctrl()
3659 int err = -EINVAL; in hfcm_bctrl()
3662 if (bch->debug & DEBUG_HW) in hfcm_bctrl()
3667 test_and_clear_bit(FLG_OPEN, &bch->Flags); in hfcm_bctrl()
3669 ch->protocol = ISDN_P_NONE; in hfcm_bctrl()
3670 ch->peer = NULL; in hfcm_bctrl()
3675 spin_lock_irqsave(&hc->lock, flags); in hfcm_bctrl()
3677 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_bctrl()
3687 * handle D-channel events
3701 hc = dch->hw; in ph_state_change()
3702 ch = dch->slot; in ph_state_change()
3704 if (hc->ctype == HFC_TYPE_E1) { in ph_state_change()
3705 if (dch->dev.D.protocol == ISDN_P_TE_E1) { in ph_state_change()
3709 __func__, hc->id, dch->state); in ph_state_change()
3714 __func__, hc->id, dch->state); in ph_state_change()
3716 switch (dch->state) { in ph_state_change()
3718 if (hc->e1_state != 1) { in ph_state_change()
3729 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3730 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in ph_state_change()
3735 if (hc->e1_state != 1) in ph_state_change()
3737 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3738 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_change()
3741 hc->e1_state = dch->state; in ph_state_change()
3743 if (dch->dev.D.protocol == ISDN_P_TE_S0) { in ph_state_change()
3747 __func__, dch->state); in ph_state_change()
3748 switch (dch->state) { in ph_state_change()
3750 l1_event(dch->l1, HW_RESET_IND); in ph_state_change()
3753 l1_event(dch->l1, HW_DEACT_IND); in ph_state_change()
3757 l1_event(dch->l1, ANYSIGNAL); in ph_state_change()
3760 l1_event(dch->l1, INFO2); in ph_state_change()
3763 l1_event(dch->l1, INFO4_P8); in ph_state_change()
3769 __func__, dch->state); in ph_state_change()
3770 switch (dch->state) { in ph_state_change()
3772 if (hc->chan[ch].nt_timer == 0) { in ph_state_change()
3773 hc->chan[ch].nt_timer = -1; in ph_state_change()
3775 hc->chan[ch].port); in ph_state_change()
3782 dch->state = 4; in ph_state_change()
3785 hc->chan[ch].nt_timer = in ph_state_change()
3788 hc->chan[ch].port); in ph_state_change()
3791 /* allow G2 -> G3 transition */ in ph_state_change()
3797 hc->chan[ch].nt_timer = -1; in ph_state_change()
3798 test_and_clear_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3799 _queue_data(&dch->dev.D, PH_DEACTIVATE_IND, in ph_state_change()
3803 hc->chan[ch].nt_timer = -1; in ph_state_change()
3806 hc->chan[ch].nt_timer = -1; in ph_state_change()
3807 test_and_set_bit(FLG_ACTIVE, &dch->Flags); in ph_state_change()
3808 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, in ph_state_change()
3823 struct hfc_multi *hc = dch->hw; in hfcmulti_initmode()
3830 i = dch->slot; in hfcmulti_initmode()
3831 pt = hc->chan[i].port; in hfcmulti_initmode()
3832 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_initmode()
3834 hc->chan[hc->dnum[pt]].slot_tx = -1; in hfcmulti_initmode()
3835 hc->chan[hc->dnum[pt]].slot_rx = -1; in hfcmulti_initmode()
3836 hc->chan[hc->dnum[pt]].conf = -1; in hfcmulti_initmode()
3837 if (hc->dnum[pt]) { in hfcmulti_initmode()
3838 mode_hfcmulti(hc, dch->slot, dch->dev.D.protocol, in hfcmulti_initmode()
3839 -1, 0, -1, 0); in hfcmulti_initmode()
3840 timer_setup(&dch->timer, hfcmulti_dbusy_timer, 0); in hfcmulti_initmode()
3843 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in hfcmulti_initmode()
3845 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3846 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3847 hc->chan[i].conf = -1; in hfcmulti_initmode()
3848 mode_hfcmulti(hc, i, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3851 if (hc->ctype == HFC_TYPE_E1 && pt == 0) { in hfcmulti_initmode()
3853 dch = hc->chan[hc->dnum[0]].dch; in hfcmulti_initmode()
3854 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3858 if (test_bit(HFC_CFG_OPTICAL, &hc->chan[hc->dnum[0]].cfg)) { in hfcmulti_initmode()
3860 hc->hw.r_tx0 = 0 | V_OUT_EN; in hfcmulti_initmode()
3863 hc->hw.r_tx0 = 1 | V_OUT_EN; in hfcmulti_initmode()
3865 hc->hw.r_tx1 = V_ATX | V_NTRI; in hfcmulti_initmode()
3866 HFC_outb(hc, R_TX0, hc->hw.r_tx0); in hfcmulti_initmode()
3867 HFC_outb(hc, R_TX1, hc->hw.r_tx1); in hfcmulti_initmode()
3871 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3876 if (test_bit(HFC_CFG_CRC4, &hc->chan[hc->dnum[0]].cfg)) in hfcmulti_initmode()
3879 if (dch->dev.D.protocol == ISDN_P_NT_E1) { in hfcmulti_initmode()
3881 printk(KERN_DEBUG "%s: E1 port is NT-mode\n", in hfcmulti_initmode()
3884 hc->e1_getclock = 0; in hfcmulti_initmode()
3887 printk(KERN_DEBUG "%s: E1 port is TE-mode\n", in hfcmulti_initmode()
3890 hc->e1_getclock = 1; in hfcmulti_initmode()
3892 if (test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) in hfcmulti_initmode()
3896 if (test_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip)) in hfcmulti_initmode()
3897 hc->e1_getclock = 1; in hfcmulti_initmode()
3898 if (test_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip)) in hfcmulti_initmode()
3899 hc->e1_getclock = 0; in hfcmulti_initmode()
3900 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in hfcmulti_initmode()
3908 if (hc->e1_getclock) { in hfcmulti_initmode()
3935 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
3936 hc->syncronized = 0; in hfcmulti_initmode()
3940 if (hc->ctype != HFC_TYPE_E1) { in hfcmulti_initmode()
3942 hc->chan[i].slot_tx = -1; in hfcmulti_initmode()
3943 hc->chan[i].slot_rx = -1; in hfcmulti_initmode()
3944 hc->chan[i].conf = -1; in hfcmulti_initmode()
3945 mode_hfcmulti(hc, i, dch->dev.D.protocol, -1, 0, -1, 0); in hfcmulti_initmode()
3946 timer_setup(&dch->timer, hfcmulti_dbusy_timer, 0); in hfcmulti_initmode()
3947 hc->chan[i - 2].slot_tx = -1; in hfcmulti_initmode()
3948 hc->chan[i - 2].slot_rx = -1; in hfcmulti_initmode()
3949 hc->chan[i - 2].conf = -1; in hfcmulti_initmode()
3950 mode_hfcmulti(hc, i - 2, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3951 hc->chan[i - 1].slot_tx = -1; in hfcmulti_initmode()
3952 hc->chan[i - 1].slot_rx = -1; in hfcmulti_initmode()
3953 hc->chan[i - 1].conf = -1; in hfcmulti_initmode()
3954 mode_hfcmulti(hc, i - 1, ISDN_P_NONE, -1, 0, -1, 0); in hfcmulti_initmode()
3959 if (dch->dev.D.protocol == ISDN_P_NT_S0) { in hfcmulti_initmode()
3962 "%s: ST port %d is NT-mode\n", in hfcmulti_initmode()
3967 hc->hw.a_st_ctrl0[pt] = V_ST_MD; in hfcmulti_initmode()
3971 "%s: ST port %d is TE-mode\n", in hfcmulti_initmode()
3976 hc->hw.a_st_ctrl0[pt] = 0; in hfcmulti_initmode()
3978 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg)) in hfcmulti_initmode()
3979 hc->hw.a_st_ctrl0[pt] |= V_TX_LI; in hfcmulti_initmode()
3980 if (hc->ctype == HFC_TYPE_XHFC) { in hfcmulti_initmode()
3981 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */; in hfcmulti_initmode()
3986 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); in hfcmulti_initmode()
3987 /* disable E-channel */ in hfcmulti_initmode()
3988 if ((dch->dev.D.protocol == ISDN_P_NT_S0) || in hfcmulti_initmode()
3989 test_bit(HFC_CFG_DIS_ECHANNEL, &hc->chan[i].cfg)) in hfcmulti_initmode()
3993 /* enable B-channel receive */ in hfcmulti_initmode()
3999 hc->hw.r_sci_msk |= 1 << pt; in hfcmulti_initmode()
4001 HFC_outb(hc, R_SCI_MSK, hc->hw.r_sci_msk); in hfcmulti_initmode()
4003 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in hfcmulti_initmode()
4004 hc->syncronized &= in hfcmulti_initmode()
4005 ~(1 << hc->chan[dch->slot].port); in hfcmulti_initmode()
4023 dch->dev.id, __builtin_return_address(0)); in open_dchannel()
4024 if (rq->protocol == ISDN_P_NONE) in open_dchannel()
4025 return -EINVAL; in open_dchannel()
4026 if ((dch->dev.D.protocol != ISDN_P_NONE) && in open_dchannel()
4027 (dch->dev.D.protocol != rq->protocol)) { in open_dchannel()
4030 __func__, dch->dev.D.protocol, rq->protocol); in open_dchannel()
4032 if ((dch->dev.D.protocol == ISDN_P_TE_S0) && in open_dchannel()
4033 (rq->protocol != ISDN_P_TE_S0)) in open_dchannel()
4034 l1_event(dch->l1, CLOSE_CHANNEL); in open_dchannel()
4035 if (dch->dev.D.protocol != rq->protocol) { in open_dchannel()
4036 if (rq->protocol == ISDN_P_TE_S0) { in open_dchannel()
4041 dch->dev.D.protocol = rq->protocol; in open_dchannel()
4042 spin_lock_irqsave(&hc->lock, flags); in open_dchannel()
4044 spin_unlock_irqrestore(&hc->lock, flags); in open_dchannel()
4046 if (test_bit(FLG_ACTIVE, &dch->Flags)) in open_dchannel()
4047 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, MISDN_ID_ANY, in open_dchannel()
4049 rq->ch = &dch->dev.D; in open_dchannel()
4062 if (!test_channelmap(rq->adr.channel, dch->dev.channelmap)) in open_bchannel()
4063 return -EINVAL; in open_bchannel()
4064 if (rq->protocol == ISDN_P_NONE) in open_bchannel()
4065 return -EINVAL; in open_bchannel()
4066 if (hc->ctype == HFC_TYPE_E1) in open_bchannel()
4067 ch = rq->adr.channel; in open_bchannel()
4069 ch = (rq->adr.channel - 1) + (dch->slot - 2); in open_bchannel()
4070 bch = hc->chan[ch].bch; in open_bchannel()
4074 return -EINVAL; in open_bchannel()
4076 if (test_and_set_bit(FLG_OPEN, &bch->Flags)) in open_bchannel()
4077 return -EBUSY; /* b-channel can be only open once */ in open_bchannel()
4078 bch->ch.protocol = rq->protocol; in open_bchannel()
4079 hc->chan[ch].rx_off = 0; in open_bchannel()
4080 rq->ch = &bch->ch; in open_bchannel()
4092 struct hfc_multi *hc = dch->hw; in channel_dctrl()
4096 switch (cq->op) { in channel_dctrl()
4098 cq->op = MISDN_CTRL_HFC_OP | MISDN_CTRL_L1_TIMER3; in channel_dctrl()
4101 wd_cnt = cq->p1 & 0xf; in channel_dctrl()
4102 wd_mode = !!(cq->p1 >> 4); in channel_dctrl()
4109 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0); in channel_dctrl()
4110 if (hc->ctype == HFC_TYPE_XHFC) in channel_dctrl()
4111 hc->hw.r_bert_wd_md |= 0x40 /* V_WD_EN */; in channel_dctrl()
4113 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4114 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in channel_dctrl()
4115 /* enable the watchdog output for Speech-Design */ in channel_dctrl()
4126 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES); in channel_dctrl()
4129 ret = l1_event(dch->l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); in channel_dctrl()
4133 __func__, cq->op); in channel_dctrl()
4134 ret = -EINVAL; in channel_dctrl()
4145 struct hfc_multi *hc = dch->hw; in hfcm_dctrl()
4150 if (dch->debug & DEBUG_HW) in hfcm_dctrl()
4156 switch (rq->protocol) { in hfcm_dctrl()
4159 if (hc->ctype == HFC_TYPE_E1) { in hfcm_dctrl()
4160 err = -EINVAL; in hfcm_dctrl()
4167 if (hc->ctype != HFC_TYPE_E1) { in hfcm_dctrl()
4168 err = -EINVAL; in hfcm_dctrl()
4174 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4176 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4182 __func__, dch->dev.id, in hfcm_dctrl()
4187 spin_lock_irqsave(&hc->lock, flags); in hfcm_dctrl()
4189 spin_unlock_irqrestore(&hc->lock, flags); in hfcm_dctrl()
4192 if (dch->debug & DEBUG_HW) in hfcm_dctrl()
4195 err = -EINVAL; in hfcm_dctrl()
4205 hc->iclock_on = enable; in clockctl()
4220 int err = -EIO; in init_card()
4228 spin_lock_irqsave(&hc->lock, flags); in init_card()
4230 hc->hw.r_irq_ctrl = V_FIFO_IRQ; in init_card()
4232 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4234 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED, in init_card()
4235 "HFC-multi", hc)) { in init_card()
4237 hc->irq); in init_card()
4238 hc->irq = 0; in init_card()
4239 return -EIO; in init_card()
4242 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4244 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4252 __func__, hc->irq, hc->irqcnt); in init_card()
4261 spin_lock_irqsave(&hc->lock, flags); in init_card()
4263 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4268 spin_lock_irqsave(&hc->lock, flags); in init_card()
4270 spin_unlock_irqrestore(&hc->lock, flags); in init_card()
4273 __func__, hc->irq, hc->irqcnt); in init_card()
4274 if (hc->irqcnt) { in init_card()
4280 if (test_bit(HFC_CHIP_PCM_SLAVE, &hc->chip)) { in init_card()
4286 hc->irq); in init_card()
4288 err = -EIO; in init_card()
4291 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in init_card()
4293 plx_acc = hc->plx_membase + PLX_INTCSR; in init_card()
4299 printk(KERN_DEBUG "%s: free irq %d\n", __func__, hc->irq); in init_card()
4300 if (hc->irq) { in init_card()
4301 free_irq(hc->irq, hc); in init_card()
4302 hc->irq = 0; in init_card()
4318 struct hm_map *m = (struct hm_map *)ent->driver_data; in setup_pci()
4321 "HFC-multi: card manufacturer: '%s' card name: '%s' clock: %s\n", in setup_pci()
4322 m->vendor_name, m->card_name, m->clock2 ? "double" : "normal"); in setup_pci()
4324 hc->pci_dev = pdev; in setup_pci()
4325 if (m->clock2) in setup_pci()
4326 test_and_set_bit(HFC_CHIP_CLOCK2, &hc->chip); in setup_pci()
4328 if (ent->vendor == PCI_VENDOR_ID_DIGIUM && in setup_pci()
4329 ent->device == PCI_DEVICE_ID_DIGIUM_HFC4S) { in setup_pci()
4330 test_and_set_bit(HFC_CHIP_B410P, &hc->chip); in setup_pci()
4331 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in setup_pci()
4332 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in setup_pci()
4333 hc->slots = 32; in setup_pci()
4336 if (hc->pci_dev->irq <= 0) { in setup_pci()
4337 printk(KERN_WARNING "HFC-multi: No IRQ for PCI card found.\n"); in setup_pci()
4338 return -EIO; in setup_pci()
4340 if (pci_enable_device(hc->pci_dev)) { in setup_pci()
4341 printk(KERN_WARNING "HFC-multi: Error enabling PCI card.\n"); in setup_pci()
4342 return -EIO; in setup_pci()
4344 hc->leds = m->leds; in setup_pci()
4345 hc->ledstate = 0xAFFEAFFE; in setup_pci()
4346 hc->opticalsupport = m->opticalsupport; in setup_pci()
4348 hc->pci_iobase = 0; in setup_pci()
4349 hc->pci_membase = NULL; in setup_pci()
4350 hc->plx_membase = NULL; in setup_pci()
4353 if (m->io_mode) /* use mode from card config */ in setup_pci()
4354 hc->io_mode = m->io_mode; in setup_pci()
4355 switch (hc->io_mode) { in setup_pci()
4357 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip); in setup_pci()
4358 hc->slots = 128; /* required */ in setup_pci()
4359 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4360 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4361 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4362 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4363 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4364 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4365 hc->plx_origmembase = hc->pci_dev->resource[0].start; in setup_pci()
4368 if (!hc->plx_origmembase) { in setup_pci()
4370 "HFC-multi: No IO-Memory for PCI PLX bridge found\n"); in setup_pci()
4371 pci_disable_device(hc->pci_dev); in setup_pci()
4372 return -EIO; in setup_pci()
4375 hc->plx_membase = ioremap(hc->plx_origmembase, 0x80); in setup_pci()
4376 if (!hc->plx_membase) { in setup_pci()
4378 "HFC-multi: failed to remap plx address space. " in setup_pci()
4380 pci_disable_device(hc->pci_dev); in setup_pci()
4381 return -EIO; in setup_pci()
4384 "HFC-multi: plx_membase:%#lx plx_origmembase:%#lx\n", in setup_pci()
4385 (u_long)hc->plx_membase, hc->plx_origmembase); in setup_pci()
4387 hc->pci_origmembase = hc->pci_dev->resource[2].start; in setup_pci()
4389 if (!hc->pci_origmembase) { in setup_pci()
4391 "HFC-multi: No IO-Memory for PCI card found\n"); in setup_pci()
4392 pci_disable_device(hc->pci_dev); in setup_pci()
4393 return -EIO; in setup_pci()
4396 hc->pci_membase = ioremap(hc->pci_origmembase, 0x400); in setup_pci()
4397 if (!hc->pci_membase) { in setup_pci()
4398 printk(KERN_WARNING "HFC-multi: failed to remap io " in setup_pci()
4400 pci_disable_device(hc->pci_dev); in setup_pci()
4401 return -EIO; in setup_pci()
4406 "leds-type %d\n", in setup_pci()
4407 hc->id, (u_long)hc->pci_membase, hc->pci_origmembase, in setup_pci()
4408 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4409 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4412 hc->HFC_outb = HFC_outb_pcimem; in setup_pci()
4413 hc->HFC_inb = HFC_inb_pcimem; in setup_pci()
4414 hc->HFC_inw = HFC_inw_pcimem; in setup_pci()
4415 hc->HFC_wait = HFC_wait_pcimem; in setup_pci()
4416 hc->read_fifo = read_fifo_pcimem; in setup_pci()
4417 hc->write_fifo = write_fifo_pcimem; in setup_pci()
4418 hc->pci_origmembase = hc->pci_dev->resource[1].start; in setup_pci()
4419 if (!hc->pci_origmembase) { in setup_pci()
4421 "HFC-multi: No IO-Memory for PCI card found\n"); in setup_pci()
4422 pci_disable_device(hc->pci_dev); in setup_pci()
4423 return -EIO; in setup_pci()
4426 hc->pci_membase = ioremap(hc->pci_origmembase, 256); in setup_pci()
4427 if (!hc->pci_membase) { in setup_pci()
4429 "HFC-multi: failed to remap io address space. " in setup_pci()
4431 pci_disable_device(hc->pci_dev); in setup_pci()
4432 return -EIO; in setup_pci()
4435 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, in setup_pci()
4436 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4437 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); in setup_pci()
4440 hc->HFC_outb = HFC_outb_regio; in setup_pci()
4441 hc->HFC_inb = HFC_inb_regio; in setup_pci()
4442 hc->HFC_inw = HFC_inw_regio; in setup_pci()
4443 hc->HFC_wait = HFC_wait_regio; in setup_pci()
4444 hc->read_fifo = read_fifo_regio; in setup_pci()
4445 hc->write_fifo = write_fifo_regio; in setup_pci()
4446 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; in setup_pci()
4447 if (!hc->pci_iobase) { in setup_pci()
4449 "HFC-multi: No IO for PCI card found\n"); in setup_pci()
4450 pci_disable_device(hc->pci_dev); in setup_pci()
4451 return -EIO; in setup_pci()
4454 if (!request_region(hc->pci_iobase, 8, "hfcmulti")) { in setup_pci()
4455 printk(KERN_WARNING "HFC-multi: failed to request " in setup_pci()
4457 hc->pci_iobase); in setup_pci()
4458 pci_disable_device(hc->pci_dev); in setup_pci()
4459 return -EIO; in setup_pci()
4463 "%s %s: defined at IOBASE %#x IRQ %d HZ %d leds-type %d\n", in setup_pci()
4464 m->vendor_name, m->card_name, (u_int) hc->pci_iobase, in setup_pci()
4465 hc->pci_dev->irq, HZ, hc->leds); in setup_pci()
4466 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_REGIO); in setup_pci()
4469 printk(KERN_WARNING "HFC-multi: Invalid IO mode.\n"); in setup_pci()
4470 pci_disable_device(hc->pci_dev); in setup_pci()
4471 return -EIO; in setup_pci()
4474 pci_set_drvdata(hc->pci_dev, hc); in setup_pci()
4493 ci = dch->slot; in release_port()
4494 pt = hc->chan[ci].port; in release_port()
4500 if (pt >= hc->ports) { in release_port()
4510 if (dch->dev.D.protocol == ISDN_P_TE_S0) in release_port()
4511 l1_event(dch->l1, CLOSE_CHANNEL); in release_port()
4513 hc->chan[ci].dch = NULL; in release_port()
4515 if (hc->created[pt]) { in release_port()
4516 hc->created[pt] = 0; in release_port()
4517 mISDN_unregister_device(&dch->dev); in release_port()
4520 spin_lock_irqsave(&hc->lock, flags); in release_port()
4522 if (dch->timer.function) { in release_port()
4523 del_timer(&dch->timer); in release_port()
4524 dch->timer.function = NULL; in release_port()
4527 if (hc->ctype == HFC_TYPE_E1) { /* E1 */ in release_port()
4529 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4530 hc->syncronized = 0; in release_port()
4535 if (!((1 << i) & hc->bmask[pt])) /* skip unused chan */ in release_port()
4537 if (hc->chan[i].bch) { in release_port()
4541 __func__, hc->chan[i].port + 1, i); in release_port()
4542 pb = hc->chan[i].bch; in release_port()
4543 hc->chan[i].bch = NULL; in release_port()
4544 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4547 kfree(hc->chan[i].coeff); in release_port()
4548 spin_lock_irqsave(&hc->lock, flags); in release_port()
4553 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { in release_port()
4554 hc->syncronized &= in release_port()
4555 ~(1 << hc->chan[ci].port); in release_port()
4559 if (hc->chan[ci - 2].bch) { in release_port()
4563 __func__, hc->chan[ci - 2].port + 1, in release_port()
4564 ci - 2); in release_port()
4565 pb = hc->chan[ci - 2].bch; in release_port()
4566 hc->chan[ci - 2].bch = NULL; in release_port()
4567 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4570 kfree(hc->chan[ci - 2].coeff); in release_port()
4571 spin_lock_irqsave(&hc->lock, flags); in release_port()
4573 if (hc->chan[ci - 1].bch) { in release_port()
4577 __func__, hc->chan[ci - 1].port + 1, in release_port()
4578 ci - 1); in release_port()
4579 pb = hc->chan[ci - 1].bch; in release_port()
4580 hc->chan[ci - 1].bch = NULL; in release_port()
4581 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4584 kfree(hc->chan[ci - 1].coeff); in release_port()
4585 spin_lock_irqsave(&hc->lock, flags); in release_port()
4589 spin_unlock_irqrestore(&hc->lock, flags); in release_port()
4609 __func__, hc->id); in release_card()
4612 if (hc->iclock) in release_card()
4613 mISDN_unregister_clock(hc->iclock); in release_card()
4616 spin_lock_irqsave(&hc->lock, flags); in release_card()
4618 spin_unlock_irqrestore(&hc->lock, flags); in release_card()
4620 if (hc->irq) { in release_card()
4623 __func__, hc->irq, hc); in release_card()
4624 free_irq(hc->irq, hc); in release_card()
4625 hc->irq = 0; in release_card()
4629 /* disable D-channels & B-channels */ in release_card()
4634 if (hc->chan[ch].dch) in release_card()
4635 release_port(hc, hc->chan[ch].dch); in release_card()
4639 if (hc->leds) in release_card()
4648 list_del(&hc->list); in release_card()
4665 if (!m->opticalsupport) { in init_e1_port_hw()
4678 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4688 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4697 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4707 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4717 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4719 /* set CRC-4 Mode */ in init_e1_port_hw()
4726 &hc->chan[hc->dnum[0]].cfg); in init_e1_port_hw()
4739 test_and_set_bit(HFC_CHIP_E1CLOCK_GET, &hc->chip); in init_e1_port_hw()
4746 test_and_set_bit(HFC_CHIP_E1CLOCK_PUT, &hc->chip); in init_e1_port_hw()
4754 test_and_set_bit(HFC_CHIP_RX_SYNC, &hc->chip); in init_e1_port_hw()
4758 hc->chan[hc->dnum[0]].jitter = (port[Port_cnt]>>12) & 0x3; in init_e1_port_hw()
4763 __func__, hc->chan[hc->dnum[0]].jitter, in init_e1_port_hw()
4766 hc->chan[hc->dnum[0]].jitter = 2; /* default */ in init_e1_port_hw()
4780 return -ENOMEM; in init_e1_port()
4781 dch->debug = debug; in init_e1_port()
4783 dch->hw = hc; in init_e1_port()
4784 dch->dev.Dprotocols = (1 << ISDN_P_TE_E1) | (1 << ISDN_P_NT_E1); in init_e1_port()
4785 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in init_e1_port()
4787 dch->dev.D.send = handle_dmsg; in init_e1_port()
4788 dch->dev.D.ctrl = hfcm_dctrl; in init_e1_port()
4789 dch->slot = hc->dnum[pt]; in init_e1_port()
4790 hc->chan[hc->dnum[pt]].dch = dch; in init_e1_port()
4791 hc->chan[hc->dnum[pt]].port = pt; in init_e1_port()
4792 hc->chan[hc->dnum[pt]].nt_timer = -1; in init_e1_port()
4794 if (!((1 << ch) & hc->bmask[pt])) /* skip unused channel */ in init_e1_port()
4800 ret = -ENOMEM; in init_e1_port()
4803 hc->chan[ch].coeff = kzalloc(512, GFP_KERNEL); in init_e1_port()
4804 if (!hc->chan[ch].coeff) { in init_e1_port()
4807 ret = -ENOMEM; in init_e1_port()
4811 bch->nr = ch; in init_e1_port()
4812 bch->slot = ch; in init_e1_port()
4813 bch->debug = debug; in init_e1_port()
4815 bch->hw = hc; in init_e1_port()
4816 bch->ch.send = handle_bmsg; in init_e1_port()
4817 bch->ch.ctrl = hfcm_bctrl; in init_e1_port()
4818 bch->ch.nr = ch; in init_e1_port()
4819 list_add(&bch->ch.list, &dch->dev.bchannels); in init_e1_port()
4820 hc->chan[ch].bch = bch; in init_e1_port()
4821 hc->chan[ch].port = pt; in init_e1_port()
4822 set_channelmap(bch->nr, dch->dev.channelmap); in init_e1_port()
4825 dch->dev.nrbchan = bcount; in init_e1_port()
4828 if (hc->ports > 1) in init_e1_port()
4829 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d-%d", in init_e1_port()
4832 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-e1.%d", HFC_cnt + 1); in init_e1_port()
4833 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_e1_port()
4836 hc->created[pt] = 1; in init_e1_port()
4853 return -ENOMEM; in init_multi_port()
4854 dch->debug = debug; in init_multi_port()
4856 dch->hw = hc; in init_multi_port()
4857 dch->dev.Dprotocols = (1 << ISDN_P_TE_S0) | (1 << ISDN_P_NT_S0); in init_multi_port()
4858 dch->dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) | in init_multi_port()
4860 dch->dev.D.send = handle_dmsg; in init_multi_port()
4861 dch->dev.D.ctrl = hfcm_dctrl; in init_multi_port()
4862 dch->dev.nrbchan = 2; in init_multi_port()
4864 dch->slot = i + 2; in init_multi_port()
4865 hc->chan[i + 2].dch = dch; in init_multi_port()
4866 hc->chan[i + 2].port = pt; in init_multi_port()
4867 hc->chan[i + 2].nt_timer = -1; in init_multi_port()
4868 for (ch = 0; ch < dch->dev.nrbchan; ch++) { in init_multi_port()
4873 ret = -ENOMEM; in init_multi_port()
4876 hc->chan[i + ch].coeff = kzalloc(512, GFP_KERNEL); in init_multi_port()
4877 if (!hc->chan[i + ch].coeff) { in init_multi_port()
4880 ret = -ENOMEM; in init_multi_port()
4884 bch->nr = ch + 1; in init_multi_port()
4885 bch->slot = i + ch; in init_multi_port()
4886 bch->debug = debug; in init_multi_port()
4888 bch->hw = hc; in init_multi_port()
4889 bch->ch.send = handle_bmsg; in init_multi_port()
4890 bch->ch.ctrl = hfcm_bctrl; in init_multi_port()
4891 bch->ch.nr = ch + 1; in init_multi_port()
4892 list_add(&bch->ch.list, &dch->dev.bchannels); in init_multi_port()
4893 hc->chan[i + ch].bch = bch; in init_multi_port()
4894 hc->chan[i + ch].port = pt; in init_multi_port()
4895 set_channelmap(bch->nr, dch->dev.channelmap); in init_multi_port()
4904 if (dch->dev.D.protocol != ISDN_P_TE_S0) { in init_multi_port()
4907 " possible with TE-mode\n", in init_multi_port()
4909 ret = -EINVAL; in init_multi_port()
4912 if (hc->masterclk >= 0) { in init_multi_port()
4916 pt + 1, HFC_cnt + 1, hc->masterclk + 1); in init_multi_port()
4917 ret = -EINVAL; in init_multi_port()
4920 hc->masterclk = pt; in init_multi_port()
4930 &hc->chan[i + 2].cfg); in init_multi_port()
4932 /* disable E-channel */ in init_multi_port()
4936 "%s: PROTOCOL disable E-channel: " in init_multi_port()
4940 &hc->chan[i + 2].cfg); in init_multi_port()
4942 if (hc->ctype == HFC_TYPE_XHFC) { in init_multi_port()
4943 snprintf(name, MISDN_MAX_IDLEN - 1, "xhfc.%d-%d", in init_multi_port()
4945 ret = mISDN_register_device(&dch->dev, NULL, name); in init_multi_port()
4947 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d", in init_multi_port()
4948 hc->ctype, HFC_cnt + 1, pt + 1); in init_multi_port()
4949 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); in init_multi_port()
4953 hc->created[pt] = 1; in init_multi_port()
4975 return -EINVAL; in hfcmulti_init()
4977 if ((type[HFC_cnt] & 0xff) && (type[HFC_cnt] & 0xff) != m->type) { in hfcmulti_init()
4978 printk(KERN_WARNING "HFC-MULTI: Card '%s:%s' type %d found but " in hfcmulti_init()
4980 m->vendor_name, m->card_name, m->type, HFC_cnt, in hfcmulti_init()
4982 printk(KERN_WARNING "HFC-MULTI: Load module without parameters " in hfcmulti_init()
4984 return -EINVAL; in hfcmulti_init()
4988 __func__, m->vendor_name, m->card_name, m->type, in hfcmulti_init()
4994 printk(KERN_ERR "No kmem for HFC-Multi card\n"); in hfcmulti_init()
4995 return -ENOMEM; in hfcmulti_init()
4997 spin_lock_init(&hc->lock); in hfcmulti_init()
4998 hc->mtyp = m; in hfcmulti_init()
4999 hc->ctype = m->type; in hfcmulti_init()
5000 hc->ports = m->ports; in hfcmulti_init()
5001 hc->id = HFC_cnt; in hfcmulti_init()
5002 hc->pcm = pcm[HFC_cnt]; in hfcmulti_init()
5003 hc->io_mode = iomode[HFC_cnt]; in hfcmulti_init()
5004 if (hc->ctype == HFC_TYPE_E1 && dmask[E1_cnt]) { in hfcmulti_init()
5011 hc->dnum[pt] = ch; in hfcmulti_init()
5012 hc->bmask[pt] = bmask[bmask_cnt++]; in hfcmulti_init()
5013 if ((maskcheck & hc->bmask[pt]) in hfcmulti_init()
5014 || (dmask[E1_cnt] & hc->bmask[pt])) { in hfcmulti_init()
5016 "HFC-E1 #%d has overlapping B-channels on fragment #%d\n", in hfcmulti_init()
5019 return -EINVAL; in hfcmulti_init()
5021 maskcheck |= hc->bmask[pt]; in hfcmulti_init()
5023 "HFC-E1 #%d uses D-channel on slot %d and a B-channel map of 0x%08x\n", in hfcmulti_init()
5024 E1_cnt + 1, ch, hc->bmask[pt]); in hfcmulti_init()
5027 hc->ports = pt; in hfcmulti_init()
5029 if (hc->ctype == HFC_TYPE_E1 && !dmask[E1_cnt]) { in hfcmulti_init()
5031 hc->dnum[0] = 16; in hfcmulti_init()
5032 hc->bmask[0] = 0xfffefffe; in hfcmulti_init()
5033 hc->ports = 1; in hfcmulti_init()
5037 hc->masterclk = -1; in hfcmulti_init()
5039 test_and_set_bit(HFC_CHIP_ULAW, &hc->chip); in hfcmulti_init()
5040 hc->silence = 0xff; /* ulaw silence */ in hfcmulti_init()
5042 hc->silence = 0x2a; /* alaw silence */ in hfcmulti_init()
5043 if ((poll >> 1) > sizeof(hc->silence_data)) { in hfcmulti_init()
5047 return -EINVAL; in hfcmulti_init()
5050 hc->silence_data[i] = hc->silence; in hfcmulti_init()
5052 if (hc->ctype != HFC_TYPE_XHFC) { in hfcmulti_init()
5054 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip); in hfcmulti_init()
5055 test_and_set_bit(HFC_CHIP_CONF, &hc->chip); in hfcmulti_init()
5059 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5061 test_and_set_bit(HFC_CHIP_PCM_MASTER, &hc->chip); in hfcmulti_init()
5062 test_and_clear_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); in hfcmulti_init()
5065 test_and_set_bit(HFC_CHIP_EXRAM_128, &hc->chip); in hfcmulti_init()
5067 test_and_set_bit(HFC_CHIP_EXRAM_512, &hc->chip); in hfcmulti_init()
5068 hc->slots = 32; in hfcmulti_init()
5070 hc->slots = 64; in hfcmulti_init()
5072 hc->slots = 128; in hfcmulti_init()
5074 test_and_set_bit(HFC_CHIP_WATCHDOG, &hc->chip); in hfcmulti_init()
5075 hc->wdcount = 0; in hfcmulti_init()
5076 hc->wdbyte = V_GPIO_OUT2; in hfcmulti_init()
5081 /* setup pci, hc->slots may change due to PLXSD */ in hfcmulti_init()
5089 ret_err = -EIO; in hfcmulti_init()
5099 hc->HFC_outb_nodebug = hc->HFC_outb; in hfcmulti_init()
5100 hc->HFC_inb_nodebug = hc->HFC_inb; in hfcmulti_init()
5101 hc->HFC_inw_nodebug = hc->HFC_inw; in hfcmulti_init()
5102 hc->HFC_wait_nodebug = hc->HFC_wait; in hfcmulti_init()
5104 hc->HFC_outb = HFC_outb_debug; in hfcmulti_init()
5105 hc->HFC_inb = HFC_inb_debug; in hfcmulti_init()
5106 hc->HFC_inw = HFC_inw_debug; in hfcmulti_init()
5107 hc->HFC_wait = HFC_wait_debug; in hfcmulti_init()
5110 for (pt = 0; pt < hc->ports; pt++) { in hfcmulti_init()
5114 ret_err = -EINVAL; in hfcmulti_init()
5117 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5123 "%s: Registering D-channel, card(%d) port(%d) " in hfcmulti_init()
5129 pt--; in hfcmulti_init()
5130 if (hc->ctype == HFC_TYPE_E1) in hfcmulti_init()
5132 hc->chan[hc->dnum[pt]].dch); in hfcmulti_init()
5135 hc->chan[(pt << 2) + 2].dch); in hfcmulti_init()
5139 if (hc->ctype != HFC_TYPE_E1) in hfcmulti_init()
5142 if (hc->ctype == HFC_TYPE_E1) { in hfcmulti_init()
5148 switch (m->dip_type) { in hfcmulti_init()
5162 if (test_bit(HFC_CHIP_B410P, &hc->chip)) in hfcmulti_init()
5166 m->vendor_name, m->card_name, dips, pmj); in hfcmulti_init()
5175 outw(0x4000, hc->pci_iobase + 4); in hfcmulti_init()
5180 dips = inb(hc->pci_iobase); in hfcmulti_init()
5181 dips = inb(hc->pci_iobase); in hfcmulti_init()
5182 dips = inb(hc->pci_iobase); in hfcmulti_init()
5183 dips = ~inb(hc->pci_iobase) & 0x3F; in hfcmulti_init()
5184 outw(0x0, hc->pci_iobase + 4); in hfcmulti_init()
5188 m->vendor_name, m->card_name, dips); in hfcmulti_init()
5197 m->vendor_name, m->card_name, dips); in hfcmulti_init()
5203 list_add_tail(&hc->list, &HFClist); in hfcmulti_init()
5208 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc); in hfcmulti_init()
5211 hc->irq = (m->irq) ? : hc->pci_dev->irq; in hfcmulti_init()
5220 spin_lock_irqsave(&hc->lock, flags); in hfcmulti_init()
5222 spin_unlock_irqrestore(&hc->lock, flags); in hfcmulti_init()
5241 pdev->vendor, pdev->device, in hfc_remove_pci()
5242 pdev->subsystem_vendor, pdev->subsystem_device); in hfc_remove_pci()
5262 /*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0, 0},
5263 /*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5264 /*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5265 /*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5266 /*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0, 0},
5267 /*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0, 0},
5268 /*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5269 /*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0, 0},
5270 /*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO, 0},
5271 /*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0, 0},
5272 /*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0, 0},
5273 /*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0, 0},
5275 /*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0, 0},
5276 /*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S,
5278 /*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0, 0},
5279 /*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0, 0},
5281 /*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0, 0},
5282 /*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5283 /*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5285 /*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5286 /*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0, 0},
5287 /*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5288 /*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5290 /*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0, 0},
5291 /*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0, 0},
5292 /*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0, 0},
5294 /*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0,
5296 /*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0,
5298 /*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0, 0},
5299 /*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0, 0},
5300 /*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0, 0},
5301 /*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0,
5303 /*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0},
5304 /*33*/ {VENDOR_BN, "HFC-2S Beronet Card PCIe", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5305 /*34*/ {VENDOR_BN, "HFC-4S Beronet Card PCIe", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5312 /* Cards with HFC-4S Chip */
5346 /* Cards with HFC-8S Chip */
5367 /* Cards with HFC-E1 Chip */
5404 struct hm_map *m = (struct hm_map *)ent->driver_data; in hfcmulti_probe()
5407 if (m == NULL && ent->vendor == PCI_VENDOR_ID_CCD && ( in hfcmulti_probe()
5408 ent->device == PCI_DEVICE_ID_CCD_HFC4S || in hfcmulti_probe()
5409 ent->device == PCI_DEVICE_ID_CCD_HFC8S || in hfcmulti_probe()
5410 ent->device == PCI_DEVICE_ID_CCD_HFCE1)) { in hfcmulti_probe()
5413 "subvendor:%04x subdevice:%04x)\n", pdev->vendor, in hfcmulti_probe()
5414 pdev->device, pdev->subsystem_vendor, in hfcmulti_probe()
5415 pdev->subsystem_device); in hfcmulti_probe()
5418 return -ENODEV; in hfcmulti_probe()
5453 printk(KERN_INFO "mISDN: HFC-multi driver %s\n", HFC_MULTI_VERSION); in HFCmulti_init()
5488 err = -EINVAL; in HFCmulti_init()