drivers/irqchip/irq-riscv-intc.c

1 // SPDX-License-Identifier: GPL-2.0
4  * Copyright (C) 2017-2018 SiFive
8 #define pr_fmt(fmt) "riscv-intc: " fmt
25 	unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;  in riscv_intc_irq()
34  * On RISC-V systems local interrupts are masked or unmasked by writing
42 	csr_clear(CSR_IE, BIT(d->hwirq));  in riscv_intc_irq_mask()
47 	csr_set(CSR_IE, BIT(d->hwirq));  in riscv_intc_irq_unmask()
53 	 * The RISC-V INTC driver uses handle_percpu_devid_irq() flow  in riscv_intc_irq_eoi()
54 	 * for the per-HART local interrupts and child irqchip drivers  in riscv_intc_irq_eoi()
56 	 * chained handlers for the per-HART local interrupts.  in riscv_intc_irq_eoi()
60 	 * will do unnecessary mask/unmask of per-HART local interrupts  in riscv_intc_irq_eoi()
62 	 * an empty irq_eoi() callback for RISC-V INTC irqchip.  in riscv_intc_irq_eoi()
67 	.name = "RISC-V INTC",
77 	irq_domain_set_info(d, irq, hwirq, &riscv_intc_chip, d->host_data,  in riscv_intc_domain_map()
113 	return intc_domain->fwnode;  in riscv_intc_hwnode()
124 		return -ENXIO;  in riscv_intc_init_common()
162 		 * direct-mode) so we should mark an INTC node as initialized  in riscv_intc_init()
172 IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init);
190 	if (riscv_hartid_to_cpuid(rintc->hart_id) != smp_processor_id())  in riscv_intc_acpi_init()
193 	fn = irq_domain_alloc_named_fwnode("RISCV-INTC");  in riscv_intc_acpi_init()
196 		return -ENOMEM;  in riscv_intc_acpi_init()