Lines Matching +full:imx +full:- +full:intmux
1 // SPDX-License-Identifier: GPL-2.0
4 /* INTMUX Block Diagram
7 * interrupt source # 0 +---->| |
9 * interrupt source # 1 +++-->| |
10 * ... | | | channel # 0 |--------->interrupt out # 0
13 * interrupt source # X-1 +++-->|________________|
17 * +---->| |
19 * | +-->| |
20 * | | | | channel # 1 |--------->interrupt out # 1
30 * +---->| |
32 * +-->| |
33 * | | channel # N |--------->interrupt out # N
42 * The INTMUX interrupt multiplexer has 8 channels, each channel receives 32
81 struct intmux_irqchip_data *irqchip_data = d->chip_data; in imx_intmux_irq_mask()
82 int idx = irqchip_data->chanidx; in imx_intmux_irq_mask()
89 raw_spin_lock_irqsave(&data->lock, flags); in imx_intmux_irq_mask()
90 reg = data->regs + CHANIER(idx); in imx_intmux_irq_mask()
93 val &= ~BIT(d->hwirq); in imx_intmux_irq_mask()
95 raw_spin_unlock_irqrestore(&data->lock, flags); in imx_intmux_irq_mask()
100 struct intmux_irqchip_data *irqchip_data = d->chip_data; in imx_intmux_irq_unmask()
101 int idx = irqchip_data->chanidx; in imx_intmux_irq_unmask()
108 raw_spin_lock_irqsave(&data->lock, flags); in imx_intmux_irq_unmask()
109 reg = data->regs + CHANIER(idx); in imx_intmux_irq_unmask()
112 val |= BIT(d->hwirq); in imx_intmux_irq_unmask()
114 raw_spin_unlock_irqrestore(&data->lock, flags); in imx_intmux_irq_unmask()
118 .name = "intmux",
126 struct intmux_irqchip_data *data = h->host_data; in imx_intmux_irq_map()
138 struct intmux_irqchip_data *irqchip_data = d->host_data; in imx_intmux_irq_xlate()
139 int idx = irqchip_data->chanidx; in imx_intmux_irq_xlate()
149 return -EINVAL; in imx_intmux_irq_xlate()
151 if (WARN_ON(intspec[1] >= data->channum)) in imx_intmux_irq_xlate()
152 return -EINVAL; in imx_intmux_irq_xlate()
163 struct intmux_irqchip_data *irqchip_data = d->host_data; in imx_intmux_irq_select()
166 if (fwspec->fwnode != d->fwnode) in imx_intmux_irq_select()
169 return irqchip_data->chanidx == fwspec->param[1]; in imx_intmux_irq_select()
181 int idx = irqchip_data->chanidx; in imx_intmux_irq_handler()
190 irqstat = readl_relaxed(data->regs + CHANIPR(idx)); in imx_intmux_irq_handler()
193 generic_handle_domain_irq(irqchip_data->domain, pos); in imx_intmux_irq_handler()
200 struct device_node *np = pdev->dev.of_node; in imx_intmux_probe()
207 if (channum == -EPROBE_DEFER) { in imx_intmux_probe()
208 return -EPROBE_DEFER; in imx_intmux_probe()
210 dev_err(&pdev->dev, "supports up to %d multiplex channels\n", in imx_intmux_probe()
212 return -EINVAL; in imx_intmux_probe()
215 data = devm_kzalloc(&pdev->dev, struct_size(data, irqchip_data, channum), GFP_KERNEL); in imx_intmux_probe()
217 return -ENOMEM; in imx_intmux_probe()
219 data->regs = devm_platform_ioremap_resource(pdev, 0); in imx_intmux_probe()
220 if (IS_ERR(data->regs)) { in imx_intmux_probe()
221 dev_err(&pdev->dev, "failed to initialize reg\n"); in imx_intmux_probe()
222 return PTR_ERR(data->regs); in imx_intmux_probe()
225 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_intmux_probe()
226 if (IS_ERR(data->ipg_clk)) in imx_intmux_probe()
227 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_intmux_probe()
230 data->channum = channum; in imx_intmux_probe()
231 raw_spin_lock_init(&data->lock); in imx_intmux_probe()
233 pm_runtime_get_noresume(&pdev->dev); in imx_intmux_probe()
234 pm_runtime_set_active(&pdev->dev); in imx_intmux_probe()
235 pm_runtime_enable(&pdev->dev); in imx_intmux_probe()
237 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_probe()
239 dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret); in imx_intmux_probe()
244 data->irqchip_data[i].chanidx = i; in imx_intmux_probe()
246 data->irqchip_data[i].irq = irq_of_parse_and_map(np, i); in imx_intmux_probe()
247 if (data->irqchip_data[i].irq <= 0) { in imx_intmux_probe()
248 ret = -EINVAL; in imx_intmux_probe()
249 dev_err(&pdev->dev, "failed to get irq\n"); in imx_intmux_probe()
254 &data->irqchip_data[i]); in imx_intmux_probe()
256 ret = -ENOMEM; in imx_intmux_probe()
257 dev_err(&pdev->dev, "failed to create IRQ domain\n"); in imx_intmux_probe()
260 data->irqchip_data[i].domain = domain; in imx_intmux_probe()
261 irq_domain_set_pm_device(domain, &pdev->dev); in imx_intmux_probe()
264 writel_relaxed(0, data->regs + CHANIER(i)); in imx_intmux_probe()
266 irq_set_chained_handler_and_data(data->irqchip_data[i].irq, in imx_intmux_probe()
268 &data->irqchip_data[i]); in imx_intmux_probe()
277 pm_runtime_put(&pdev->dev); in imx_intmux_probe()
281 clk_disable_unprepare(data->ipg_clk); in imx_intmux_probe()
290 for (i = 0; i < data->channum; i++) { in imx_intmux_remove()
292 writel_relaxed(0, data->regs + CHANIER(i)); in imx_intmux_remove()
294 irq_set_chained_handler_and_data(data->irqchip_data[i].irq, in imx_intmux_remove()
297 irq_domain_remove(data->irqchip_data[i].domain); in imx_intmux_remove()
300 pm_runtime_disable(&pdev->dev); in imx_intmux_remove()
312 for (i = 0; i < data->channum; i++) { in imx_intmux_runtime_suspend()
313 irqchip_data = &data->irqchip_data[i]; in imx_intmux_runtime_suspend()
314 irqchip_data->saved_reg = readl_relaxed(data->regs + CHANIER(i)); in imx_intmux_runtime_suspend()
317 clk_disable_unprepare(data->ipg_clk); in imx_intmux_runtime_suspend()
328 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_runtime_resume()
334 for (i = 0; i < data->channum; i++) { in imx_intmux_runtime_resume()
335 irqchip_data = &data->irqchip_data[i]; in imx_intmux_runtime_resume()
336 writel_relaxed(irqchip_data->saved_reg, data->regs + CHANIER(i)); in imx_intmux_runtime_resume()
351 { .compatible = "fsl,imx-intmux", },
357 .name = "imx-intmux",