Lines Matching full:its
76 * value of BASER register configuration and ITS page size.
88 * The ITS structure - contains most of the infrastructure, with the
122 #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) argument
123 #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) argument
124 #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) argument
156 * The ITS view of a device - belongs to an ITS, owns an interrupt
157 * translation table, and a list of interrupts. If it some of its
163 struct its_node *its; member
205 static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) in require_its_list_vmovp() argument
207 return (gic_rdists->has_rvpeid || vm->vlpi_count[its->list_nr]); in require_its_list_vmovp()
217 struct its_node *its; in get_its_list() local
220 list_for_each_entry(its, &its_nodes, entry) { in get_its_list()
221 if (!is_v4(its)) in get_its_list()
224 if (require_its_list_vmovp(vm, its)) in get_its_list()
225 __set_bit(its->list_nr, &its_list); in get_its_list()
240 struct its_node *its = its_dev->its; in dev_event_to_col() local
242 return its->collections + its_dev->event_map.col_map[event]; in dev_event_to_col()
329 static struct its_vpe *valid_vpe(struct its_node *its, struct its_vpe *vpe) in valid_vpe() argument
331 if (valid_col(its->collections + vpe->col_idx)) in valid_vpe()
338 * ITS command descriptors - parameters to be encoded in a command
437 * The ITS command block, which is what the ITS actually parses.
615 static struct its_collection *its_build_mapd_cmd(struct its_node *its, in its_build_mapd_cmd() argument
636 static struct its_collection *its_build_mapc_cmd(struct its_node *its, in its_build_mapc_cmd() argument
650 static struct its_collection *its_build_mapti_cmd(struct its_node *its, in its_build_mapti_cmd() argument
670 static struct its_collection *its_build_movi_cmd(struct its_node *its, in its_build_movi_cmd() argument
689 static struct its_collection *its_build_discard_cmd(struct its_node *its, in its_build_discard_cmd() argument
707 static struct its_collection *its_build_inv_cmd(struct its_node *its, in its_build_inv_cmd() argument
725 static struct its_collection *its_build_int_cmd(struct its_node *its, in its_build_int_cmd() argument
743 static struct its_collection *its_build_clear_cmd(struct its_node *its, in its_build_clear_cmd() argument
761 static struct its_collection *its_build_invall_cmd(struct its_node *its, in its_build_invall_cmd() argument
773 static struct its_vpe *its_build_vinvall_cmd(struct its_node *its, in its_build_vinvall_cmd() argument
782 return valid_vpe(its, desc->its_vinvall_cmd.vpe); in its_build_vinvall_cmd()
785 static struct its_vpe *its_build_vmapp_cmd(struct its_node *its, in its_build_vmapp_cmd() argument
798 if (is_v4_1(its)) { in its_build_vmapp_cmd()
807 target = desc->its_vmapp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmapp_cmd()
813 if (!is_v4_1(its)) in its_build_vmapp_cmd()
835 return valid_vpe(its, desc->its_vmapp_cmd.vpe); in its_build_vmapp_cmd()
838 static struct its_vpe *its_build_vmapti_cmd(struct its_node *its, in its_build_vmapti_cmd() argument
844 if (!is_v4_1(its) && desc->its_vmapti_cmd.db_enabled) in its_build_vmapti_cmd()
858 return valid_vpe(its, desc->its_vmapti_cmd.vpe); in its_build_vmapti_cmd()
861 static struct its_vpe *its_build_vmovi_cmd(struct its_node *its, in its_build_vmovi_cmd() argument
867 if (!is_v4_1(its) && desc->its_vmovi_cmd.db_enabled) in its_build_vmovi_cmd()
881 return valid_vpe(its, desc->its_vmovi_cmd.vpe); in its_build_vmovi_cmd()
884 static struct its_vpe *its_build_vmovp_cmd(struct its_node *its, in its_build_vmovp_cmd() argument
890 target = desc->its_vmovp_cmd.col->target_address + its->vlpi_redist_offset; in its_build_vmovp_cmd()
897 if (is_v4_1(its)) { in its_build_vmovp_cmd()
904 return valid_vpe(its, desc->its_vmovp_cmd.vpe); in its_build_vmovp_cmd()
907 static struct its_vpe *its_build_vinv_cmd(struct its_node *its, in its_build_vinv_cmd() argument
922 return valid_vpe(its, map->vpe); in its_build_vinv_cmd()
925 static struct its_vpe *its_build_vint_cmd(struct its_node *its, in its_build_vint_cmd() argument
940 return valid_vpe(its, map->vpe); in its_build_vint_cmd()
943 static struct its_vpe *its_build_vclear_cmd(struct its_node *its, in its_build_vclear_cmd() argument
958 return valid_vpe(its, map->vpe); in its_build_vclear_cmd()
961 static struct its_vpe *its_build_invdb_cmd(struct its_node *its, in its_build_invdb_cmd() argument
965 if (WARN_ON(!is_v4_1(its))) in its_build_invdb_cmd()
973 return valid_vpe(its, desc->its_invdb_cmd.vpe); in its_build_invdb_cmd()
976 static struct its_vpe *its_build_vsgi_cmd(struct its_node *its, in its_build_vsgi_cmd() argument
980 if (WARN_ON(!is_v4_1(its))) in its_build_vsgi_cmd()
993 return valid_vpe(its, desc->its_vsgi_cmd.vpe); in its_build_vsgi_cmd()
996 static u64 its_cmd_ptr_to_offset(struct its_node *its, in its_cmd_ptr_to_offset() argument
999 return (ptr - its->cmd_base) * sizeof(*ptr); in its_cmd_ptr_to_offset()
1002 static int its_queue_full(struct its_node *its) in its_queue_full() argument
1007 widx = its->cmd_write - its->cmd_base; in its_queue_full()
1008 ridx = readl_relaxed(its->base + GITS_CREADR) / sizeof(struct its_cmd_block); in its_queue_full()
1010 /* This is incredibly unlikely to happen, unless the ITS locks up. */ in its_queue_full()
1017 static struct its_cmd_block *its_allocate_entry(struct its_node *its) in its_allocate_entry() argument
1022 while (its_queue_full(its)) { in its_allocate_entry()
1025 pr_err_ratelimited("ITS queue not draining\n"); in its_allocate_entry()
1032 cmd = its->cmd_write++; in its_allocate_entry()
1035 if (its->cmd_write == (its->cmd_base + ITS_CMD_QUEUE_NR_ENTRIES)) in its_allocate_entry()
1036 its->cmd_write = its->cmd_base; in its_allocate_entry()
1047 static struct its_cmd_block *its_post_commands(struct its_node *its) in its_post_commands() argument
1049 u64 wr = its_cmd_ptr_to_offset(its, its->cmd_write); in its_post_commands()
1051 writel_relaxed(wr, its->base + GITS_CWRITER); in its_post_commands()
1053 return its->cmd_write; in its_post_commands()
1056 static void its_flush_cmd(struct its_node *its, struct its_cmd_block *cmd) in its_flush_cmd() argument
1060 * the ITS. in its_flush_cmd()
1062 if (its->flags & ITS_FLAGS_CMDQ_NEEDS_FLUSHING) in its_flush_cmd()
1068 static int its_wait_for_range_completion(struct its_node *its, in its_wait_for_range_completion() argument
1076 to_idx = its_cmd_ptr_to_offset(its, to); in its_wait_for_range_completion()
1085 rd_idx = readl_relaxed(its->base + GITS_CREADR); in its_wait_for_range_completion()
1101 pr_err_ratelimited("ITS queue timeout (%llu %llu)\n", in its_wait_for_range_completion()
1115 void name(struct its_node *its, \
1124 raw_spin_lock_irqsave(&its->lock, flags); \
1126 cmd = its_allocate_entry(its); \
1128 raw_spin_unlock_irqrestore(&its->lock, flags); \
1131 sync_obj = builder(its, cmd, desc); \
1132 its_flush_cmd(its, cmd); \
1135 sync_cmd = its_allocate_entry(its); \
1139 buildfn(its, sync_cmd, sync_obj); \
1140 its_flush_cmd(its, sync_cmd); \
1144 rd_idx = readl_relaxed(its->base + GITS_CREADR); \
1145 next_cmd = its_post_commands(its); \
1146 raw_spin_unlock_irqrestore(&its->lock, flags); \
1148 if (its_wait_for_range_completion(its, rd_idx, next_cmd)) \
1149 pr_err_ratelimited("ITS cmd %ps failed\n", builder); \
1152 static void its_build_sync_cmd(struct its_node *its, in its_build_sync_cmd() argument
1165 static void its_build_vsync_cmd(struct its_node *its, in BUILD_SINGLE_CMD_FUNC()
1185 its_send_single_command(dev->its, its_build_int_cmd, &desc); in BUILD_SINGLE_CMD_FUNC()
1195 its_send_single_command(dev->its, its_build_clear_cmd, &desc); in its_send_clear()
1205 its_send_single_command(dev->its, its_build_inv_cmd, &desc); in its_send_inv()
1215 its_send_single_command(dev->its, its_build_mapd_cmd, &desc); in its_send_mapd()
1218 static void its_send_mapc(struct its_node *its, struct its_collection *col, in its_send_mapc() argument
1226 its_send_single_command(its, its_build_mapc_cmd, &desc); in its_send_mapc()
1237 its_send_single_command(dev->its, its_build_mapti_cmd, &desc); in its_send_mapti()
1249 its_send_single_command(dev->its, its_build_movi_cmd, &desc); in its_send_movi()
1259 its_send_single_command(dev->its, its_build_discard_cmd, &desc); in its_send_discard()
1262 static void its_send_invall(struct its_node *its, struct its_collection *col) in its_send_invall() argument
1268 its_send_single_command(its, its_build_invall_cmd, &desc); in its_send_invall()
1282 its_send_single_vcommand(dev->its, its_build_vmapti_cmd, &desc); in its_send_vmapti()
1295 its_send_single_vcommand(dev->its, its_build_vmovi_cmd, &desc); in its_send_vmovi()
1298 static void its_send_vmapp(struct its_node *its, in its_send_vmapp() argument
1305 desc.its_vmapp_cmd.col = &its->collections[vpe->col_idx]; in its_send_vmapp()
1307 its_send_single_vcommand(its, its_build_vmapp_cmd, &desc); in its_send_vmapp()
1313 struct its_node *its; in its_send_vmovp() local
1320 its = list_first_entry(&its_nodes, struct its_node, entry); in its_send_vmovp()
1321 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1322 its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); in its_send_vmovp()
1340 list_for_each_entry(its, &its_nodes, entry) { in its_send_vmovp()
1341 if (!is_v4(its)) in its_send_vmovp()
1344 if (!require_its_list_vmovp(vpe->its_vm, its)) in its_send_vmovp()
1347 desc.its_vmovp_cmd.col = &its->collections[col_id]; in its_send_vmovp()
1348 its_send_single_vcommand(its, its_build_vmovp_cmd, &desc); in its_send_vmovp()
1354 static void its_send_vinvall(struct its_node *its, struct its_vpe *vpe) in its_send_vinvall() argument
1359 its_send_single_vcommand(its, its_build_vinvall_cmd, &desc); in its_send_vinvall()
1373 its_send_single_vcommand(dev->its, its_build_vinv_cmd, &desc); in its_send_vinv()
1387 its_send_single_vcommand(dev->its, its_build_vint_cmd, &desc); in its_send_vint()
1401 its_send_single_vcommand(dev->its, its_build_vclear_cmd, &desc); in its_send_vclear()
1404 static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) in its_send_invdb() argument
1409 its_send_single_vcommand(its, its_build_invdb_cmd, &desc); in its_send_invdb()
1481 WARN_ON(!is_v4_1(its_dev->its)); in direct_lpi_inv()
1499 (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) in lpi_update_config()
1517 if (is_v4_1(its_dev->its)) in its_vlpi_set_doorbell()
1530 * Ideally, we'd issue a VMAPTI to set the doorbell to its LPI in its_vlpi_set_doorbell()
1610 node = its_dev->its->numa_node; in its_select_cpu()
1632 * ITS placed next to two NUMA nodes. in its_select_cpu()
1642 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)) in its_select_cpu()
1660 if ((its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) && in its_select_cpu()
1698 target_col = &its_dev->its->collections[cpu]; in its_set_affinity()
1715 struct its_node *its = its_dev->its; in its_irq_get_msi_base() local
1717 return its->phys_base + GITS_TRANSLATER; in its_irq_get_msi_base()
1723 struct its_node *its; in its_irq_compose_msi_msg() local
1726 its = its_dev->its; in its_irq_compose_msi_msg()
1727 addr = its->get_msi_base(its_dev); in its_irq_compose_msi_msg()
1786 static void its_map_vm(struct its_node *its, struct its_vm *vm) in its_map_vm() argument
1799 vm->vlpi_count[its->list_nr]++; in its_map_vm()
1801 if (vm->vlpi_count[its->list_nr] == 1) { in its_map_vm()
1810 its_send_vmapp(its, vpe, true); in its_map_vm()
1811 its_send_vinvall(its, vpe); in its_map_vm()
1819 static void its_unmap_vm(struct its_node *its, struct its_vm *vm) in its_unmap_vm() argument
1823 /* Not using the ITS list? Everything is always mapped. */ in its_unmap_vm()
1829 if (!--vm->vlpi_count[its->list_nr]) { in its_unmap_vm()
1833 its_send_vmapp(its, vm->vpes[i], false); in its_unmap_vm()
1874 /* Ensure all the VPEs are mapped on this ITS */ in its_vlpi_map()
1875 its_map_vm(its_dev->its, info->map->vm); in its_vlpi_map()
1947 /* Potentially unmap the VM from this ITS */ in its_vlpi_unmap()
1948 its_unmap_vm(its_dev->its, its_dev->event_map.vm); in its_vlpi_unmap()
1985 /* Need a v4 ITS */ in its_irq_set_vcpu_affinity()
1986 if (!is_v4(its_dev->its)) in its_irq_set_vcpu_affinity()
2010 .name = "ITS",
2086 pr_debug("ITS: alloc %u:%u\n", *base, nr_lpis); in alloc_lpi_range()
2145 pr_info("ITS: Using hypervisor restricted LPI range [%u]\n", in its_lpi_init()
2154 pr_debug("ITS: Allocator initialized for %u LPIs\n", lpis); in its_lpi_init()
2306 static u64 its_read_baser(struct its_node *its, struct its_baser *baser) in its_read_baser() argument
2308 u32 idx = baser - its->tables; in its_read_baser()
2310 return gits_read_baser(its->base + GITS_BASER + (idx << 3)); in its_read_baser()
2313 static void its_write_baser(struct its_node *its, struct its_baser *baser, in its_write_baser() argument
2316 u32 idx = baser - its->tables; in its_write_baser()
2318 gits_write_baser(val, its->base + GITS_BASER + (idx << 3)); in its_write_baser()
2319 baser->val = its_read_baser(its, baser); in its_write_baser()
2322 static int its_setup_baser(struct its_node *its, struct its_baser *baser, in its_setup_baser() argument
2325 u64 val = its_read_baser(its, baser); in its_setup_baser()
2336 pr_warn("ITS@%pa: %s too large, reduce ITS pages %u->%u\n", in its_setup_baser()
2337 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2343 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order); in its_setup_baser()
2355 pr_err("ITS: no 52bit PA support when psz=%d\n", psz); in its_setup_baser()
2390 its_write_baser(its, baser, val); in its_setup_baser()
2409 pr_err("ITS@%pa: %s doesn't stick: %llx %llx\n", in its_setup_baser()
2410 &its->phys_base, its_base_type_string[type], in its_setup_baser()
2421 pr_info("ITS@%pa: allocated %d %s @%lx (%s, esz %d, psz %dK, shr %d)\n", in its_setup_baser()
2422 &its->phys_base, (int)(PAGE_ORDER_TO_SIZE(order) / (int)tmp), in its_setup_baser()
2431 static bool its_parse_indirect_baser(struct its_node *its, in its_parse_indirect_baser() argument
2435 u64 tmp = its_read_baser(its, baser); in its_parse_indirect_baser()
2449 its_write_baser(its, baser, val | GITS_BASER_INDIRECT); in its_parse_indirect_baser()
2454 * The size of the lvl2 table is equal to ITS page size in its_parse_indirect_baser()
2457 * which is reported by ITS hardware times lvl1 table in its_parse_indirect_baser()
2467 * range of device IDs that the ITS can grok... The ID in its_parse_indirect_baser()
2476 pr_warn("ITS@%pa: %s Table too large, reduce ids %llu->%u\n", in its_parse_indirect_baser()
2477 &its->phys_base, its_base_type_string[type], in its_parse_indirect_baser()
2478 device_ids(its), ids); in its_parse_indirect_baser()
2496 static u32 compute_its_aff(struct its_node *its) in compute_its_aff() argument
2502 * Reencode the ITS SVPET and MPIDR as a GICR_TYPER, and compute in compute_its_aff()
2506 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in compute_its_aff()
2508 val |= FIELD_PREP(GICR_TYPER_AFFINITY, its->mpidr); in compute_its_aff()
2514 struct its_node *its; in find_sibling_its() local
2522 list_for_each_entry(its, &its_nodes, entry) { in find_sibling_its()
2525 if (!is_v4_1(its) || its == cur_its) in find_sibling_its()
2528 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in find_sibling_its()
2531 if (aff != compute_its_aff(its)) in find_sibling_its()
2535 baser = its->tables[2].val; in find_sibling_its()
2539 return its; in find_sibling_its()
2545 static void its_free_tables(struct its_node *its) in its_free_tables() argument
2550 if (its->tables[i].base) { in its_free_tables()
2551 free_pages((unsigned long)its->tables[i].base, in its_free_tables()
2552 its->tables[i].order); in its_free_tables()
2553 its->tables[i].base = NULL; in its_free_tables()
2558 static int its_probe_baser_psz(struct its_node *its, struct its_baser *baser) in its_probe_baser_psz() argument
2565 val = its_read_baser(its, baser); in its_probe_baser_psz()
2584 its_write_baser(its, baser, val); in its_probe_baser_psz()
2606 static int its_alloc_tables(struct its_node *its) in its_alloc_tables() argument
2612 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_22375) in its_alloc_tables()
2616 if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) { in its_alloc_tables()
2622 struct its_baser *baser = its->tables + i; in its_alloc_tables()
2623 u64 val = its_read_baser(its, baser); in its_alloc_tables()
2631 if (its_probe_baser_psz(its, baser)) { in its_alloc_tables()
2632 its_free_tables(its); in its_alloc_tables()
2640 indirect = its_parse_indirect_baser(its, baser, &order, in its_alloc_tables()
2641 device_ids(its)); in its_alloc_tables()
2645 if (is_v4_1(its)) { in its_alloc_tables()
2649 if ((sibling = find_sibling_its(its))) { in its_alloc_tables()
2651 its_write_baser(its, baser, baser->val); in its_alloc_tables()
2656 indirect = its_parse_indirect_baser(its, baser, &order, in its_alloc_tables()
2661 err = its_setup_baser(its, baser, cache, shr, order, indirect); in its_alloc_tables()
2663 its_free_tables(its); in its_alloc_tables()
2677 struct its_node *its; in inherit_vpe_l1_table_from_its() local
2684 list_for_each_entry(its, &its_nodes, entry) { in inherit_vpe_l1_table_from_its()
2687 if (!is_v4_1(its)) in inherit_vpe_l1_table_from_its()
2690 if (!FIELD_GET(GITS_TYPER_SVPET, its->typer)) in inherit_vpe_l1_table_from_its()
2693 if (aff != compute_its_aff(its)) in inherit_vpe_l1_table_from_its()
2697 baser = its->tables[2].val; in inherit_vpe_l1_table_from_its()
2702 gic_data_rdist()->vpe_l1_base = its->tables[2].base; in inherit_vpe_l1_table_from_its()
2754 * ours wrt CommonLPIAff. Let's use its own VPROPBASER. in inherit_vpe_l1_table_from_rd()
2964 static int its_alloc_collections(struct its_node *its) in its_alloc_collections() argument
2968 its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections), in its_alloc_collections()
2970 if (!its->collections) in its_alloc_collections()
2974 its->collections[i].target_address = ~0ULL; in its_alloc_collections()
3072 pr_err_ratelimited("ITS virtual pending table not cleaning\n"); in read_vpend_dirty_clear()
3228 static void its_cpu_init_collection(struct its_node *its) in its_cpu_init_collection() argument
3233 /* avoid cross node collections and its mapping */ in its_cpu_init_collection()
3234 if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { in its_cpu_init_collection()
3238 if (its->numa_node != NUMA_NO_NODE && in its_cpu_init_collection()
3239 its->numa_node != of_node_to_nid(cpu_node)) in its_cpu_init_collection()
3244 * We now have to bind each collection to its target in its_cpu_init_collection()
3247 if (gic_read_typer(its->base + GITS_TYPER) & GITS_TYPER_PTA) { in its_cpu_init_collection()
3249 * This ITS wants the physical address of the in its_cpu_init_collection()
3254 /* This ITS wants a linear CPU number. */ in its_cpu_init_collection()
3260 its->collections[cpu].target_address = target; in its_cpu_init_collection()
3261 its->collections[cpu].col_id = cpu; in its_cpu_init_collection()
3263 its_send_mapc(its, &its->collections[cpu], 1); in its_cpu_init_collection()
3264 its_send_invall(its, &its->collections[cpu]); in its_cpu_init_collection()
3269 struct its_node *its; in its_cpu_init_collections() local
3273 list_for_each_entry(its, &its_nodes, entry) in its_cpu_init_collections()
3274 its_cpu_init_collection(its); in its_cpu_init_collections()
3279 static struct its_device *its_find_device(struct its_node *its, u32 dev_id) in its_find_device() argument
3284 raw_spin_lock_irqsave(&its->lock, flags); in its_find_device()
3286 list_for_each_entry(tmp, &its->its_device_list, entry) { in its_find_device()
3293 raw_spin_unlock_irqrestore(&its->lock, flags); in its_find_device()
3298 static struct its_baser *its_get_baser(struct its_node *its, u32 type) in its_get_baser() argument
3303 if (GITS_BASER_TYPE(its->tables[i].val) == type) in its_get_baser()
3304 return &its->tables[i]; in its_get_baser()
3310 static bool its_alloc_table_entry(struct its_node *its, in its_alloc_table_entry() argument
3331 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_alloc_table_entry()
3346 /* Ensure updated table contents are visible to ITS hardware */ in its_alloc_table_entry()
3353 static bool its_alloc_device_table(struct its_node *its, u32 dev_id) in its_alloc_device_table() argument
3357 baser = its_get_baser(its, GITS_BASER_TYPE_DEVICE); in its_alloc_device_table()
3359 /* Don't allow device id that exceeds ITS hardware limit */ in its_alloc_device_table()
3361 return (ilog2(dev_id) < device_ids(its)); in its_alloc_device_table()
3363 return its_alloc_table_entry(its, baser, dev_id); in its_alloc_device_table()
3368 struct its_node *its; in its_alloc_vpe_table() local
3378 list_for_each_entry(its, &its_nodes, entry) { in its_alloc_vpe_table()
3381 if (!is_v4(its)) in its_alloc_vpe_table()
3384 baser = its_get_baser(its, GITS_BASER_TYPE_VCPU); in its_alloc_vpe_table()
3388 if (!its_alloc_table_entry(its, baser, vpe_id)) in its_alloc_vpe_table()
3408 static struct its_device *its_create_device(struct its_node *its, u32 dev_id, in its_create_device() argument
3421 if (!its_alloc_device_table(its, dev_id)) in its_create_device()
3433 sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1); in its_create_device()
3435 itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node); in its_create_device()
3457 dev->its = its; in its_create_device()
3468 raw_spin_lock_irqsave(&its->lock, flags); in its_create_device()
3469 list_add(&dev->entry, &its->its_device_list); in its_create_device()
3470 raw_spin_unlock_irqrestore(&its->lock, flags); in its_create_device()
3472 /* Map device to its ITT */ in its_create_device()
3482 raw_spin_lock_irqsave(&its_dev->its->lock, flags); in its_free_device()
3484 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags); in its_free_device()
3509 struct its_node *its; in its_msi_prepare() local
3519 * are built on top of the ITS. in its_msi_prepare()
3524 its = msi_info->data; in its_msi_prepare()
3528 vpe_proxy.dev->its == its && in its_msi_prepare()
3536 mutex_lock(&its->dev_alloc_lock); in its_msi_prepare()
3537 its_dev = its_find_device(its, dev_id); in its_msi_prepare()
3549 its_dev = its_create_device(its, dev_id, nvec, true); in its_msi_prepare()
3560 mutex_unlock(&its->dev_alloc_lock); in its_msi_prepare()
3598 struct its_node *its = its_dev->its; in its_irq_domain_alloc() local
3608 err = iommu_dma_prepare_msi(info->desc, its->get_msi_base(its_dev)); in its_irq_domain_alloc()
3667 struct its_node *its = its_dev->its; in its_irq_domain_free() local
3681 mutex_lock(&its->dev_alloc_lock); in its_irq_domain_free()
3699 mutex_unlock(&its->dev_alloc_lock); in its_irq_domain_free()
3817 target_col = &vpe_proxy.dev->its->collections[to]; in its_vpe_db_proxy_move()
3837 * interrupt to its new location. in its_vpe_set_affinity()
3850 * If we are offered another CPU in the same GICv4.1 ITS in its_vpe_set_affinity()
3914 * would be able to read its coarse map pretty quickly anyway, in its_vpe_schedule()
3936 struct its_node *its; in its_vpe_invall() local
3938 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_invall()
3939 if (!is_v4(its)) in its_vpe_invall()
3942 if (its_list_map && !vpe->its_vm->vlpi_count[its->list_nr]) in its_vpe_invall()
3946 * Sending a VINVALL to a single ITS is enough, as all in its_vpe_invall()
3949 its_send_vinvall(its, vpe); in its_vpe_invall()
4070 static struct its_node *its = NULL; in find_4_1_its() local
4072 if (!its) { in find_4_1_its()
4073 list_for_each_entry(its, &its_nodes, entry) { in find_4_1_its()
4074 if (is_v4_1(its)) in find_4_1_its()
4075 return its; in find_4_1_its()
4079 its = NULL; in find_4_1_its()
4082 return its; in find_4_1_its()
4088 struct its_node *its; in its_vpe_4_1_send_inv() local
4093 * it to the first valid ITS, and let the HW do its magic. in its_vpe_4_1_send_inv()
4095 its = find_4_1_its(); in its_vpe_4_1_send_inv()
4096 if (its) in its_vpe_4_1_send_inv()
4097 its_send_invdb(its, vpe); in its_vpe_4_1_send_inv()
4234 * GICv4.1 allows us to send VSGI commands to any ITS as long as the in its_configure_sgi()
4236 * activation time, we're pretty sure the first GICv4.1 ITS will do. in its_configure_sgi()
4279 struct its_node *its = find_4_1_its(); in its_sgi_set_irqchip_state() local
4284 writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); in its_sgi_set_irqchip_state()
4579 struct its_node *its; in its_vpe_irq_domain_activate() local
4592 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_irq_domain_activate()
4593 if (!is_v4(its)) in its_vpe_irq_domain_activate()
4596 its_send_vmapp(its, vpe, true); in its_vpe_irq_domain_activate()
4597 its_send_vinvall(its, vpe); in its_vpe_irq_domain_activate()
4609 struct its_node *its; in its_vpe_irq_domain_deactivate() local
4618 list_for_each_entry(its, &its_nodes, entry) { in its_vpe_irq_domain_deactivate()
4619 if (!is_v4(its)) in its_vpe_irq_domain_deactivate()
4622 its_send_vmapp(its, vpe, false); in its_vpe_irq_domain_deactivate()
4649 * GIC architecture specification requires the ITS to be both in its_force_quiescent()
4656 /* Disable the generation of all interrupts to this ITS */ in its_force_quiescent()
4660 /* Poll GITS_CTLR and wait until ITS becomes quiescent */ in its_force_quiescent()
4677 struct its_node *its = data; in its_enable_quirk_cavium_22375() local
4680 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_cavium_22375()
4681 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, 20 - 1); in its_enable_quirk_cavium_22375()
4682 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375; in its_enable_quirk_cavium_22375()
4689 struct its_node *its = data; in its_enable_quirk_cavium_23144() local
4691 its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144; in its_enable_quirk_cavium_23144()
4698 struct its_node *its = data; in its_enable_quirk_qdf2400_e0065() local
4701 its->typer &= ~GITS_TYPER_ITT_ENTRY_SIZE; in its_enable_quirk_qdf2400_e0065()
4702 its->typer |= FIELD_PREP(GITS_TYPER_ITT_ENTRY_SIZE, 16 - 1); in its_enable_quirk_qdf2400_e0065()
4709 struct its_node *its = its_dev->its; in its_irq_get_msi_base_pre_its() local
4712 * The Socionext Synquacer SoC has a so-called 'pre-ITS', in its_irq_get_msi_base_pre_its()
4718 return its->pre_its_base + (its_dev->device_id << 2); in its_irq_get_msi_base_pre_its()
4723 struct its_node *its = data; in its_enable_quirk_socionext_synquacer() local
4727 if (!fwnode_property_read_u32_array(its->fwnode_handle, in its_enable_quirk_socionext_synquacer()
4728 "socionext,synquacer-pre-its", in its_enable_quirk_socionext_synquacer()
4732 its->pre_its_base = pre_its_window[0]; in its_enable_quirk_socionext_synquacer()
4733 its->get_msi_base = its_irq_get_msi_base_pre_its; in its_enable_quirk_socionext_synquacer()
4736 if (device_ids(its) > ids) { in its_enable_quirk_socionext_synquacer()
4737 its->typer &= ~GITS_TYPER_DEVBITS; in its_enable_quirk_socionext_synquacer()
4738 its->typer |= FIELD_PREP(GITS_TYPER_DEVBITS, ids - 1); in its_enable_quirk_socionext_synquacer()
4741 /* the pre-ITS breaks isolation, so disable MSI remapping */ in its_enable_quirk_socionext_synquacer()
4742 its->msi_domain_flags &= ~IRQ_DOMAIN_FLAG_ISOLATED_MSI; in its_enable_quirk_socionext_synquacer()
4750 struct its_node *its = data; in its_enable_quirk_hip07_161600802() local
4756 its->vlpi_redist_offset = SZ_128K; in its_enable_quirk_hip07_161600802()
4762 struct its_node *its = data; in its_enable_rk3588001() local
4768 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in its_enable_rk3588001()
4776 struct its_node *its = data; in its_set_non_coherent() local
4778 its->flags |= ITS_FLAGS_FORCE_NON_SHAREABLE; in its_set_non_coherent()
4785 .desc = "ITS: Cavium errata 22375, 24313",
4793 .desc = "ITS: Cavium erratum 23144",
4801 .desc = "ITS: QDF2400 erratum 0065",
4802 .iidr = 0x00001070, /* QDF2400 ITS rev 1.x */
4811 * implementation, but with a 'pre-ITS' added that requires
4814 .desc = "ITS: Socionext Synquacer pre-ITS",
4822 .desc = "ITS: Hip07 erratum 161600802",
4830 .desc = "ITS: Rockchip erratum RK3588001",
4837 .desc = "ITS: non-coherent attribute",
4845 static void its_enable_quirks(struct its_node *its) in its_enable_quirks() argument
4847 u32 iidr = readl_relaxed(its->base + GITS_IIDR); in its_enable_quirks()
4849 gic_enable_quirks(iidr, its_quirks, its); in its_enable_quirks()
4851 if (is_of_node(its->fwnode_handle)) in its_enable_quirks()
4852 gic_enable_of_quirks(to_of_node(its->fwnode_handle), in its_enable_quirks()
4853 its_quirks, its); in its_enable_quirks()
4858 struct its_node *its; in its_save_disable() local
4862 list_for_each_entry(its, &its_nodes, entry) { in its_save_disable()
4865 base = its->base; in its_save_disable()
4866 its->ctlr_save = readl_relaxed(base + GITS_CTLR); in its_save_disable()
4869 pr_err("ITS@%pa: failed to quiesce: %d\n", in its_save_disable()
4870 &its->phys_base, err); in its_save_disable()
4871 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4875 its->cbaser_save = gits_read_cbaser(base + GITS_CBASER); in its_save_disable()
4880 list_for_each_entry_continue_reverse(its, &its_nodes, entry) { in its_save_disable()
4883 base = its->base; in its_save_disable()
4884 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_save_disable()
4894 struct its_node *its; in its_restore_enable() local
4898 list_for_each_entry(its, &its_nodes, entry) { in its_restore_enable()
4902 base = its->base; in its_restore_enable()
4905 * Make sure that the ITS is disabled. If it fails to quiesce, in its_restore_enable()
4907 * registers is undefined according to the GIC v3 ITS in its_restore_enable()
4910 * Firmware resuming with the ITS enabled is terminally broken. in its_restore_enable()
4915 pr_err("ITS@%pa: failed to quiesce on resume: %d\n", in its_restore_enable()
4916 &its->phys_base, ret); in its_restore_enable()
4920 gits_write_cbaser(its->cbaser_save, base + GITS_CBASER); in its_restore_enable()
4926 its->cmd_write = its->cmd_base; in its_restore_enable()
4931 struct its_baser *baser = &its->tables[i]; in its_restore_enable()
4936 its_write_baser(its, baser, baser->val); in its_restore_enable()
4938 writel_relaxed(its->ctlr_save, base + GITS_CTLR); in its_restore_enable()
4941 * Reinit the collection if it's stored in the ITS. This is in its_restore_enable()
4945 if (its->collections[smp_processor_id()].col_id < in its_restore_enable()
4947 its_cpu_init_collection(its); in its_restore_enable()
4964 pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start); in its_map_one()
4971 pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start); in its_map_one()
4978 pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start); in its_map_one()
4989 static int its_init_domain(struct its_node *its) in its_init_domain() argument
4999 info->data = its; in its_init_domain()
5002 its->msi_domain_flags, 0, in its_init_domain()
5003 its->fwnode_handle, &its_domain_ops, in its_init_domain()
5017 struct its_node *its; in its_init_vpe_domain() local
5022 pr_info("ITS: Using DirectLPI for VPE invalidation\n"); in its_init_vpe_domain()
5026 /* Any ITS will do, even if not v4 */ in its_init_vpe_domain()
5027 its = list_first_entry(&its_nodes, struct its_node, entry); in its_init_vpe_domain()
5036 devid = GENMASK(device_ids(its) - 1, 0); in its_init_vpe_domain()
5037 vpe_proxy.dev = its_create_device(its, devid, entries, false); in its_init_vpe_domain()
5040 pr_err("ITS: Can't allocate GICv4 proxy device\n"); in its_init_vpe_domain()
5048 pr_info("ITS: Allocated DevID %x as GICv4 proxy device (%d slots)\n", in its_init_vpe_domain()
5054 static int __init its_compute_its_list_map(struct its_node *its) in its_compute_its_list_map() argument
5067 pr_err("ITS@%pa: No ITSList entry available!\n", in its_compute_its_list_map()
5068 &its->phys_base); in its_compute_its_list_map()
5072 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_compute_its_list_map()
5075 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_compute_its_list_map()
5076 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_compute_its_list_map()
5083 pr_err("ITS@%pa: Duplicate ITSList entry %d\n", in its_compute_its_list_map()
5084 &its->phys_base, its_number); in its_compute_its_list_map()
5091 static int __init its_probe_one(struct its_node *its) in its_probe_one() argument
5098 its_enable_quirks(its); in its_probe_one()
5100 if (is_v4(its)) { in its_probe_one()
5101 if (!(its->typer & GITS_TYPER_VMOVP)) { in its_probe_one()
5102 err = its_compute_its_list_map(its); in its_probe_one()
5106 its->list_nr = err; in its_probe_one()
5108 pr_info("ITS@%pa: Using ITS number %d\n", in its_probe_one()
5109 &its->phys_base, err); in its_probe_one()
5111 pr_info("ITS@%pa: Single VMOVP capable\n", &its->phys_base); in its_probe_one()
5114 if (is_v4_1(its)) { in its_probe_one()
5115 u32 svpet = FIELD_GET(GITS_TYPER_SVPET, its->typer); in its_probe_one()
5117 its->sgir_base = ioremap(its->phys_base + SZ_128K, SZ_64K); in its_probe_one()
5118 if (!its->sgir_base) { in its_probe_one()
5123 its->mpidr = readl_relaxed(its->base + GITS_MPIDR); in its_probe_one()
5125 pr_info("ITS@%pa: Using GICv4.1 mode %08x %08x\n", in its_probe_one()
5126 &its->phys_base, its->mpidr, svpet); in its_probe_one()
5130 page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, in its_probe_one()
5136 its->cmd_base = (void *)page_address(page); in its_probe_one()
5137 its->cmd_write = its->cmd_base; in its_probe_one()
5139 err = its_alloc_tables(its); in its_probe_one()
5143 err = its_alloc_collections(its); in its_probe_one()
5147 baser = (virt_to_phys(its->cmd_base) | in its_probe_one()
5153 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5154 tmp = gits_read_cbaser(its->base + GITS_CBASER); in its_probe_one()
5156 if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) in its_probe_one()
5169 gits_write_cbaser(baser, its->base + GITS_CBASER); in its_probe_one()
5171 pr_info("ITS: using cache flushing for cmd queue\n"); in its_probe_one()
5172 its->flags |= ITS_FLAGS_CMDQ_NEEDS_FLUSHING; in its_probe_one()
5175 gits_write_cwriter(0, its->base + GITS_CWRITER); in its_probe_one()
5176 ctlr = readl_relaxed(its->base + GITS_CTLR); in its_probe_one()
5178 if (is_v4(its)) in its_probe_one()
5180 writel_relaxed(ctlr, its->base + GITS_CTLR); in its_probe_one()
5182 err = its_init_domain(its); in its_probe_one()
5187 list_add(&its->entry, &its_nodes); in its_probe_one()
5193 its_free_tables(its); in its_probe_one()
5195 free_pages((unsigned long)its->cmd_base, get_order(ITS_CMD_QUEUE_SZ)); in its_probe_one()
5197 if (its->sgir_base) in its_probe_one()
5198 iounmap(its->sgir_base); in its_probe_one()
5200 pr_err("ITS@%pa: failed probing (%d)\n", &its->phys_base, err); in its_probe_one()
5357 { .compatible = "arm,gic-v3-its", },
5365 struct its_node *its; in its_node_init() local
5372 pr_info("ITS %pR\n", res); in its_node_init()
5374 its = kzalloc(sizeof(*its), GFP_KERNEL); in its_node_init()
5375 if (!its) in its_node_init()
5378 raw_spin_lock_init(&its->lock); in its_node_init()
5379 mutex_init(&its->dev_alloc_lock); in its_node_init()
5380 INIT_LIST_HEAD(&its->entry); in its_node_init()
5381 INIT_LIST_HEAD(&its->its_device_list); in its_node_init()
5383 its->typer = gic_read_typer(its_base + GITS_TYPER); in its_node_init()
5384 its->base = its_base; in its_node_init()
5385 its->phys_base = res->start; in its_node_init()
5386 its->get_msi_base = its_irq_get_msi_base; in its_node_init()
5387 its->msi_domain_flags = IRQ_DOMAIN_FLAG_ISOLATED_MSI; in its_node_init()
5389 its->numa_node = numa_node; in its_node_init()
5390 its->fwnode_handle = handle; in its_node_init()
5392 return its; in its_node_init()
5399 static void its_node_destroy(struct its_node *its) in its_node_destroy() argument
5401 iounmap(its->base); in its_node_destroy()
5402 kfree(its); in its_node_destroy()
5412 * Make sure *all* the ITS are reset before we probe any, as in its_of_probe()
5413 * they may be sharing memory. If any of the ITS fails to in its_of_probe()
5431 struct its_node *its; in its_of_probe() local
5436 pr_warn("%pOF: no msi-controller property, ITS ignored\n", in its_of_probe()
5447 its = its_node_init(&res, &np->fwnode, of_node_to_nid(np)); in its_of_probe()
5448 if (!its) in its_of_probe()
5451 err = its_probe_one(its); in its_of_probe()
5453 its_node_destroy(its); in its_of_probe()
5468 /* GIC ITS ID */
5503 pr_err("SRAT: Invalid header length %d in ITS affinity\n", in gic_acpi_parse_srat_its()
5516 pr_err("SRAT: Invalid NUMA node %d in ITS affinity\n", node); in gic_acpi_parse_srat_its()
5523 pr_info("SRAT: PXM %d -> ITS %d -> Node %d\n", in gic_acpi_parse_srat_its()
5551 /* free the its_srat_maps after ITS probing */
5567 struct its_node *its; in gic_acpi_parse_madt_its() local
5579 pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n", in gic_acpi_parse_madt_its()
5587 pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", in gic_acpi_parse_madt_its()
5592 its = its_node_init(&res, dom_handle, in gic_acpi_parse_madt_its()
5594 if (!its) { in gic_acpi_parse_madt_its()
5599 err = its_probe_one(its); in gic_acpi_parse_madt_its()
5630 * Make sure *all* the ITS are reset before we probe any, as in its_acpi_probe()
5631 * they may be sharing memory. If any of the ITS fails to in its_acpi_probe()
5672 struct its_node *its; in its_init() local
5687 pr_warn("ITS: No ITS available, not enabling LPIs\n"); in its_init()
5695 list_for_each_entry(its, &its_nodes, entry) { in its_init()
5696 has_v4 |= is_v4(its); in its_init()
5697 has_v4_1 |= is_v4_1(its); in its_init()
5715 pr_err("ITS: Disabling GICv4 support\n"); in its_init()