Lines Matching +full:soc +full:- +full:s
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2014 NVIDIA CORPORATION. All rights reserved.
17 #include <linux/dma-mapping.h>
19 #include <soc/tegra/ahb.h>
20 #include <soc/tegra/mc.h>
25 const struct tegra_smmu_group_soc *soc; member
35 const struct tegra_smmu_soc *soc; member
73 writel(value, smmu->regs + offset); in smmu_writel()
78 return readl(smmu->regs + offset); in smmu_readl()
88 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
120 /* per-SWGROUP SMMU_*_ASID register */
135 #define SMMU_PAGE_MASK (~(SMMU_SIZE_PT-1))
158 return (iova >> SMMU_PDE_SHIFT) & (SMMU_NUM_PDE - 1); in iova_pd_index()
163 return (iova >> SMMU_PTE_SHIFT) & (SMMU_NUM_PTE - 1); in iova_pt_index()
169 return (addr & smmu->pfn_mask) == addr; in smmu_dma_addr_valid()
174 return (dma_addr_t)(pde & smmu->pfn_mask) << 12; in smmu_pde_to_dma()
187 offset &= ~(smmu->mc->soc->atom_size - 1); in smmu_flush_ptc()
189 if (smmu->mc->soc->num_address_bits > 32) { in smmu_flush_ptc()
212 if (smmu->soc->num_asids == 4) in smmu_flush_tlb_asid()
227 if (smmu->soc->num_asids == 4) in smmu_flush_tlb_section()
242 if (smmu->soc->num_asids == 4) in smmu_flush_tlb_group()
260 id = find_first_zero_bit(smmu->asids, smmu->soc->num_asids); in tegra_smmu_alloc_asid()
261 if (id >= smmu->soc->num_asids) in tegra_smmu_alloc_asid()
262 return -ENOSPC; in tegra_smmu_alloc_asid()
264 set_bit(id, smmu->asids); in tegra_smmu_alloc_asid()
272 clear_bit(id, smmu->asids); in tegra_smmu_free_asid()
283 as->attr = SMMU_PD_READABLE | SMMU_PD_WRITABLE | SMMU_PD_NONSECURE; in tegra_smmu_domain_alloc_paging()
285 as->pd = alloc_page(GFP_KERNEL | __GFP_DMA | __GFP_ZERO); in tegra_smmu_domain_alloc_paging()
286 if (!as->pd) { in tegra_smmu_domain_alloc_paging()
291 as->count = kcalloc(SMMU_NUM_PDE, sizeof(u32), GFP_KERNEL); in tegra_smmu_domain_alloc_paging()
292 if (!as->count) { in tegra_smmu_domain_alloc_paging()
293 __free_page(as->pd); in tegra_smmu_domain_alloc_paging()
298 as->pts = kcalloc(SMMU_NUM_PDE, sizeof(*as->pts), GFP_KERNEL); in tegra_smmu_domain_alloc_paging()
299 if (!as->pts) { in tegra_smmu_domain_alloc_paging()
300 kfree(as->count); in tegra_smmu_domain_alloc_paging()
301 __free_page(as->pd); in tegra_smmu_domain_alloc_paging()
306 spin_lock_init(&as->lock); in tegra_smmu_domain_alloc_paging()
309 as->domain.geometry.aperture_start = 0; in tegra_smmu_domain_alloc_paging()
310 as->domain.geometry.aperture_end = 0xffffffff; in tegra_smmu_domain_alloc_paging()
311 as->domain.geometry.force_aperture = true; in tegra_smmu_domain_alloc_paging()
313 return &as->domain; in tegra_smmu_domain_alloc_paging()
322 WARN_ON_ONCE(as->use_count); in tegra_smmu_domain_free()
323 kfree(as->count); in tegra_smmu_domain_free()
324 kfree(as->pts); in tegra_smmu_domain_free()
334 for (i = 0; i < smmu->soc->num_swgroups; i++) { in tegra_smmu_find_swgroup()
335 if (smmu->soc->swgroups[i].swgroup == swgroup) { in tegra_smmu_find_swgroup()
336 group = &smmu->soc->swgroups[i]; in tegra_smmu_find_swgroup()
353 value = smmu_readl(smmu, group->reg); in tegra_smmu_enable()
357 smmu_writel(smmu, value, group->reg); in tegra_smmu_enable()
359 pr_warn("%s group from swgroup %u not found\n", __func__, in tegra_smmu_enable()
365 for (i = 0; i < smmu->soc->num_clients; i++) { in tegra_smmu_enable()
366 const struct tegra_mc_client *client = &smmu->soc->clients[i]; in tegra_smmu_enable()
368 if (client->swgroup != swgroup) in tegra_smmu_enable()
371 value = smmu_readl(smmu, client->regs.smmu.reg); in tegra_smmu_enable()
372 value |= BIT(client->regs.smmu.bit); in tegra_smmu_enable()
373 smmu_writel(smmu, value, client->regs.smmu.reg); in tegra_smmu_enable()
386 value = smmu_readl(smmu, group->reg); in tegra_smmu_disable()
390 smmu_writel(smmu, value, group->reg); in tegra_smmu_disable()
393 for (i = 0; i < smmu->soc->num_clients; i++) { in tegra_smmu_disable()
394 const struct tegra_mc_client *client = &smmu->soc->clients[i]; in tegra_smmu_disable()
396 if (client->swgroup != swgroup) in tegra_smmu_disable()
399 value = smmu_readl(smmu, client->regs.smmu.reg); in tegra_smmu_disable()
400 value &= ~BIT(client->regs.smmu.bit); in tegra_smmu_disable()
401 smmu_writel(smmu, value, client->regs.smmu.reg); in tegra_smmu_disable()
411 mutex_lock(&smmu->lock); in tegra_smmu_as_prepare()
413 if (as->use_count > 0) { in tegra_smmu_as_prepare()
414 as->use_count++; in tegra_smmu_as_prepare()
418 as->pd_dma = dma_map_page(smmu->dev, as->pd, 0, SMMU_SIZE_PD, in tegra_smmu_as_prepare()
420 if (dma_mapping_error(smmu->dev, as->pd_dma)) { in tegra_smmu_as_prepare()
421 err = -ENOMEM; in tegra_smmu_as_prepare()
425 /* We can't handle 64-bit DMA addresses */ in tegra_smmu_as_prepare()
426 if (!smmu_dma_addr_valid(smmu, as->pd_dma)) { in tegra_smmu_as_prepare()
427 err = -ENOMEM; in tegra_smmu_as_prepare()
431 err = tegra_smmu_alloc_asid(smmu, &as->id); in tegra_smmu_as_prepare()
435 smmu_flush_ptc(smmu, as->pd_dma, 0); in tegra_smmu_as_prepare()
436 smmu_flush_tlb_asid(smmu, as->id); in tegra_smmu_as_prepare()
438 smmu_writel(smmu, as->id & 0x7f, SMMU_PTB_ASID); in tegra_smmu_as_prepare()
439 value = SMMU_PTB_DATA_VALUE(as->pd_dma, as->attr); in tegra_smmu_as_prepare()
443 as->smmu = smmu; in tegra_smmu_as_prepare()
444 as->use_count++; in tegra_smmu_as_prepare()
446 mutex_unlock(&smmu->lock); in tegra_smmu_as_prepare()
451 dma_unmap_page(smmu->dev, as->pd_dma, SMMU_SIZE_PD, DMA_TO_DEVICE); in tegra_smmu_as_prepare()
453 mutex_unlock(&smmu->lock); in tegra_smmu_as_prepare()
461 mutex_lock(&smmu->lock); in tegra_smmu_as_unprepare()
463 if (--as->use_count > 0) { in tegra_smmu_as_unprepare()
464 mutex_unlock(&smmu->lock); in tegra_smmu_as_unprepare()
468 tegra_smmu_free_asid(smmu, as->id); in tegra_smmu_as_unprepare()
470 dma_unmap_page(smmu->dev, as->pd_dma, SMMU_SIZE_PD, DMA_TO_DEVICE); in tegra_smmu_as_unprepare()
472 as->smmu = NULL; in tegra_smmu_as_unprepare()
474 mutex_unlock(&smmu->lock); in tegra_smmu_as_unprepare()
487 return -ENOENT; in tegra_smmu_attach_dev()
489 for (index = 0; index < fwspec->num_ids; index++) { in tegra_smmu_attach_dev()
494 tegra_smmu_enable(smmu, fwspec->ids[index], as->id); in tegra_smmu_attach_dev()
498 return -ENODEV; in tegra_smmu_attach_dev()
503 while (index--) { in tegra_smmu_attach_dev()
504 tegra_smmu_disable(smmu, fwspec->ids[index], as->id); in tegra_smmu_attach_dev()
521 return -ENODEV; in tegra_smmu_identity_attach()
527 smmu = as->smmu; in tegra_smmu_identity_attach()
528 for (index = 0; index < fwspec->num_ids; index++) { in tegra_smmu_identity_attach()
529 tegra_smmu_disable(smmu, fwspec->ids[index], as->id); in tegra_smmu_identity_attach()
548 struct tegra_smmu *smmu = as->smmu; in tegra_smmu_set_pde()
549 u32 *pd = page_address(as->pd); in tegra_smmu_set_pde()
556 dma_sync_single_range_for_device(smmu->dev, as->pd_dma, offset, in tegra_smmu_set_pde()
560 smmu_flush_ptc(smmu, as->pd_dma, offset); in tegra_smmu_set_pde()
561 smmu_flush_tlb_section(smmu, as->id, iova); in tegra_smmu_set_pde()
576 struct tegra_smmu *smmu = as->smmu; in tegra_smmu_pte_lookup()
580 pt_page = as->pts[pd_index]; in tegra_smmu_pte_lookup()
584 pd = page_address(as->pd); in tegra_smmu_pte_lookup()
594 struct tegra_smmu *smmu = as->smmu; in as_get_pte()
596 if (!as->pts[pde]) { in as_get_pte()
599 dma = dma_map_page(smmu->dev, page, 0, SMMU_SIZE_PT, in as_get_pte()
601 if (dma_mapping_error(smmu->dev, dma)) { in as_get_pte()
607 dma_unmap_page(smmu->dev, dma, SMMU_SIZE_PT, in as_get_pte()
613 as->pts[pde] = page; in as_get_pte()
620 u32 *pd = page_address(as->pd); in as_get_pte()
625 return tegra_smmu_pte_offset(as->pts[pde], iova); in as_get_pte()
632 as->count[pd_index]++; in tegra_smmu_pte_get_use()
638 struct page *page = as->pts[pde]; in tegra_smmu_pte_put_use()
644 if (--as->count[pde] == 0) { in tegra_smmu_pte_put_use()
645 struct tegra_smmu *smmu = as->smmu; in tegra_smmu_pte_put_use()
646 u32 *pd = page_address(as->pd); in tegra_smmu_pte_put_use()
651 dma_unmap_page(smmu->dev, pte_dma, SMMU_SIZE_PT, DMA_TO_DEVICE); in tegra_smmu_pte_put_use()
653 as->pts[pde] = NULL; in tegra_smmu_pte_put_use()
660 struct tegra_smmu *smmu = as->smmu; in tegra_smmu_set_pte()
665 dma_sync_single_range_for_device(smmu->dev, pte_dma, offset, in tegra_smmu_set_pte()
668 smmu_flush_tlb_group(smmu, as->id, iova); in tegra_smmu_set_pte()
677 struct page *page = as->pts[pde]; in as_get_pde_page()
686 * spinlock needs to be unlocked and re-locked after allocation. in as_get_pde_page()
689 spin_unlock_irqrestore(&as->lock, *flags); in as_get_pde_page()
694 spin_lock_irqsave(&as->lock, *flags); in as_get_pde_page()
701 if (as->pts[pde]) { in as_get_pde_page()
705 page = as->pts[pde]; in as_get_pde_page()
724 return -ENOMEM; in __tegra_smmu_map()
728 return -ENOMEM; in __tegra_smmu_map()
730 /* If we aren't overwriting a pre-existing entry, increment use */ in __tegra_smmu_map()
774 spin_lock_irqsave(&as->lock, flags); in tegra_smmu_map()
776 spin_unlock_irqrestore(&as->lock, flags); in tegra_smmu_map()
790 spin_lock_irqsave(&as->lock, flags); in tegra_smmu_unmap()
792 spin_unlock_irqrestore(&as->lock, flags); in tegra_smmu_unmap()
809 pfn = *pte & as->smmu->pfn_mask; in tegra_smmu_iova_to_phys()
825 put_device(&pdev->dev); in tegra_smmu_find()
829 return mc->smmu; in tegra_smmu_find()
835 const struct iommu_ops *ops = smmu->iommu.ops; in tegra_smmu_configure()
838 err = iommu_fwspec_init(dev, &dev->of_node->fwnode, ops); in tegra_smmu_configure()
844 err = ops->of_xlate(dev, args); in tegra_smmu_configure()
856 struct device_node *np = dev->of_node; in tegra_smmu_probe_device()
862 while (of_parse_phandle_with_args(np, "iommus", "#iommu-cells", index, in tegra_smmu_probe_device()
880 return ERR_PTR(-ENODEV); in tegra_smmu_probe_device()
882 return &smmu->iommu; in tegra_smmu_probe_device()
890 for (i = 0; i < smmu->soc->num_groups; i++) in tegra_smmu_find_group()
891 for (j = 0; j < smmu->soc->groups[i].num_swgroups; j++) in tegra_smmu_find_group()
892 if (smmu->soc->groups[i].swgroups[j] == swgroup) in tegra_smmu_find_group()
893 return &smmu->soc->groups[i]; in tegra_smmu_find_group()
901 struct tegra_smmu *smmu = group->smmu; in tegra_smmu_group_release()
903 mutex_lock(&smmu->lock); in tegra_smmu_group_release()
904 list_del(&group->list); in tegra_smmu_group_release()
905 mutex_unlock(&smmu->lock); in tegra_smmu_group_release()
912 const struct tegra_smmu_group_soc *soc; in tegra_smmu_device_group() local
913 unsigned int swgroup = fwspec->ids[0]; in tegra_smmu_device_group()
918 soc = tegra_smmu_find_group(smmu, swgroup); in tegra_smmu_device_group()
920 mutex_lock(&smmu->lock); in tegra_smmu_device_group()
923 list_for_each_entry(group, &smmu->groups, list) in tegra_smmu_device_group()
924 if ((group->swgroup == swgroup) || (soc && group->soc == soc)) { in tegra_smmu_device_group()
925 grp = iommu_group_ref_get(group->group); in tegra_smmu_device_group()
926 mutex_unlock(&smmu->lock); in tegra_smmu_device_group()
930 group = devm_kzalloc(smmu->dev, sizeof(*group), GFP_KERNEL); in tegra_smmu_device_group()
932 mutex_unlock(&smmu->lock); in tegra_smmu_device_group()
936 INIT_LIST_HEAD(&group->list); in tegra_smmu_device_group()
937 group->swgroup = swgroup; in tegra_smmu_device_group()
938 group->smmu = smmu; in tegra_smmu_device_group()
939 group->soc = soc; in tegra_smmu_device_group()
942 group->group = pci_device_group(dev); in tegra_smmu_device_group()
944 group->group = generic_device_group(dev); in tegra_smmu_device_group()
946 if (IS_ERR(group->group)) { in tegra_smmu_device_group()
947 devm_kfree(smmu->dev, group); in tegra_smmu_device_group()
948 mutex_unlock(&smmu->lock); in tegra_smmu_device_group()
952 iommu_group_set_iommudata(group->group, group, tegra_smmu_group_release); in tegra_smmu_device_group()
953 if (soc) in tegra_smmu_device_group()
954 iommu_group_set_name(group->group, soc->name); in tegra_smmu_device_group()
955 list_add_tail(&group->list, &smmu->groups); in tegra_smmu_device_group()
956 mutex_unlock(&smmu->lock); in tegra_smmu_device_group()
958 return group->group; in tegra_smmu_device_group()
964 struct platform_device *iommu_pdev = of_find_device_by_node(args->np); in tegra_smmu_of_xlate()
966 u32 id = args->args[0]; in tegra_smmu_of_xlate()
969 * Note: we are here releasing the reference of &iommu_pdev->dev, which in tegra_smmu_of_xlate()
970 * is mc->dev. Although some functions in tegra_smmu_ops may keep using in tegra_smmu_of_xlate()
971 * its private data beyond this point, it's still safe to do so because in tegra_smmu_of_xlate()
975 put_device(&iommu_pdev->dev); in tegra_smmu_of_xlate()
977 dev_iommu_priv_set(dev, mc->smmu); in tegra_smmu_of_xlate()
1012 { .compatible = "nvidia,tegra30-ahb", }, in tegra_smmu_ahb_enable()
1024 static int tegra_smmu_swgroups_show(struct seq_file *s, void *data) in tegra_smmu_swgroups_show() argument
1026 struct tegra_smmu *smmu = s->private; in tegra_smmu_swgroups_show()
1030 seq_printf(s, "swgroup enabled ASID\n"); in tegra_smmu_swgroups_show()
1031 seq_printf(s, "------------------------\n"); in tegra_smmu_swgroups_show()
1033 for (i = 0; i < smmu->soc->num_swgroups; i++) { in tegra_smmu_swgroups_show()
1034 const struct tegra_smmu_swgroup *group = &smmu->soc->swgroups[i]; in tegra_smmu_swgroups_show()
1038 value = smmu_readl(smmu, group->reg); in tegra_smmu_swgroups_show()
1047 seq_printf(s, "%-9s %-7s %#04x\n", group->name, status, in tegra_smmu_swgroups_show()
1056 static int tegra_smmu_clients_show(struct seq_file *s, void *data) in tegra_smmu_clients_show() argument
1058 struct tegra_smmu *smmu = s->private; in tegra_smmu_clients_show()
1062 seq_printf(s, "client enabled\n"); in tegra_smmu_clients_show()
1063 seq_printf(s, "--------------------\n"); in tegra_smmu_clients_show()
1065 for (i = 0; i < smmu->soc->num_clients; i++) { in tegra_smmu_clients_show()
1066 const struct tegra_mc_client *client = &smmu->soc->clients[i]; in tegra_smmu_clients_show()
1069 value = smmu_readl(smmu, client->regs.smmu.reg); in tegra_smmu_clients_show()
1071 if (value & BIT(client->regs.smmu.bit)) in tegra_smmu_clients_show()
1076 seq_printf(s, "%-12s %s\n", client->name, status); in tegra_smmu_clients_show()
1086 smmu->debugfs = debugfs_create_dir("smmu", NULL); in tegra_smmu_debugfs_init()
1088 debugfs_create_file("swgroups", S_IRUGO, smmu->debugfs, smmu, in tegra_smmu_debugfs_init()
1090 debugfs_create_file("clients", S_IRUGO, smmu->debugfs, smmu, in tegra_smmu_debugfs_init()
1096 debugfs_remove_recursive(smmu->debugfs); in tegra_smmu_debugfs_exit()
1100 const struct tegra_smmu_soc *soc, in tegra_smmu_probe() argument
1109 return ERR_PTR(-ENOMEM); in tegra_smmu_probe()
1117 * callback via the IOMMU device's .drvdata field. in tegra_smmu_probe()
1119 mc->smmu = smmu; in tegra_smmu_probe()
1121 smmu->asids = devm_bitmap_zalloc(dev, soc->num_asids, GFP_KERNEL); in tegra_smmu_probe()
1122 if (!smmu->asids) in tegra_smmu_probe()
1123 return ERR_PTR(-ENOMEM); in tegra_smmu_probe()
1125 INIT_LIST_HEAD(&smmu->groups); in tegra_smmu_probe()
1126 mutex_init(&smmu->lock); in tegra_smmu_probe()
1128 smmu->regs = mc->regs; in tegra_smmu_probe()
1129 smmu->soc = soc; in tegra_smmu_probe()
1130 smmu->dev = dev; in tegra_smmu_probe()
1131 smmu->mc = mc; in tegra_smmu_probe()
1133 smmu->pfn_mask = in tegra_smmu_probe()
1134 BIT_MASK(mc->soc->num_address_bits - SMMU_PTE_SHIFT) - 1; in tegra_smmu_probe()
1136 mc->soc->num_address_bits, smmu->pfn_mask); in tegra_smmu_probe()
1137 smmu->tlb_mask = (1 << fls(smmu->soc->num_tlb_lines)) - 1; in tegra_smmu_probe()
1138 dev_dbg(dev, "TLB lines: %u, mask: %#lx\n", smmu->soc->num_tlb_lines, in tegra_smmu_probe()
1139 smmu->tlb_mask); in tegra_smmu_probe()
1143 if (soc->supports_request_limit) in tegra_smmu_probe()
1151 if (soc->supports_round_robin_arbitration) in tegra_smmu_probe()
1163 err = iommu_device_sysfs_add(&smmu->iommu, dev, NULL, dev_name(dev)); in tegra_smmu_probe()
1167 err = iommu_device_register(&smmu->iommu, &tegra_smmu_ops, dev); in tegra_smmu_probe()
1169 iommu_device_sysfs_remove(&smmu->iommu); in tegra_smmu_probe()
1181 iommu_device_unregister(&smmu->iommu); in tegra_smmu_remove()
1182 iommu_device_sysfs_remove(&smmu->iommu); in tegra_smmu_remove()