Lines Matching full:iommu
3 * IOMMU API for Rockchip
17 #include <linux/iommu.h>
92 /* list of clocks required by IOMMU */
113 struct iommu_device iommu; member
115 struct iommu_domain *domain; /* domain to which iommu is attached */
119 struct device_link *link; /* runtime PM link from IOMMU to master */
120 struct rk_iommu *iommu; member
141 * The Rockchip rk3288 iommu uses a 2-level page table.
150 * Each iommu device has a MMU_DTE_ADDR register that contains the physical
303 * rk3288 iova (IOMMU Virtual Address) format
344 static void rk_iommu_command(struct rk_iommu *iommu, u32 command) in rk_iommu_command() argument
348 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_command()
349 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command()
356 static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova_start, in rk_iommu_zap_lines() argument
365 for (i = 0; i < iommu->num_mmu; i++) { in rk_iommu_zap_lines()
369 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
373 static bool rk_iommu_is_stall_active(struct rk_iommu *iommu) in rk_iommu_is_stall_active() argument
378 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_is_stall_active()
379 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_stall_active()
385 static bool rk_iommu_is_paging_enabled(struct rk_iommu *iommu) in rk_iommu_is_paging_enabled() argument
390 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_is_paging_enabled()
391 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_paging_enabled()
397 static bool rk_iommu_is_reset_done(struct rk_iommu *iommu) in rk_iommu_is_reset_done() argument
402 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_is_reset_done()
403 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0; in rk_iommu_is_reset_done()
408 static int rk_iommu_enable_stall(struct rk_iommu *iommu) in rk_iommu_enable_stall() argument
413 if (rk_iommu_is_stall_active(iommu)) in rk_iommu_enable_stall()
417 if (!rk_iommu_is_paging_enabled(iommu)) in rk_iommu_enable_stall()
420 rk_iommu_command(iommu, RK_MMU_CMD_ENABLE_STALL); in rk_iommu_enable_stall()
422 ret = readx_poll_timeout(rk_iommu_is_stall_active, iommu, val, in rk_iommu_enable_stall()
426 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_enable_stall()
427 dev_err(iommu->dev, "Enable stall request timed out, status: %#08x\n", in rk_iommu_enable_stall()
428 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall()
433 static int rk_iommu_disable_stall(struct rk_iommu *iommu) in rk_iommu_disable_stall() argument
438 if (!rk_iommu_is_stall_active(iommu)) in rk_iommu_disable_stall()
441 rk_iommu_command(iommu, RK_MMU_CMD_DISABLE_STALL); in rk_iommu_disable_stall()
443 ret = readx_poll_timeout(rk_iommu_is_stall_active, iommu, val, in rk_iommu_disable_stall()
447 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_disable_stall()
448 dev_err(iommu->dev, "Disable stall request timed out, status: %#08x\n", in rk_iommu_disable_stall()
449 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall()
454 static int rk_iommu_enable_paging(struct rk_iommu *iommu) in rk_iommu_enable_paging() argument
459 if (rk_iommu_is_paging_enabled(iommu)) in rk_iommu_enable_paging()
462 rk_iommu_command(iommu, RK_MMU_CMD_ENABLE_PAGING); in rk_iommu_enable_paging()
464 ret = readx_poll_timeout(rk_iommu_is_paging_enabled, iommu, val, in rk_iommu_enable_paging()
468 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_enable_paging()
469 dev_err(iommu->dev, "Enable paging request timed out, status: %#08x\n", in rk_iommu_enable_paging()
470 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging()
475 static int rk_iommu_disable_paging(struct rk_iommu *iommu) in rk_iommu_disable_paging() argument
480 if (!rk_iommu_is_paging_enabled(iommu)) in rk_iommu_disable_paging()
483 rk_iommu_command(iommu, RK_MMU_CMD_DISABLE_PAGING); in rk_iommu_disable_paging()
485 ret = readx_poll_timeout(rk_iommu_is_paging_enabled, iommu, val, in rk_iommu_disable_paging()
489 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_disable_paging()
490 dev_err(iommu->dev, "Disable paging request timed out, status: %#08x\n", in rk_iommu_disable_paging()
491 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_paging()
496 static int rk_iommu_force_reset(struct rk_iommu *iommu) in rk_iommu_force_reset() argument
502 if (iommu->reset_disabled) in rk_iommu_force_reset()
509 for (i = 0; i < iommu->num_mmu; i++) { in rk_iommu_force_reset()
511 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, dte_addr); in rk_iommu_force_reset()
513 if (dte_addr != rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR)) { in rk_iommu_force_reset()
514 dev_err(iommu->dev, "Error during raw reset. MMU_DTE_ADDR is not functioning\n"); in rk_iommu_force_reset()
519 rk_iommu_command(iommu, RK_MMU_CMD_FORCE_RESET); in rk_iommu_force_reset()
521 ret = readx_poll_timeout(rk_iommu_is_reset_done, iommu, val, in rk_iommu_force_reset()
525 dev_err(iommu->dev, "FORCE_RESET command timed out\n"); in rk_iommu_force_reset()
532 static void log_iova(struct rk_iommu *iommu, int index, dma_addr_t iova) in log_iova() argument
534 void __iomem *base = iommu->bases[index]; in log_iova()
571 dev_err(iommu->dev, "iova = %pad: dte_index: %#03x pte_index: %#03x page_offset: %#03x\n", in log_iova()
573 …dev_err(iommu->dev, "mmu_dte_addr: %pa dte@%pa: %#08x valid: %u pte@%pa: %#08x valid: %u page@%pa … in log_iova()
581 struct rk_iommu *iommu = dev_id; in rk_iommu_irq() local
588 err = pm_runtime_get_if_in_use(iommu->dev); in rk_iommu_irq()
592 if (WARN_ON(clk_bulk_enable(iommu->num_clocks, iommu->clocks))) in rk_iommu_irq()
595 for (i = 0; i < iommu->num_mmu; i++) { in rk_iommu_irq()
596 int_status = rk_iommu_read(iommu->bases[i], RK_MMU_INT_STATUS); in rk_iommu_irq()
601 iova = rk_iommu_read(iommu->bases[i], RK_MMU_PAGE_FAULT_ADDR); in rk_iommu_irq()
606 status = rk_iommu_read(iommu->bases[i], RK_MMU_STATUS); in rk_iommu_irq()
610 dev_err(iommu->dev, "Page fault at %pad of type %s\n", in rk_iommu_irq()
614 log_iova(iommu, i, iova); in rk_iommu_irq()
621 if (iommu->domain != &rk_identity_domain) in rk_iommu_irq()
622 report_iommu_fault(iommu->domain, iommu->dev, iova, in rk_iommu_irq()
625 dev_err(iommu->dev, "Page fault while iommu not attached to domain?\n"); in rk_iommu_irq()
627 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE); in rk_iommu_irq()
628 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_PAGE_FAULT_DONE); in rk_iommu_irq()
632 dev_err(iommu->dev, "BUS_ERROR occurred at %pad\n", &iova); in rk_iommu_irq()
635 dev_err(iommu->dev, "unexpected int_status: %#08x\n", in rk_iommu_irq()
638 rk_iommu_write(iommu->bases[i], RK_MMU_INT_CLEAR, int_status); in rk_iommu_irq()
641 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_irq()
644 pm_runtime_put(iommu->dev); in rk_iommu_irq()
685 struct rk_iommu *iommu; in rk_iommu_zap_iova() local
688 iommu = list_entry(pos, struct rk_iommu, node); in rk_iommu_zap_iova()
691 ret = pm_runtime_get_if_in_use(iommu->dev); in rk_iommu_zap_iova()
695 WARN_ON(clk_bulk_enable(iommu->num_clocks, in rk_iommu_zap_iova()
696 iommu->clocks)); in rk_iommu_zap_iova()
697 rk_iommu_zap_lines(iommu, iova, size); in rk_iommu_zap_iova()
698 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_zap_iova()
699 pm_runtime_put(iommu->dev); in rk_iommu_zap_iova()
903 return data ? data->iommu : NULL; in rk_iommu_from_dev()
906 /* Must be called with iommu powered on and attached */
907 static void rk_iommu_disable(struct rk_iommu *iommu) in rk_iommu_disable() argument
912 WARN_ON(clk_bulk_enable(iommu->num_clocks, iommu->clocks)); in rk_iommu_disable()
913 rk_iommu_enable_stall(iommu); in rk_iommu_disable()
914 rk_iommu_disable_paging(iommu); in rk_iommu_disable()
915 for (i = 0; i < iommu->num_mmu; i++) { in rk_iommu_disable()
916 rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, 0); in rk_iommu_disable()
917 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, 0); in rk_iommu_disable()
919 rk_iommu_disable_stall(iommu); in rk_iommu_disable()
920 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_disable()
923 /* Must be called with iommu powered on and attached */
924 static int rk_iommu_enable(struct rk_iommu *iommu) in rk_iommu_enable() argument
926 struct iommu_domain *domain = iommu->domain; in rk_iommu_enable()
930 ret = clk_bulk_enable(iommu->num_clocks, iommu->clocks); in rk_iommu_enable()
934 ret = rk_iommu_enable_stall(iommu); in rk_iommu_enable()
938 ret = rk_iommu_force_reset(iommu); in rk_iommu_enable()
942 for (i = 0; i < iommu->num_mmu; i++) { in rk_iommu_enable()
943 rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, in rk_iommu_enable()
945 rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE); in rk_iommu_enable()
946 rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK); in rk_iommu_enable()
949 ret = rk_iommu_enable_paging(iommu); in rk_iommu_enable()
952 rk_iommu_disable_stall(iommu); in rk_iommu_enable()
954 clk_bulk_disable(iommu->num_clocks, iommu->clocks); in rk_iommu_enable()
961 struct rk_iommu *iommu; in rk_iommu_identity_attach() local
967 iommu = rk_iommu_from_dev(dev); in rk_iommu_identity_attach()
968 if (!iommu) in rk_iommu_identity_attach()
971 rk_domain = to_rk_domain(iommu->domain); in rk_iommu_identity_attach()
973 dev_dbg(dev, "Detaching from iommu domain\n"); in rk_iommu_identity_attach()
975 if (iommu->domain == identity_domain) in rk_iommu_identity_attach()
978 iommu->domain = identity_domain; in rk_iommu_identity_attach()
981 list_del_init(&iommu->node); in rk_iommu_identity_attach()
984 ret = pm_runtime_get_if_in_use(iommu->dev); in rk_iommu_identity_attach()
987 rk_iommu_disable(iommu); in rk_iommu_identity_attach()
988 pm_runtime_put(iommu->dev); in rk_iommu_identity_attach()
1006 struct rk_iommu *iommu; in rk_iommu_attach_device() local
1013 * Such a device does not belong to an iommu group. in rk_iommu_attach_device()
1015 iommu = rk_iommu_from_dev(dev); in rk_iommu_attach_device()
1016 if (!iommu) in rk_iommu_attach_device()
1019 dev_dbg(dev, "Attaching to iommu domain\n"); in rk_iommu_attach_device()
1021 /* iommu already attached */ in rk_iommu_attach_device()
1022 if (iommu->domain == domain) in rk_iommu_attach_device()
1029 iommu->domain = domain; in rk_iommu_attach_device()
1032 list_add_tail(&iommu->node, &rk_domain->iommus); in rk_iommu_attach_device()
1035 ret = pm_runtime_get_if_in_use(iommu->dev); in rk_iommu_attach_device()
1039 ret = rk_iommu_enable(iommu); in rk_iommu_attach_device()
1043 pm_runtime_put(iommu->dev); in rk_iommu_attach_device()
1121 struct rk_iommu *iommu; in rk_iommu_probe_device() local
1127 iommu = rk_iommu_from_dev(dev); in rk_iommu_probe_device()
1129 data->link = device_link_add(dev, iommu->dev, in rk_iommu_probe_device()
1132 return &iommu->iommu; in rk_iommu_probe_device()
1154 data->iommu = platform_get_drvdata(iommu_dev); in rk_iommu_of_xlate()
1155 data->iommu->domain = &rk_identity_domain; in rk_iommu_of_xlate()
1183 struct rk_iommu *iommu; in rk_iommu_probe() local
1189 iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL); in rk_iommu_probe()
1190 if (!iommu) in rk_iommu_probe()
1193 platform_set_drvdata(pdev, iommu); in rk_iommu_probe()
1194 iommu->dev = dev; in rk_iommu_probe()
1195 iommu->num_mmu = 0; in rk_iommu_probe()
1208 iommu->bases = devm_kcalloc(dev, num_res, sizeof(*iommu->bases), in rk_iommu_probe()
1210 if (!iommu->bases) in rk_iommu_probe()
1217 iommu->bases[i] = devm_ioremap_resource(&pdev->dev, res); in rk_iommu_probe()
1218 if (IS_ERR(iommu->bases[i])) in rk_iommu_probe()
1220 iommu->num_mmu++; in rk_iommu_probe()
1222 if (iommu->num_mmu == 0) in rk_iommu_probe()
1223 return PTR_ERR(iommu->bases[0]); in rk_iommu_probe()
1225 iommu->num_irq = platform_irq_count(pdev); in rk_iommu_probe()
1226 if (iommu->num_irq < 0) in rk_iommu_probe()
1227 return iommu->num_irq; in rk_iommu_probe()
1229 iommu->reset_disabled = device_property_read_bool(dev, in rk_iommu_probe()
1232 iommu->num_clocks = ARRAY_SIZE(rk_iommu_clocks); in rk_iommu_probe()
1233 iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, in rk_iommu_probe()
1234 sizeof(*iommu->clocks), GFP_KERNEL); in rk_iommu_probe()
1235 if (!iommu->clocks) in rk_iommu_probe()
1238 for (i = 0; i < iommu->num_clocks; ++i) in rk_iommu_probe()
1239 iommu->clocks[i].id = rk_iommu_clocks[i]; in rk_iommu_probe()
1242 * iommu clocks should be present for all new devices and devicetrees in rk_iommu_probe()
1246 err = devm_clk_bulk_get(iommu->dev, iommu->num_clocks, iommu->clocks); in rk_iommu_probe()
1248 iommu->num_clocks = 0; in rk_iommu_probe()
1252 err = clk_bulk_prepare(iommu->num_clocks, iommu->clocks); in rk_iommu_probe()
1256 err = iommu_device_sysfs_add(&iommu->iommu, dev, NULL, dev_name(dev)); in rk_iommu_probe()
1260 err = iommu_device_register(&iommu->iommu, &rk_iommu_ops, dev); in rk_iommu_probe()
1265 * Use the first registered IOMMU device for domain to use with DMA in rk_iommu_probe()
1267 * IOMMU device.. in rk_iommu_probe()
1274 for (i = 0; i < iommu->num_irq; i++) { in rk_iommu_probe()
1282 err = devm_request_irq(iommu->dev, irq, rk_iommu_irq, in rk_iommu_probe()
1283 IRQF_SHARED, dev_name(dev), iommu); in rk_iommu_probe()
1294 iommu_device_sysfs_remove(&iommu->iommu); in rk_iommu_probe()
1296 clk_bulk_unprepare(iommu->num_clocks, iommu->clocks); in rk_iommu_probe()
1302 struct rk_iommu *iommu = platform_get_drvdata(pdev); in rk_iommu_shutdown() local
1305 for (i = 0; i < iommu->num_irq; i++) { in rk_iommu_shutdown()
1308 devm_free_irq(iommu->dev, irq, iommu); in rk_iommu_shutdown()
1316 struct rk_iommu *iommu = dev_get_drvdata(dev); in rk_iommu_suspend() local
1318 if (iommu->domain == &rk_identity_domain) in rk_iommu_suspend()
1321 rk_iommu_disable(iommu); in rk_iommu_suspend()
1327 struct rk_iommu *iommu = dev_get_drvdata(dev); in rk_iommu_resume() local
1329 if (iommu->domain == &rk_identity_domain) in rk_iommu_resume()
1332 return rk_iommu_enable(iommu); in rk_iommu_resume()
1358 { .compatible = "rockchip,iommu",
1361 { .compatible = "rockchip,rk3568-iommu",