iommu/intel/iommu.h

663 struct iommu_pmu {  struct
664 	struct intel_iommu	*iommu;
665 	u32			num_cntr;	/* Number of counters */
666 	u32			num_eg;		/* Number of event group */
667 	u32			cntr_width;	/* Counter width */
668 	u32			cntr_stride;	/* Counter Stride */
669 	u32			filter;		/* Bitmask of filter support */
670 	void __iomem		*base;		/* the PerfMon base address */
671 	void __iomem		*cfg_reg;	/* counter configuration base address */
672 	void __iomem		*cntr_reg;	/* counter 0 address*/
673 	void __iomem		*overflow;	/* overflow status register */
675 	u64			*evcap;		/* Indicates all supported events */
676 	u32			**cntr_evcap;	/* Supported events of each counter. */
678 	struct pmu		pmu;
680 	struct perf_event	*event_list[IOMMU_PMU_IDX_MAX];
681 	unsigned char		irq_name[16];
682 	struct hlist_node	cpuhp_node;
683 	int			cpu;