Lines Matching +full:sleep +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-or-later
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
73 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
74 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
75 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
83 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
91 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
92 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
98 return -EINVAL; in inv_icm42600_fifo_decode_packet()
105 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
106 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); in inv_icm42600_buffer_update_fifo_period()
110 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
111 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
120 st->fifo.period = period; in inv_icm42600_buffer_update_fifo_period()
143 ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); in inv_icm42600_buffer_set_fifo_en()
147 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
182 * inv_icm42600_buffer_update_watermark - update watermark FIFO threshold
213 packet_size = inv_icm42600_get_packet_size(st->fifo.en); in inv_icm42600_buffer_update_watermark()
216 wm_gyro = inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size); in inv_icm42600_buffer_update_watermark()
217 wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size); in inv_icm42600_buffer_update_watermark()
219 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
220 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
232 latency = latency_gyro - (latency_accel % latency_gyro); in inv_icm42600_buffer_update_watermark()
234 latency = latency_accel - (latency_gyro % latency_accel); in inv_icm42600_buffer_update_watermark()
250 ret = regmap_update_bits_check(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_update_watermark()
257 memcpy(st->buffer, &raw_wm, sizeof(raw_wm)); in inv_icm42600_buffer_update_watermark()
258 ret = regmap_bulk_write(st->map, INV_ICM42600_REG_FIFO_WATERMARK, in inv_icm42600_buffer_update_watermark()
259 st->buffer, sizeof(raw_wm)); in inv_icm42600_buffer_update_watermark()
265 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_update_watermark()
278 struct device *dev = regmap_get_device(st->map); in inv_icm42600_buffer_preenable()
283 mutex_lock(&st->lock); in inv_icm42600_buffer_preenable()
285 mutex_unlock(&st->lock); in inv_icm42600_buffer_preenable()
299 mutex_lock(&st->lock); in inv_icm42600_buffer_postenable()
302 if (st->fifo.on) { in inv_icm42600_buffer_postenable()
308 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_postenable()
315 ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, in inv_icm42600_buffer_postenable()
321 ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, in inv_icm42600_buffer_postenable()
327 ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, st->buffer, 2); in inv_icm42600_buffer_postenable()
333 st->fifo.on++; in inv_icm42600_buffer_postenable()
335 mutex_unlock(&st->lock); in inv_icm42600_buffer_postenable()
344 mutex_lock(&st->lock); in inv_icm42600_buffer_predisable()
347 if (st->fifo.on > 1) { in inv_icm42600_buffer_predisable()
353 ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, in inv_icm42600_buffer_predisable()
359 ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, in inv_icm42600_buffer_predisable()
365 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_predisable()
372 st->fifo.on--; in inv_icm42600_buffer_predisable()
374 mutex_unlock(&st->lock); in inv_icm42600_buffer_predisable()
381 struct device *dev = regmap_get_device(st->map); in inv_icm42600_buffer_postdisable()
387 unsigned int sleep; in inv_icm42600_buffer_postdisable() local
390 if (indio_dev == st->indio_gyro) { in inv_icm42600_buffer_postdisable()
392 watermark = &st->fifo.watermark.gyro; in inv_icm42600_buffer_postdisable()
393 } else if (indio_dev == st->indio_accel) { in inv_icm42600_buffer_postdisable()
395 watermark = &st->fifo.watermark.accel; in inv_icm42600_buffer_postdisable()
397 return -EINVAL; in inv_icm42600_buffer_postdisable()
400 mutex_lock(&st->lock); in inv_icm42600_buffer_postdisable()
402 ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor); in inv_icm42600_buffer_postdisable()
420 if (!st->fifo.on) in inv_icm42600_buffer_postdisable()
424 mutex_unlock(&st->lock); in inv_icm42600_buffer_postdisable()
426 /* sleep maximum required time */ in inv_icm42600_buffer_postdisable()
427 sleep = max(sleep_sensor, sleep_temp); in inv_icm42600_buffer_postdisable()
428 if (sleep) in inv_icm42600_buffer_postdisable()
429 msleep(sleep); in inv_icm42600_buffer_postdisable()
456 st->fifo.count = 0; in inv_icm42600_buffer_fifo_read()
457 st->fifo.nb.gyro = 0; in inv_icm42600_buffer_fifo_read()
458 st->fifo.nb.accel = 0; in inv_icm42600_buffer_fifo_read()
459 st->fifo.nb.total = 0; in inv_icm42600_buffer_fifo_read()
463 max_count = sizeof(st->fifo.data); in inv_icm42600_buffer_fifo_read()
465 max_count = max * inv_icm42600_get_packet_size(st->fifo.en); in inv_icm42600_buffer_fifo_read()
468 raw_fifo_count = (__be16 *)st->buffer; in inv_icm42600_buffer_fifo_read()
469 ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, in inv_icm42600_buffer_fifo_read()
473 st->fifo.count = be16_to_cpup(raw_fifo_count); in inv_icm42600_buffer_fifo_read()
476 if (st->fifo.count == 0) in inv_icm42600_buffer_fifo_read()
478 if (st->fifo.count > max_count) in inv_icm42600_buffer_fifo_read()
479 st->fifo.count = max_count; in inv_icm42600_buffer_fifo_read()
482 ret = regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA, in inv_icm42600_buffer_fifo_read()
483 st->fifo.data, st->fifo.count); in inv_icm42600_buffer_fifo_read()
488 for (i = 0; i < st->fifo.count; i += size) { in inv_icm42600_buffer_fifo_read()
489 size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], in inv_icm42600_buffer_fifo_read()
494 st->fifo.nb.gyro++; in inv_icm42600_buffer_fifo_read()
496 st->fifo.nb.accel++; in inv_icm42600_buffer_fifo_read()
497 st->fifo.nb.total++; in inv_icm42600_buffer_fifo_read()
508 if (st->fifo.nb.total == 0) in inv_icm42600_buffer_fifo_parse()
512 ts = iio_priv(st->indio_gyro); in inv_icm42600_buffer_fifo_parse()
513 inv_sensors_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, in inv_icm42600_buffer_fifo_parse()
514 st->fifo.nb.gyro, st->timestamp.gyro); in inv_icm42600_buffer_fifo_parse()
515 if (st->fifo.nb.gyro > 0) { in inv_icm42600_buffer_fifo_parse()
516 ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); in inv_icm42600_buffer_fifo_parse()
522 ts = iio_priv(st->indio_accel); in inv_icm42600_buffer_fifo_parse()
523 inv_sensors_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, in inv_icm42600_buffer_fifo_parse()
524 st->fifo.nb.accel, st->timestamp.accel); in inv_icm42600_buffer_fifo_parse()
525 if (st->fifo.nb.accel > 0) { in inv_icm42600_buffer_fifo_parse()
526 ret = inv_icm42600_accel_parse_fifo(st->indio_accel); in inv_icm42600_buffer_fifo_parse()
541 gyro_ts = iio_get_time_ns(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
542 accel_ts = iio_get_time_ns(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
548 if (st->fifo.nb.total == 0) in inv_icm42600_buffer_hwfifo_flush()
551 if (st->fifo.nb.gyro > 0) { in inv_icm42600_buffer_hwfifo_flush()
552 ts = iio_priv(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
553 inv_sensors_timestamp_interrupt(ts, st->fifo.period, in inv_icm42600_buffer_hwfifo_flush()
554 st->fifo.nb.total, st->fifo.nb.gyro, in inv_icm42600_buffer_hwfifo_flush()
556 ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
561 if (st->fifo.nb.accel > 0) { in inv_icm42600_buffer_hwfifo_flush()
562 ts = iio_priv(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
563 inv_sensors_timestamp_interrupt(ts, st->fifo.period, in inv_icm42600_buffer_hwfifo_flush()
564 st->fifo.nb.total, st->fifo.nb.accel, in inv_icm42600_buffer_hwfifo_flush()
566 ret = inv_icm42600_accel_parse_fifo(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
581 * - use invalid value in inv_icm42600_buffer_init()
582 * - FIFO count in bytes in inv_icm42600_buffer_init()
583 * - FIFO count in big endian in inv_icm42600_buffer_init()
586 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, in inv_icm42600_buffer_init()
597 return regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, in inv_icm42600_buffer_init()