Lines Matching +full:per +full:- +full:mille
1 // SPDX-License-Identifier: GPL-2.0-or-later
92 /* 3-axis accel + temperature */
110 mutex_lock(&st->lock); in inv_icm42600_accel_update_scan_mode()
131 ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); in inv_icm42600_accel_update_scan_mode()
138 mutex_unlock(&st->lock); in inv_icm42600_accel_update_scan_mode()
150 struct device *dev = regmap_get_device(st->map); in inv_icm42600_accel_read_sensor()
156 if (chan->type != IIO_ACCEL) in inv_icm42600_accel_read_sensor()
157 return -EINVAL; in inv_icm42600_accel_read_sensor()
159 switch (chan->channel2) { in inv_icm42600_accel_read_sensor()
170 return -EINVAL; in inv_icm42600_accel_read_sensor()
174 mutex_lock(&st->lock); in inv_icm42600_accel_read_sensor()
183 data = (__be16 *)&st->buffer[0]; in inv_icm42600_accel_read_sensor()
184 ret = regmap_bulk_read(st->map, reg, data, sizeof(*data)); in inv_icm42600_accel_read_sensor()
190 ret = -EINVAL; in inv_icm42600_accel_read_sensor()
192 mutex_unlock(&st->lock); in inv_icm42600_accel_read_sensor()
200 /* +/- 16G => 0.004788403 m/s-2 */
203 /* +/- 8G => 0.002394202 m/s-2 */
206 /* +/- 4G => 0.001197101 m/s-2 */
209 /* +/- 2G => 0.000598550 m/s-2 */
219 idx = st->conf.accel.fs; in inv_icm42600_accel_read_scale()
229 struct device *dev = regmap_get_device(st->map); in inv_icm42600_accel_write_scale()
240 return -EINVAL; in inv_icm42600_accel_write_scale()
245 mutex_lock(&st->lock); in inv_icm42600_accel_write_scale()
249 mutex_unlock(&st->lock); in inv_icm42600_accel_write_scale()
293 odr = st->conf.accel.odr; in inv_icm42600_accel_read_odr()
300 return -EINVAL; in inv_icm42600_accel_read_odr()
313 struct device *dev = regmap_get_device(st->map); in inv_icm42600_accel_write_odr()
324 return -EINVAL; in inv_icm42600_accel_write_odr()
329 mutex_lock(&st->lock); in inv_icm42600_accel_write_odr()
343 mutex_unlock(&st->lock); in inv_icm42600_accel_write_odr()
352 * Value is limited to +/-1g coded on 12 bits signed. Step is 0.5mg.
355 -10, 42010, /* min: -10.042010 m/s² */
364 struct device *dev = regmap_get_device(st->map); in inv_icm42600_accel_read_offset()
372 if (chan->type != IIO_ACCEL) in inv_icm42600_accel_read_offset()
373 return -EINVAL; in inv_icm42600_accel_read_offset()
375 switch (chan->channel2) { in inv_icm42600_accel_read_offset()
386 return -EINVAL; in inv_icm42600_accel_read_offset()
390 mutex_lock(&st->lock); in inv_icm42600_accel_read_offset()
392 ret = regmap_bulk_read(st->map, reg, st->buffer, sizeof(data)); in inv_icm42600_accel_read_offset()
393 memcpy(data, st->buffer, sizeof(data)); in inv_icm42600_accel_read_offset()
395 mutex_unlock(&st->lock); in inv_icm42600_accel_read_offset()
402 switch (chan->channel2) { in inv_icm42600_accel_read_offset()
413 return -EINVAL; in inv_icm42600_accel_read_offset()
424 /* for rounding, add + or - divisor (10000) divided by 2 */ in inv_icm42600_accel_read_offset()
428 val64 -= 10000LL / 2LL; in inv_icm42600_accel_read_offset()
440 struct device *dev = regmap_get_device(st->map); in inv_icm42600_accel_write_offset()
447 if (chan->type != IIO_ACCEL) in inv_icm42600_accel_write_offset()
448 return -EINVAL; in inv_icm42600_accel_write_offset()
450 switch (chan->channel2) { in inv_icm42600_accel_write_offset()
461 return -EINVAL; in inv_icm42600_accel_write_offset()
464 /* inv_icm42600_accel_calibbias: min - step - max in micro */ in inv_icm42600_accel_write_offset()
471 return -EINVAL; in inv_icm42600_accel_write_offset()
481 /* for rounding, add + or - divisor (9806650 * 5) divided by 2 */ in inv_icm42600_accel_write_offset()
485 val64 -= 9806650 * 5 / 2; in inv_icm42600_accel_write_offset()
489 if (offset < -2048) in inv_icm42600_accel_write_offset()
490 offset = -2048; in inv_icm42600_accel_write_offset()
495 mutex_lock(&st->lock); in inv_icm42600_accel_write_offset()
497 switch (chan->channel2) { in inv_icm42600_accel_write_offset()
500 ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER4, in inv_icm42600_accel_write_offset()
504 st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F); in inv_icm42600_accel_write_offset()
505 st->buffer[1] = offset & 0xFF; in inv_icm42600_accel_write_offset()
509 ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER7, in inv_icm42600_accel_write_offset()
513 st->buffer[0] = offset & 0xFF; in inv_icm42600_accel_write_offset()
514 st->buffer[1] = ((offset & 0xF00) >> 8) | (regval & 0xF0); in inv_icm42600_accel_write_offset()
518 ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER7, in inv_icm42600_accel_write_offset()
522 st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F); in inv_icm42600_accel_write_offset()
523 st->buffer[1] = offset & 0xFF; in inv_icm42600_accel_write_offset()
526 ret = -EINVAL; in inv_icm42600_accel_write_offset()
530 ret = regmap_bulk_write(st->map, reg, st->buffer, 2); in inv_icm42600_accel_write_offset()
533 mutex_unlock(&st->lock); in inv_icm42600_accel_write_offset()
547 switch (chan->type) { in inv_icm42600_accel_read_raw()
553 return -EINVAL; in inv_icm42600_accel_read_raw()
574 return -EINVAL; in inv_icm42600_accel_read_raw()
583 if (chan->type != IIO_ACCEL) in inv_icm42600_accel_read_avail()
584 return -EINVAL; in inv_icm42600_accel_read_avail()
602 return -EINVAL; in inv_icm42600_accel_read_avail()
613 if (chan->type != IIO_ACCEL) in inv_icm42600_accel_write_raw()
614 return -EINVAL; in inv_icm42600_accel_write_raw()
634 return -EINVAL; in inv_icm42600_accel_write_raw()
642 if (chan->type != IIO_ACCEL) in inv_icm42600_accel_write_raw_get_fmt()
643 return -EINVAL; in inv_icm42600_accel_write_raw_get_fmt()
653 return -EINVAL; in inv_icm42600_accel_write_raw_get_fmt()
663 mutex_lock(&st->lock); in inv_icm42600_accel_hwfifo_set_watermark()
665 st->fifo.watermark.accel = val; in inv_icm42600_accel_hwfifo_set_watermark()
668 mutex_unlock(&st->lock); in inv_icm42600_accel_hwfifo_set_watermark()
682 mutex_lock(&st->lock); in inv_icm42600_accel_hwfifo_flush()
686 ret = st->fifo.nb.accel; in inv_icm42600_accel_hwfifo_flush()
688 mutex_unlock(&st->lock); in inv_icm42600_accel_hwfifo_flush()
706 struct device *dev = regmap_get_device(st->map); in inv_icm42600_accel_init()
713 name = devm_kasprintf(dev, GFP_KERNEL, "%s-accel", st->name); in inv_icm42600_accel_init()
715 return ERR_PTR(-ENOMEM); in inv_icm42600_accel_init()
719 return ERR_PTR(-ENOMEM); in inv_icm42600_accel_init()
723 * jitter is +/- 2% (20 per mille) in inv_icm42600_accel_init()
727 ts_chip.init_period = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_accel_init()
732 indio_dev->name = name; in inv_icm42600_accel_init()
733 indio_dev->info = &inv_icm42600_accel_info; in inv_icm42600_accel_init()
734 indio_dev->modes = INDIO_DIRECT_MODE; in inv_icm42600_accel_init()
735 indio_dev->channels = inv_icm42600_accel_channels; in inv_icm42600_accel_init()
736 indio_dev->num_channels = ARRAY_SIZE(inv_icm42600_accel_channels); in inv_icm42600_accel_init()
737 indio_dev->available_scan_masks = inv_icm42600_accel_scan_masks; in inv_icm42600_accel_init()
764 for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) { in inv_icm42600_accel_parse_fifo()
765 size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], in inv_icm42600_accel_parse_fifo()
777 inv_sensors_timestamp_apply_odr(ts, st->fifo.period, in inv_icm42600_accel_parse_fifo()
778 st->fifo.nb.total, no); in inv_icm42600_accel_parse_fifo()