Lines Matching +full:i2c +full:- +full:scl +full:- +full:clk +full:- +full:low +full:- +full:timeout +full:- +full:us
1 // SPDX-License-Identifier: GPL-2.0
3 * Nuvoton NPCM7xx I2C Controller driver
8 #include <linux/clk.h>
11 #include <linux/i2c.h>
29 * External I2C Interface driver xfer indication values, which indicate status
58 /* I2C Bank (module had 2 banks of registers) */
64 /* Internal I2C states values (for the I2C module state machine). */
119 #define NPCM_I2CSCLLT 0x1C /* SCL Low Time */
121 #define NPCM_I2CSCLHT 0x1E /* SCL High Time */
125 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
128 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
129 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
130 #define NPCM_I2CRXF_CTL 0x1E /* Rx-FIFO Control */
163 #define NPCM_I2CCST_TGSCL BIT(5) /* Toggle SCL line */
253 /* stall/stuck timeout in us */
260 /* supported clk settings. values in Hz. */
288 /* Status of one I2C module */
340 u8 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
346 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
351 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_init_params()
352 bus->rd_size = 0; in npcm_i2c_init_params()
353 bus->wr_size = 0; in npcm_i2c_init_params()
354 bus->rd_ind = 0; in npcm_i2c_init_params()
355 bus->wr_ind = 0; in npcm_i2c_init_params()
356 bus->read_block_use = false; in npcm_i2c_init_params()
357 bus->int_time_stamp = 0; in npcm_i2c_init_params()
358 bus->PEC_use = false; in npcm_i2c_init_params()
359 bus->PEC_mask = 0; in npcm_i2c_init_params()
361 if (bus->slave) in npcm_i2c_init_params()
362 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_init_params()
368 iowrite8(data, bus->reg + NPCM_I2CSDA); in npcm_i2c_wr_byte()
373 return ioread8(bus->reg + NPCM_I2CSDA); in npcm_i2c_rd_byte()
380 return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SCL()
387 return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SDA()
392 if (bus->operation == I2C_READ_OPER) in npcm_i2c_get_index()
393 return bus->rd_ind; in npcm_i2c_get_index()
394 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_get_index()
395 return bus->wr_ind; in npcm_i2c_get_index()
402 return bus->wr_size == 0 && bus->rd_size == 0; in npcm_i2c_is_quick()
414 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_disable()
418 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
420 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
422 bus->state = I2C_DISABLE; in npcm_i2c_disable()
427 u8 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
430 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
431 bus->state = I2C_IDLE; in npcm_i2c_enable()
440 val = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
442 iowrite8(val, bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
444 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
450 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
457 tx_fifo_sts = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_tx_fifo_empty()
459 if ((tx_fifo_sts & bus->data->txf_sts_tx_bytes) == 0) in npcm_i2c_tx_fifo_empty()
470 rx_fifo_sts = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_rx_fifo_full()
472 if ((rx_fifo_sts & bus->data->rxf_sts_rx_bytes) == 0) in npcm_i2c_rx_fifo_full()
483 val = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
485 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
492 val = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
494 iowrite8(val, bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
501 val = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
503 iowrite8(val, bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
510 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
516 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
523 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
526 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
534 * override HW issue: I2C may fail to supply stop condition in Master in npcm_i2c_master_stop()
536 * Need to delay at least 5 us from the last int, before issueing a stop in npcm_i2c_master_stop()
539 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
542 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
544 if (!bus->fifo_use) in npcm_i2c_master_stop()
549 if (bus->operation == I2C_READ_OPER) in npcm_i2c_master_stop()
554 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_master_stop()
561 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
567 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
574 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
577 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
586 iowrite8(val, bus->reg + NPCM_I2CST); in npcm_i2c_clear_master_status()
595 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
601 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
613 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
618 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
621 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
626 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
630 dev_err(bus->dev, "try to enable more than 2 SA not supported\n"); in npcm_i2c_slave_enable()
633 return -EFAULT; in npcm_i2c_slave_enable()
636 iowrite8(sa_reg, bus->reg + npcm_i2caddr[addr_type]); in npcm_i2c_slave_enable()
654 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
661 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
664 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_reset()
665 iowrite8(0xFF, bus->reg + NPCM_I2CST); in npcm_i2c_reset()
671 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_reset()
674 if (bus->slave) { in npcm_i2c_reset()
675 addr = bus->slave->addr; in npcm_i2c_reset()
683 bus->state = I2C_IDLE; in npcm_i2c_reset()
688 return !!FIELD_GET(NPCM_I2CST_MASTER, ioread8(bus->reg + NPCM_I2CST)); in npcm_i2c_is_master()
698 msgs = bus->msgs; in npcm_i2c_callback()
699 msgs_num = bus->msgs_num; in npcm_i2c_callback()
701 * check that transaction was not timed-out, and msgs still in npcm_i2c_callback()
707 if (completion_done(&bus->cmd_complete)) in npcm_i2c_callback()
712 bus->cmd_err = bus->msgs_num; in npcm_i2c_callback()
713 if (bus->tx_complete_cnt < ULLONG_MAX) in npcm_i2c_callback()
714 bus->tx_complete_cnt++; in npcm_i2c_callback()
718 if (bus->msgs) { in npcm_i2c_callback()
729 bus->cmd_err = -ENXIO; in npcm_i2c_callback()
734 bus->cmd_err = -EAGAIN; in npcm_i2c_callback()
738 /* I2C wake up */ in npcm_i2c_callback()
744 bus->operation = I2C_NO_OPER; in npcm_i2c_callback()
746 if (bus->slave) in npcm_i2c_callback()
747 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_callback()
750 complete(&bus->cmd_complete); in npcm_i2c_callback()
755 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_fifo_usage()
756 return (bus->data->txf_sts_tx_bytes & in npcm_i2c_fifo_usage()
757 ioread8(bus->reg + NPCM_I2CTXF_STS)); in npcm_i2c_fifo_usage()
758 if (bus->operation == I2C_READ_OPER) in npcm_i2c_fifo_usage()
759 return (bus->data->rxf_sts_rx_bytes & in npcm_i2c_fifo_usage()
760 ioread8(bus->reg + NPCM_I2CRXF_STS)); in npcm_i2c_fifo_usage()
772 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
773 while (max_bytes-- && size_free_fifo) { in npcm_i2c_write_to_fifo_master()
774 if (bus->wr_ind < bus->wr_size) in npcm_i2c_write_to_fifo_master()
775 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_write_to_fifo_master()
778 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
784 * configure the FIFO before using it. If nread is -1 RX FIFO will not be
791 if (!bus->fifo_use) in npcm_i2c_set_fifo()
799 rxf_ctl = min_t(int, nread, bus->data->fifo_size); in npcm_i2c_set_fifo()
802 if (nread <= bus->data->fifo_size) in npcm_i2c_set_fifo()
803 rxf_ctl |= bus->data->rxf_ctl_last_pec; in npcm_i2c_set_fifo()
810 if (bus->rd_ind == 0 && bus->read_block_use) { in npcm_i2c_set_fifo()
816 iowrite8(rxf_ctl, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_set_fifo()
821 if (nwrite > bus->data->fifo_size) in npcm_i2c_set_fifo()
823 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
825 iowrite8(nwrite, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
835 while (bytes_in_fifo--) { in npcm_i2c_read_fifo()
837 if (bus->rd_ind < bus->rd_size) in npcm_i2c_read_fifo()
838 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_read_fifo()
859 dev_err(bus->dev, "get slave: try to use more than 2 SA not supported\n"); in npcm_i2c_get_slave_addr()
861 slave_add = ioread8(bus->reg + npcm_i2caddr[(int)addr_type]); in npcm_i2c_get_slave_addr()
874 if (ioread8(bus->reg + npcm_i2caddr[i]) == slave_add) in npcm_i2c_remove_slave_addr()
875 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_remove_slave_addr()
889 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_write_fifo_slave()
890 while (max_bytes-- && bus->data->fifo_size != npcm_i2c_fifo_usage(bus)) { in npcm_i2c_write_fifo_slave()
891 if (bus->slv_wr_size <= 0) in npcm_i2c_write_fifo_slave()
893 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
894 npcm_i2c_wr_byte(bus, bus->slv_wr_buf[bus->slv_wr_ind]); in npcm_i2c_write_fifo_slave()
895 bus->slv_wr_ind++; in npcm_i2c_write_fifo_slave()
896 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
897 bus->slv_wr_size--; in npcm_i2c_write_fifo_slave()
905 if (!bus->slave) in npcm_i2c_read_fifo_slave()
908 while (bytes_in_fifo--) { in npcm_i2c_read_fifo_slave()
911 bus->slv_rd_ind = bus->slv_rd_ind & (bus->data->fifo_size - 1); in npcm_i2c_read_fifo_slave()
912 bus->slv_rd_buf[bus->slv_rd_ind] = data; in npcm_i2c_read_fifo_slave()
913 bus->slv_rd_ind++; in npcm_i2c_read_fifo_slave()
916 if (bus->slv_rd_ind == 1 && bus->read_block_use) in npcm_i2c_read_fifo_slave()
917 bus->slv_rd_size = data + bus->PEC_use + 1; in npcm_i2c_read_fifo_slave()
926 int ret = bus->slv_wr_ind; in npcm_i2c_slave_get_wr_buf()
929 for (i = 0; i < bus->data->fifo_size; i++) { in npcm_i2c_slave_get_wr_buf()
930 if (bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_get_wr_buf()
932 if (bus->state == I2C_SLAVE_MATCH) { in npcm_i2c_slave_get_wr_buf()
933 i2c_slave_event(bus->slave, I2C_SLAVE_READ_REQUESTED, &value); in npcm_i2c_slave_get_wr_buf()
934 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_get_wr_buf()
936 i2c_slave_event(bus->slave, I2C_SLAVE_READ_PROCESSED, &value); in npcm_i2c_slave_get_wr_buf()
938 ind = (bus->slv_wr_ind + bus->slv_wr_size) & (bus->data->fifo_size - 1); in npcm_i2c_slave_get_wr_buf()
939 bus->slv_wr_buf[ind] = value; in npcm_i2c_slave_get_wr_buf()
940 bus->slv_wr_size++; in npcm_i2c_slave_get_wr_buf()
942 return bus->data->fifo_size - ret; in npcm_i2c_slave_get_wr_buf()
949 for (i = 0; i < bus->slv_rd_ind; i++) in npcm_i2c_slave_send_rd_buf()
950 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_RECEIVED, in npcm_i2c_slave_send_rd_buf()
951 &bus->slv_rd_buf[i]); in npcm_i2c_slave_send_rd_buf()
956 if (bus->slv_rd_ind) { in npcm_i2c_slave_send_rd_buf()
957 bus->slv_wr_size = 0; in npcm_i2c_slave_send_rd_buf()
958 bus->slv_wr_ind = 0; in npcm_i2c_slave_send_rd_buf()
961 bus->slv_rd_ind = 0; in npcm_i2c_slave_send_rd_buf()
962 bus->slv_rd_size = bus->adap.quirks->max_read_len; in npcm_i2c_slave_send_rd_buf()
971 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_receive()
972 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_receive()
973 bus->slv_rd_size = nread; in npcm_i2c_slave_receive()
974 bus->slv_rd_ind = 0; in npcm_i2c_slave_receive()
976 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_slave_receive()
977 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_slave_receive()
988 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_xmit()
1001 * NACK on read will be once reached to bus->adap->quirks->max_read_len.
1010 left_in_fifo = bus->data->txf_sts_tx_bytes & in npcm_i2c_slave_wr_buf_sync()
1011 ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_slave_wr_buf_sync()
1014 if (left_in_fifo >= bus->data->fifo_size || in npcm_i2c_slave_wr_buf_sync()
1015 bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_wr_buf_sync()
1019 bus->slv_wr_ind = bus->slv_wr_ind - left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1020 bus->slv_wr_size = bus->slv_wr_size + left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1022 if (bus->slv_wr_ind < 0) in npcm_i2c_slave_wr_buf_sync()
1023 bus->slv_wr_ind += bus->data->fifo_size; in npcm_i2c_slave_wr_buf_sync()
1028 if (NPCM_I2CST_XMIT & ioread8(bus->reg + NPCM_I2CST)) { in npcm_i2c_slave_rd_wr()
1033 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_rd_wr()
1034 npcm_i2c_slave_xmit(bus, bus->adap.quirks->max_write_len, in npcm_i2c_slave_rd_wr()
1035 bus->slv_wr_buf); in npcm_i2c_slave_rd_wr()
1043 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_rd_wr()
1045 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_slave_rd_wr()
1047 npcm_i2c_slave_receive(bus, bus->adap.quirks->max_read_len, in npcm_i2c_slave_rd_wr()
1048 bus->slv_rd_buf); in npcm_i2c_slave_rd_wr()
1056 u8 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1060 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_int_slave_handler()
1062 if (bus->fifo_use) in npcm_i2c_int_slave_handler()
1065 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1068 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1069 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1070 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1076 iowrite8(NPCM_I2CST_NEGACK, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1087 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_int_slave_handler()
1090 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1092 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1098 if (completion_done(&bus->cmd_complete) == false) { in npcm_i2c_int_slave_handler()
1099 bus->cmd_err = -EIO; in npcm_i2c_int_slave_handler()
1100 complete(&bus->cmd_complete); in npcm_i2c_int_slave_handler()
1102 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1103 iowrite8(NPCM_I2CST_BER, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1111 bus->stop_ind = I2C_SLAVE_DONE_IND; in npcm_i2c_int_slave_handler()
1113 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1120 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1127 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1128 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1129 i2c_slave_event(bus->slave, I2C_SLAVE_STOP, 0); in npcm_i2c_int_slave_handler()
1130 iowrite8(NPCM_I2CST_SLVSTP, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1131 if (bus->fifo_use) { in npcm_i2c_int_slave_handler()
1137 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1139 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1143 /* restart condition occurred and Rx-FIFO was not empty */ in npcm_i2c_int_slave_handler()
1144 if (bus->fifo_use && FIELD_GET(NPCM_I2CFIF_CTS_SLVRSTR, in npcm_i2c_int_slave_handler()
1145 ioread8(bus->reg + NPCM_I2CFIF_CTS))) { in npcm_i2c_int_slave_handler()
1146 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1147 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1148 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1150 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1151 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1154 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1164 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1168 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_int_slave_handler()
1169 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1171 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1173 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_REQUESTED, in npcm_i2c_int_slave_handler()
1175 bus->operation = I2C_READ_OPER; in npcm_i2c_int_slave_handler()
1177 if (bus->own_slave_addr == 0xFF) { in npcm_i2c_int_slave_handler()
1179 val = ioread8(bus->reg + NPCM_I2CCST); in npcm_i2c_int_slave_handler()
1186 i2ccst3 = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_int_slave_handler()
1187 i2ccst2 = ioread8(bus->reg + NPCM_I2CCST2); in npcm_i2c_int_slave_handler()
1190 * the i2c module can response to 10 own SA. in npcm_i2c_int_slave_handler()
1200 bus->own_slave_addr = addr; in npcm_i2c_int_slave_handler()
1201 if (bus->PEC_mask & BIT(info)) in npcm_i2c_int_slave_handler()
1202 bus->PEC_use = true; in npcm_i2c_int_slave_handler()
1204 bus->PEC_use = false; in npcm_i2c_int_slave_handler()
1207 bus->own_slave_addr = 0; in npcm_i2c_int_slave_handler()
1209 bus->own_slave_addr = 0x61; in npcm_i2c_int_slave_handler()
1218 * (regular write-read mode) in npcm_i2c_int_slave_handler()
1220 if ((bus->state == I2C_OPER_STARTED && in npcm_i2c_int_slave_handler()
1221 bus->operation == I2C_READ_OPER && in npcm_i2c_int_slave_handler()
1222 bus->stop_ind == I2C_SLAVE_XMIT_IND) || in npcm_i2c_int_slave_handler()
1223 bus->stop_ind == I2C_SLAVE_RCV_IND) { in npcm_i2c_int_slave_handler()
1225 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1230 bus->stop_ind = I2C_SLAVE_XMIT_IND; in npcm_i2c_int_slave_handler()
1232 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_int_slave_handler()
1233 bus->state = I2C_SLAVE_MATCH; in npcm_i2c_int_slave_handler()
1235 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1239 /* Slave SDA status is set - tx or rx */ in npcm_i2c_int_slave_handler()
1241 (bus->fifo_use && in npcm_i2c_int_slave_handler()
1244 iowrite8(NPCM_I2CST_SDAST, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1263 struct npcm_i2c *bus = i2c_get_adapdata(client->adapter); in npcm_i2c_reg_slave()
1265 bus->slave = client; in npcm_i2c_reg_slave()
1267 if (!bus->slave) in npcm_i2c_reg_slave()
1268 return -EINVAL; in npcm_i2c_reg_slave()
1270 if (client->flags & I2C_CLIENT_TEN) in npcm_i2c_reg_slave()
1271 return -EAFNOSUPPORT; in npcm_i2c_reg_slave()
1273 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1276 bus->slv_rd_size = 0; in npcm_i2c_reg_slave()
1277 bus->slv_wr_size = 0; in npcm_i2c_reg_slave()
1278 bus->slv_rd_ind = 0; in npcm_i2c_reg_slave()
1279 bus->slv_wr_ind = 0; in npcm_i2c_reg_slave()
1280 if (client->flags & I2C_CLIENT_PEC) in npcm_i2c_reg_slave()
1281 bus->PEC_use = true; in npcm_i2c_reg_slave()
1283 dev_info(bus->dev, "i2c%d register slave SA=0x%x, PEC=%d\n", bus->num, in npcm_i2c_reg_slave()
1284 client->addr, bus->PEC_use); in npcm_i2c_reg_slave()
1286 npcm_i2c_slave_enable(bus, I2C_SLAVE_ADDR1, client->addr, true); in npcm_i2c_reg_slave()
1292 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1298 struct npcm_i2c *bus = client->adapter->algo_data; in npcm_i2c_unreg_slave()
1301 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1302 if (!bus->slave) { in npcm_i2c_unreg_slave()
1303 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1304 return -EINVAL; in npcm_i2c_unreg_slave()
1307 npcm_i2c_remove_slave_addr(bus, client->addr); in npcm_i2c_unreg_slave()
1308 bus->slave = NULL; in npcm_i2c_unreg_slave()
1309 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1321 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1330 if (rcount < (2 * bus->data->fifo_size) && rcount > bus->data->fifo_size) in npcm_i2c_master_fifo_read()
1331 fifo_bytes = rcount - bus->data->fifo_size; in npcm_i2c_master_fifo_read()
1334 /* last bytes are about to be read - end of tx */ in npcm_i2c_master_fifo_read()
1335 bus->state = I2C_STOP_PENDING; in npcm_i2c_master_fifo_read()
1336 bus->stop_ind = ind; in npcm_i2c_master_fifo_read()
1343 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1344 npcm_i2c_set_fifo(bus, rcount, -1); in npcm_i2c_master_fifo_read()
1352 if (bus->fifo_use) in npcm_i2c_irq_master_handler_write()
1355 /* Master write operation - last byte handling */ in npcm_i2c_irq_master_handler_write()
1356 if (bus->wr_ind == bus->wr_size) { in npcm_i2c_irq_master_handler_write()
1357 if (bus->fifo_use && npcm_i2c_fifo_usage(bus) > 0) in npcm_i2c_irq_master_handler_write()
1367 if (bus->rd_size == 0) { in npcm_i2c_irq_master_handler_write()
1370 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_write()
1371 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_master_handler_write()
1377 /* last write-byte written on previous int - restart */ in npcm_i2c_irq_master_handler_write()
1378 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_master_handler_write()
1383 * Receiving one byte only - stall after successful in npcm_i2c_irq_master_handler_write()
1386 * unintentionally NACK the next multi-byte read. in npcm_i2c_irq_master_handler_write()
1388 if (bus->rd_size == 1) in npcm_i2c_irq_master_handler_write()
1392 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_master_handler_write()
1394 npcm_i2c_wr_byte(bus, bus->dest_addr | 0x1); in npcm_i2c_irq_master_handler_write()
1398 if (!bus->fifo_use || bus->wr_size == 1) { in npcm_i2c_irq_master_handler_write()
1399 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_irq_master_handler_write()
1401 wcount = bus->wr_size - bus->wr_ind; in npcm_i2c_irq_master_handler_write()
1402 npcm_i2c_set_fifo(bus, -1, wcount); in npcm_i2c_irq_master_handler_write()
1415 block_extra_bytes_size = bus->read_block_use + bus->PEC_use; in npcm_i2c_irq_master_handler_read()
1421 if (bus->rd_ind == 0) { /* first byte handling: */ in npcm_i2c_irq_master_handler_read()
1422 if (bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1426 bus->rd_size = data + block_extra_bytes_size; in npcm_i2c_irq_master_handler_read()
1427 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_irq_master_handler_read()
1430 if (bus->fifo_use) { in npcm_i2c_irq_master_handler_read()
1431 data = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1433 iowrite8(data, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1436 npcm_i2c_set_fifo(bus, bus->rd_size - 1, -1); in npcm_i2c_irq_master_handler_read()
1443 if (bus->rd_size == block_extra_bytes_size && in npcm_i2c_irq_master_handler_read()
1444 bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1445 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_read()
1446 bus->stop_ind = I2C_BLOCK_BYTES_ERR_IND; in npcm_i2c_irq_master_handler_read()
1447 bus->cmd_err = -EIO; in npcm_i2c_irq_master_handler_read()
1459 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_nmatch()
1461 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_nmatch()
1462 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_nmatch()
1470 if (bus->nack_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_nack()
1471 bus->nack_cnt++; in npcm_i2c_irq_handle_nack()
1473 if (bus->fifo_use) { in npcm_i2c_irq_handle_nack()
1478 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_nack()
1479 bus->wr_ind -= npcm_i2c_fifo_usage(bus); in npcm_i2c_irq_handle_nack()
1482 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_nack()
1486 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_irq_handle_nack()
1501 readx_poll_timeout_atomic(ioread8, bus->reg + NPCM_I2CCST, val, in npcm_i2c_irq_handle_nack()
1506 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_nack()
1513 npcm_i2c_callback(bus, bus->stop_ind, bus->wr_ind); in npcm_i2c_irq_handle_nack()
1519 if (bus->ber_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_ber()
1520 bus->ber_cnt++; in npcm_i2c_irq_handle_ber()
1521 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_ber()
1528 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_irq_handle_ber()
1530 bus->cmd_err = -EAGAIN; in npcm_i2c_irq_handle_ber()
1531 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_ber()
1533 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_ber()
1540 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_eob()
1541 npcm_i2c_callback(bus, bus->stop_ind, bus->rd_ind); in npcm_i2c_irq_handle_eob()
1548 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_handle_stall_after_start()
1549 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_handle_stall_after_start()
1552 } else if ((bus->rd_size == 1) && !bus->read_block_use) { in npcm_i2c_irq_handle_stall_after_start()
1554 * Receiving one byte only - set NACK after ensuring in npcm_i2c_irq_handle_stall_after_start()
1560 /* Reset stall-after-address-byte */ in npcm_i2c_irq_handle_stall_after_start()
1564 iowrite8(NPCM_I2CST_STASTR, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_stall_after_start()
1567 /* SDA status is set - TX or RX, master */
1575 if (bus->state == I2C_IDLE) { in npcm_i2c_irq_handle_sda()
1576 bus->stop_ind = I2C_WAKE_UP_IND; in npcm_i2c_irq_handle_sda()
1578 if (npcm_i2c_is_quick(bus) || bus->read_block_use) in npcm_i2c_irq_handle_sda()
1588 * Receiving one byte only - stall after successful completion in npcm_i2c_irq_handle_sda()
1591 * multi-byte read in npcm_i2c_irq_handle_sda()
1593 if (bus->wr_size == 0 && bus->rd_size == 1) in npcm_i2c_irq_handle_sda()
1596 /* Initiate I2C master tx */ in npcm_i2c_irq_handle_sda()
1601 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1606 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1608 /* re-enable */ in npcm_i2c_irq_handle_sda()
1610 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1619 if (bus->wr_size) in npcm_i2c_irq_handle_sda()
1620 npcm_i2c_set_fifo(bus, -1, bus->wr_size); in npcm_i2c_irq_handle_sda()
1622 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_handle_sda()
1624 bus->state = I2C_OPER_STARTED; in npcm_i2c_irq_handle_sda()
1626 if (npcm_i2c_is_quick(bus) || bus->wr_size) in npcm_i2c_irq_handle_sda()
1627 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_irq_handle_sda()
1629 npcm_i2c_wr_byte(bus, bus->dest_addr | BIT(0)); in npcm_i2c_irq_handle_sda()
1633 bus->operation = I2C_WRITE_OPER; in npcm_i2c_irq_handle_sda()
1636 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_handle_sda()
1645 int ret = -EIO; in npcm_i2c_int_master_handler()
1647 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_master_handler()
1667 ioread8(bus->reg + NPCM_I2CCTL1)) == 1) && in npcm_i2c_int_master_handler()
1669 ioread8(bus->reg + NPCM_I2CCST3)))) { in npcm_i2c_int_master_handler()
1680 /* SDA status is set - TX or RX, master */ in npcm_i2c_int_master_handler()
1682 (bus->fifo_use && in npcm_i2c_int_master_handler()
1697 int status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1703 dev_dbg(bus->dev, "bus%d-0x%x recovery skipped, bus not stuck", in npcm_i2c_recovery_tgclk()
1704 bus->num, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1712 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1715 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_recovery_tgclk()
1716 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_recovery_tgclk()
1723 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1726 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1727 npcm_i2c_set_fifo(bus, -1, 0); in npcm_i2c_recovery_tgclk()
1731 /* Issue a single SCL toggle */ in npcm_i2c_recovery_tgclk()
1732 iowrite8(NPCM_I2CCST_TGSCL, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1739 } while (!done && iter--); in npcm_i2c_recovery_tgclk()
1741 /* If SDA line is released: send start-addr-stop, to re-sync. */ in npcm_i2c_recovery_tgclk()
1744 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1762 status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1764 if (bus->rec_fail_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
1765 bus->rec_fail_cnt++; in npcm_i2c_recovery_tgclk()
1767 if (bus->rec_succ_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
1768 bus->rec_succ_cnt++; in npcm_i2c_recovery_tgclk()
1777 struct i2c_bus_recovery_info *rinfo = &bus->rinfo; in npcm_i2c_recovery_init()
1779 rinfo->recover_bus = npcm_i2c_recovery_tgclk; in npcm_i2c_recovery_init()
1782 * npcm i2c HW allows direct reading of SCL and SDA. in npcm_i2c_recovery_init()
1783 * However, it does not support setting SCL and SDA directly. in npcm_i2c_recovery_init()
1784 * The recovery function can toggle SCL when SDA is low (but not set) in npcm_i2c_recovery_init()
1787 rinfo->get_scl = npcm_i2c_get_SCL; in npcm_i2c_recovery_init()
1788 rinfo->get_sda = npcm_i2c_get_SDA; in npcm_i2c_recovery_init()
1789 _adap->bus_recovery_info = rinfo; in npcm_i2c_recovery_init()
1799 * NPCM7XX i2c module timing parameters are dependent on module core clk (APB)
1817 src_clk_khz = bus->apb_clk / 1000; in npcm_i2c_init_clk()
1819 bus->bus_freq = bus_freq_hz; in npcm_i2c_init_clk()
1826 return -EDOM; in npcm_i2c_init_clk()
1843 return -EDOM; in npcm_i2c_init_clk()
1867 return -EDOM; in npcm_i2c_init_clk()
1872 /* Core clk > 40 MHz */ in npcm_i2c_init_clk()
1876 * SDA hold time: (HLDT-7) * T(CLK) >= 120 in npcm_i2c_init_clk()
1877 * HLDT = 120/T(CLK) + 7 = 120 * FREQ(CLK) + 7 in npcm_i2c_init_clk()
1888 return -EINVAL; in npcm_i2c_init_clk()
1895 return -EDOM; in npcm_i2c_init_clk()
1900 bus->reg + NPCM_I2CCTL2); in npcm_i2c_init_clk()
1904 bus->reg + NPCM_I2CCTL3); in npcm_i2c_init_clk()
1911 * Set SCL Low/High Time: in npcm_i2c_init_clk()
1912 * k1 = 2 * SCLLT7-0 -> Low Time = k1 / 2 in npcm_i2c_init_clk()
1913 * k2 = 2 * SCLLT7-0 -> High Time = k2 / 2 in npcm_i2c_init_clk()
1915 iowrite8(k1 / 2, bus->reg + NPCM_I2CSCLLT); in npcm_i2c_init_clk()
1916 iowrite8(k2 / 2, bus->reg + NPCM_I2CSCLHT); in npcm_i2c_init_clk()
1918 iowrite8(dbnct, bus->reg + NPCM_I2CCTL5); in npcm_i2c_init_clk()
1921 iowrite8(hldt, bus->reg + NPCM_I2CCTL4); in npcm_i2c_init_clk()
1936 if ((bus->state != I2C_DISABLE && bus->state != I2C_IDLE) || in npcm_i2c_init_module()
1938 return -EINVAL; in npcm_i2c_init_module()
1944 if (FIELD_GET(I2C_VER_FIFO_EN, ioread8(bus->reg + I2C_VER))) { in npcm_i2c_init_module()
1945 bus->fifo_use = true; in npcm_i2c_init_module()
1947 val = ioread8(bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
1949 iowrite8(val, bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
1952 bus->fifo_use = false; in npcm_i2c_init_module()
1955 /* Configure I2C module clock frequency */ in npcm_i2c_init_module()
1958 dev_err(bus->dev, "npcm_i2c_init_clk failed\n"); in npcm_i2c_init_module()
1964 bus->state = I2C_IDLE; in npcm_i2c_init_module()
1965 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
1967 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
1971 /* Check HW is OK: SDA and SCL should be high at this point. */ in npcm_i2c_init_module()
1972 if ((npcm_i2c_get_SDA(&bus->adap) == 0) || (npcm_i2c_get_SCL(&bus->adap) == 0)) { in npcm_i2c_init_module()
1973 dev_err(bus->dev, "I2C%d init fail: lines are low\n", bus->num); in npcm_i2c_init_module()
1974 dev_err(bus->dev, "SDA=%d SCL=%d\n", npcm_i2c_get_SDA(&bus->adap), in npcm_i2c_init_module()
1975 npcm_i2c_get_SCL(&bus->adap)); in npcm_i2c_init_module()
1976 return -ENXIO; in npcm_i2c_init_module()
1989 bus->state = I2C_DISABLE; in __npcm_i2c_init()
1990 bus->master_or_slave = I2C_SLAVE; in __npcm_i2c_init()
1991 bus->int_time_stamp = 0; in __npcm_i2c_init()
1993 bus->slave = NULL; in __npcm_i2c_init()
1996 ret = device_property_read_u32(&pdev->dev, "clock-frequency", in __npcm_i2c_init()
1999 dev_info(&pdev->dev, "Could not read clock-frequency property"); in __npcm_i2c_init()
2005 dev_err(&pdev->dev, "npcm_i2c_init_module failed\n"); in __npcm_i2c_init()
2017 bus->master_or_slave = I2C_MASTER; in npcm_i2c_bus_irq()
2019 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_bus_irq()
2020 bus->int_time_stamp = jiffies; in npcm_i2c_bus_irq()
2025 if (bus->slave) { in npcm_i2c_bus_irq()
2026 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_bus_irq()
2042 if (bus->state != I2C_IDLE) { in npcm_i2c_master_start_xmit()
2043 bus->cmd_err = -EBUSY; in npcm_i2c_master_start_xmit()
2046 bus->dest_addr = slave_addr << 1; in npcm_i2c_master_start_xmit()
2047 bus->wr_buf = write_data; in npcm_i2c_master_start_xmit()
2048 bus->wr_size = nwrite; in npcm_i2c_master_start_xmit()
2049 bus->wr_ind = 0; in npcm_i2c_master_start_xmit()
2050 bus->rd_buf = read_data; in npcm_i2c_master_start_xmit()
2051 bus->rd_size = nread; in npcm_i2c_master_start_xmit()
2052 bus->rd_ind = 0; in npcm_i2c_master_start_xmit()
2053 bus->PEC_use = 0; in npcm_i2c_master_start_xmit()
2055 /* for tx PEC is appended to buffer from i2c IF. PEC flag is ignored */ in npcm_i2c_master_start_xmit()
2057 bus->PEC_use = use_PEC; in npcm_i2c_master_start_xmit()
2059 bus->read_block_use = use_read_block; in npcm_i2c_master_start_xmit()
2061 bus->operation = I2C_READ_OPER; in npcm_i2c_master_start_xmit()
2063 bus->operation = I2C_WRITE_OPER; in npcm_i2c_master_start_xmit()
2064 if (bus->fifo_use) { in npcm_i2c_master_start_xmit()
2069 i2cfif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2072 iowrite8(i2cfif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2075 bus->state = I2C_IDLE; in npcm_i2c_master_start_xmit()
2090 unsigned long timeout; in npcm_i2c_master_xfer() local
2096 if (bus->state == I2C_DISABLE) { in npcm_i2c_master_xfer()
2097 dev_err(bus->dev, "I2C%d module is disabled", bus->num); in npcm_i2c_master_xfer()
2098 return -EINVAL; in npcm_i2c_master_xfer()
2102 slave_addr = msg0->addr; in npcm_i2c_master_xfer()
2103 if (msg0->flags & I2C_M_RD) { /* read */ in npcm_i2c_master_xfer()
2106 read_data = msg0->buf; in npcm_i2c_master_xfer()
2107 if (msg0->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2110 if (msg0->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2113 nread = msg0->len; in npcm_i2c_master_xfer()
2116 nwrite = msg0->len; in npcm_i2c_master_xfer()
2117 write_data = msg0->buf; in npcm_i2c_master_xfer()
2122 read_data = msg1->buf; in npcm_i2c_master_xfer()
2123 if (msg1->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2126 if (msg1->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2129 nread = msg1->len; in npcm_i2c_master_xfer()
2136 * Adaptive TimeOut: estimated time in usec + 100% margin: in npcm_i2c_master_xfer()
2137 * 2: double the timeout for clock stretching case in npcm_i2c_master_xfer()
2140 timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); in npcm_i2c_master_xfer()
2141 timeout = max_t(unsigned long, bus->adap.timeout, usecs_to_jiffies(timeout_usec)); in npcm_i2c_master_xfer()
2143 dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); in npcm_i2c_master_xfer()
2144 return -EINVAL; in npcm_i2c_master_xfer()
2147 time_left = jiffies + timeout + 1; in npcm_i2c_master_xfer()
2154 spin_lock_irqsave(&bus->lock, flags); in npcm_i2c_master_xfer()
2155 bus_busy = ioread8(bus->reg + NPCM_I2CCST) & NPCM_I2CCST_BB; in npcm_i2c_master_xfer()
2157 if (!bus_busy && bus->slave) in npcm_i2c_master_xfer()
2158 iowrite8((bus->slave->addr & 0x7F), in npcm_i2c_master_xfer()
2159 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2161 spin_unlock_irqrestore(&bus->lock, flags); in npcm_i2c_master_xfer()
2166 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_master_xfer()
2169 return -EAGAIN; in npcm_i2c_master_xfer()
2173 bus->dest_addr = slave_addr; in npcm_i2c_master_xfer()
2174 bus->msgs = msgs; in npcm_i2c_master_xfer()
2175 bus->msgs_num = num; in npcm_i2c_master_xfer()
2176 bus->cmd_err = 0; in npcm_i2c_master_xfer()
2177 bus->read_block_use = read_block; in npcm_i2c_master_xfer()
2179 reinit_completion(&bus->cmd_complete); in npcm_i2c_master_xfer()
2186 time_left = wait_for_completion_timeout(&bus->cmd_complete, in npcm_i2c_master_xfer()
2187 timeout); in npcm_i2c_master_xfer()
2190 if (bus->timeout_cnt < ULLONG_MAX) in npcm_i2c_master_xfer()
2191 bus->timeout_cnt++; in npcm_i2c_master_xfer()
2192 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_master_xfer()
2194 bus->cmd_err = -EIO; in npcm_i2c_master_xfer()
2195 bus->state = I2C_IDLE; in npcm_i2c_master_xfer()
2201 if (bus->cmd_err == -EAGAIN) in npcm_i2c_master_xfer()
2202 bus->cmd_err = i2c_recover_bus(adap); in npcm_i2c_master_xfer()
2209 else if (bus->cmd_err && in npcm_i2c_master_xfer()
2210 (bus->data->rxf_ctl_last_pec & ioread8(bus->reg + NPCM_I2CRXF_CTL))) in npcm_i2c_master_xfer()
2219 if (bus->slave) in npcm_i2c_master_xfer()
2220 iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, in npcm_i2c_master_xfer()
2221 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2225 return bus->cmd_err; in npcm_i2c_master_xfer()
2255 debugfs_create_u64("ber_cnt", 0444, bus->adap.debugfs, &bus->ber_cnt); in npcm_i2c_init_debugfs()
2256 debugfs_create_u64("nack_cnt", 0444, bus->adap.debugfs, &bus->nack_cnt); in npcm_i2c_init_debugfs()
2257 debugfs_create_u64("rec_succ_cnt", 0444, bus->adap.debugfs, &bus->rec_succ_cnt); in npcm_i2c_init_debugfs()
2258 debugfs_create_u64("rec_fail_cnt", 0444, bus->adap.debugfs, &bus->rec_fail_cnt); in npcm_i2c_init_debugfs()
2259 debugfs_create_u64("timeout_cnt", 0444, bus->adap.debugfs, &bus->timeout_cnt); in npcm_i2c_init_debugfs()
2260 debugfs_create_u64("tx_complete_cnt", 0444, bus->adap.debugfs, &bus->tx_complete_cnt); in npcm_i2c_init_debugfs()
2265 struct device_node *np = pdev->dev.of_node; in npcm_i2c_probe_bus()
2267 struct device *dev = &pdev->dev; in npcm_i2c_probe_bus()
2270 struct clk *i2c_clk; in npcm_i2c_probe_bus()
2274 bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); in npcm_i2c_probe_bus()
2276 return -ENOMEM; in npcm_i2c_probe_bus()
2278 bus->dev = &pdev->dev; in npcm_i2c_probe_bus()
2280 bus->data = of_device_get_match_data(dev); in npcm_i2c_probe_bus()
2281 if (!bus->data) { in npcm_i2c_probe_bus()
2283 return -EINVAL; in npcm_i2c_probe_bus()
2286 bus->num = of_alias_get_id(pdev->dev.of_node, "i2c"); in npcm_i2c_probe_bus()
2287 /* core clk must be acquired to calculate module timing settings */ in npcm_i2c_probe_bus()
2288 i2c_clk = devm_clk_get(&pdev->dev, NULL); in npcm_i2c_probe_bus()
2291 bus->apb_clk = clk_get_rate(i2c_clk); in npcm_i2c_probe_bus()
2293 gcr_regmap = syscon_regmap_lookup_by_phandle(np, "nuvoton,sys-mgr"); in npcm_i2c_probe_bus()
2295 gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm_i2c_probe_bus()
2299 regmap_write(gcr_regmap, NPCM_I2CSEGCTL, bus->data->segctl_init_val); in npcm_i2c_probe_bus()
2301 bus->reg = devm_platform_ioremap_resource(pdev, 0); in npcm_i2c_probe_bus()
2302 if (IS_ERR(bus->reg)) in npcm_i2c_probe_bus()
2303 return PTR_ERR(bus->reg); in npcm_i2c_probe_bus()
2305 spin_lock_init(&bus->lock); in npcm_i2c_probe_bus()
2306 init_completion(&bus->cmd_complete); in npcm_i2c_probe_bus()
2308 adap = &bus->adap; in npcm_i2c_probe_bus()
2309 adap->owner = THIS_MODULE; in npcm_i2c_probe_bus()
2310 adap->retries = 3; in npcm_i2c_probe_bus()
2311 adap->timeout = msecs_to_jiffies(35); in npcm_i2c_probe_bus()
2312 adap->algo = &npcm_i2c_algo; in npcm_i2c_probe_bus()
2313 adap->quirks = &npcm_i2c_quirks; in npcm_i2c_probe_bus()
2314 adap->algo_data = bus; in npcm_i2c_probe_bus()
2315 adap->dev.parent = &pdev->dev; in npcm_i2c_probe_bus()
2316 adap->dev.of_node = pdev->dev.of_node; in npcm_i2c_probe_bus()
2317 adap->nr = pdev->id; in npcm_i2c_probe_bus()
2323 ret = devm_request_irq(bus->dev, irq, npcm_i2c_bus_irq, 0, in npcm_i2c_probe_bus()
2324 dev_name(bus->dev), bus); in npcm_i2c_probe_bus()
2336 snprintf(bus->adap.name, sizeof(bus->adap.name), "npcm_i2c_%d", in npcm_i2c_probe_bus()
2337 bus->num); in npcm_i2c_probe_bus()
2338 ret = i2c_add_numbered_adapter(&bus->adap); in npcm_i2c_probe_bus()
2352 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2354 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2355 i2c_del_adapter(&bus->adap); in npcm_i2c_remove_bus()
2359 { .compatible = "nuvoton,npcm750-i2c", .data = &npxm7xx_i2c_data },
2360 { .compatible = "nuvoton,npcm845-i2c", .data = &npxm8xx_i2c_data },
2369 .name = "nuvoton-i2c",
2379 MODULE_DESCRIPTION("Nuvoton I2C Bus Driver");