Lines Matching full:nack
728 /* MASTER transmit got a NACK before tx all bytes */ in npcm_i2c_callback()
807 * don't NACK it. If slave returns zero size HW can't NACK in npcm_i2c_set_fifo()
808 * it immediately, it will read extra byte and then NACK. in npcm_i2c_set_fifo()
1001 * NACK on read will be once reached to bus->adap->quirks->max_read_len.
1002 * sending a NACK wherever the backend requests for it is not supported.
1031 * transmit data. Write till the master will NACK in npcm_i2c_slave_rd_wr()
1058 /* Slave: A NACK has occurred */ in npcm_i2c_int_slave_handler()
1067 /* In slave write, NACK is OK, otherwise it is a problem */ in npcm_i2c_int_slave_handler()
1384 * completion of send address byte. If we NACK here, and in npcm_i2c_irq_master_handler_write()
1386 * unintentionally NACK the next multi-byte read. in npcm_i2c_irq_master_handler_write()
1465 /* A NACK has occurred */
1485 /* In master write operation, got unexpected NACK */ in npcm_i2c_irq_handle_nack()
1509 * In Master mode, NACK should be cleared only after STOP. in npcm_i2c_irq_handle_nack()
1511 * software clears NACK bit. Then a Stop condition is sent. in npcm_i2c_irq_handle_nack()
1554 * Receiving one byte only - set NACK after ensuring in npcm_i2c_irq_handle_stall_after_start()
1589 * of sending address byte If we NACK here, and slave doesn't in npcm_i2c_irq_handle_sda()
1590 * ACK the address, we might unintentionally NACK the next in npcm_i2c_irq_handle_sda()
1653 /* A NACK has occurred */ in npcm_i2c_int_master_handler()
2138 * 9: bits per transaction (including the ack/nack) in npcm_i2c_master_xfer()