Lines Matching full:hold
34 #define CDNS_I2C_CR_HOLD BIT(4) /* Hold Bus bit */
179 * @bus_hold_flag: Flag used in repeated start for clearing HOLD bit
183 * @quirks: flag for broken hold bit usage in r1p10
232 * cdns_i2c_clear_bus_hold - Clear bus hold bit
235 * Helper to clear the controller's bus hold bit.
438 * Clear hold bit that was set for FIFO control in cdns_i2c_master_isr()
459 * register reaches zero without considering the HOLD bit. in cdns_i2c_master_isr()
488 /* Clear hold (if not repeated start) and signal completion */ in cdns_i2c_master_isr()
521 * clear the hold bus bit if there are no in cdns_i2c_master_isr()
597 * 'hold bus' bit if it is greater than FIFO depth. in cdns_i2c_mrecv()
622 /* Determine hold_clear based on number of bytes to receive and hold flag */ in cdns_i2c_mrecv()
637 * In case of Xilinx Zynq SOC, clear the HOLD bit before transfer size in cdns_i2c_mrecv()
682 * 'hold bus' bit if it is greater than FIFO depth. in cdns_i2c_msend()
711 * Clear the bus hold flag if there is no more data in cdns_i2c_msend()
727 * This function cleanup the fifos, clear the hold bit and status
737 /* Clear the hold bit and fifos */ in cdns_i2c_master_reset()
872 * master receive message if HOLD bit is set (repeated start), in cdns_i2c_master_xfer()