Lines Matching +full:cpu +full:- +full:read
1 /* SPDX-License-Identifier: GPL-2.0 */
13 * With multi cpu systems, and more additional trace sources a scalable
19 * In order to ensure that a consistent cpu / ID matching is maintained
20 * throughout a perf cs_etm event session - a session in progress flag will
22 * complete. This allows the same CPU to be re-allocated its prior ID.
28 * API permits multiple maps to be maintained - for large systems where
55 * @pend_rel_ids: CPU IDs that have been released by the trace source but not
56 * yet marked as available, to allow re-allocation to the same
57 * CPU during a perf session.
67 * Read and optionally allocate a CoreSight trace ID and associate with a CPU.
69 * Function will read the current trace ID for the associated CPU,
75 * @cpu: The CPU index to allocate for.
77 * return: CoreSight trace ID or -EINVAL if allocation impossible.
79 int coresight_trace_id_get_cpu_id(int cpu);
82 * Release an allocated trace ID associated with the CPU.
84 * This will release the CoreSight trace ID associated with the CPU,
90 * @cpu: The CPU index to release the associated trace ID.
92 void coresight_trace_id_put_cpu_id(int cpu);
95 * Read the current allocated CoreSight Trace ID value for the CPU.
97 * Fast read of the current value that does not allocate if no ID allocated
98 * for the CPU.
100 * Used in perf context where it is known that the value for the CPU will not
102 * for the CPU as a packet in the data file. IDs cannot change during a perf
108 * @cpu: The CPU index to read.
112 int coresight_trace_id_read_cpu_id(int cpu);
117 * Unconditionally allocates a Trace ID, without associating the ID with a CPU.
121 * return: Trace ID or -EINVAL if allocation is impossible.
139 * Increase the perf session reference count - called by perf when setting up
143 * associated with a CPU cannot change or be released during a perf session.