368 	unsigned int pll2;  member
1452 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1454 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
1462 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_power_down()
1465 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_power_down()
2284 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2286 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2299 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2301 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2305 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2308 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_hdmi_enable()
2767 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2769 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2781 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2784 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2788 	value = tegra_sor_readl(sor, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
2791 	tegra_sor_writel(sor, value, sor->soc->regs->pll2);  in tegra_sor_dp_enable()
3285 	.pll2 = 0x19,
3457 	.pll2 = 0x19,
3518 	.pll2 = 0x165,
3601 	.pll2 = 0x16b,