Lines Matching +full:layer +full:- +full:alpha +full:- +full:mode

1 // SPDX-License-Identifier: GPL-2.0-or-later
38 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_enable()
43 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_enable()
48 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_enable()
57 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_enable()
63 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_enable()
77 if (mixer->cfg->is_de3) { in sun8i_vi_layer_update_alpha()
81 (plane->state->alpha >> 8); in sun8i_vi_layer_update_alpha()
83 val |= (plane->state->alpha == DRM_BLEND_ALPHA_OPAQUE) ? in sun8i_vi_layer_update_alpha()
87 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_update_alpha()
91 } else if (mixer->cfg->vi_num == 1) { in sun8i_vi_layer_update_alpha()
92 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_update_alpha()
96 (plane->state->alpha >> 8)); in sun8i_vi_layer_update_alpha()
104 struct drm_plane_state *state = plane->state; in sun8i_vi_layer_update_coord()
105 const struct drm_format_info *format = state->fb->format; in sun8i_vi_layer_update_coord()
120 src_w = drm_rect_width(&state->src) >> 16; in sun8i_vi_layer_update_coord()
121 src_h = drm_rect_height(&state->src) >> 16; in sun8i_vi_layer_update_coord()
122 dst_w = drm_rect_width(&state->dst); in sun8i_vi_layer_update_coord()
123 dst_h = drm_rect_height(&state->dst); in sun8i_vi_layer_update_coord()
125 hphase = state->src.x1 & 0xffff; in sun8i_vi_layer_update_coord()
126 vphase = state->src.y1 & 0xffff; in sun8i_vi_layer_update_coord()
129 if (format->hsub > 1) { in sun8i_vi_layer_update_coord()
132 mask = format->hsub - 1; in sun8i_vi_layer_update_coord()
133 remainder = (state->src.x1 >> 16) & mask; in sun8i_vi_layer_update_coord()
138 if (format->vsub > 1) { in sun8i_vi_layer_update_coord()
141 mask = format->vsub - 1; in sun8i_vi_layer_update_coord()
142 remainder = (state->src.y1 >> 16) & mask; in sun8i_vi_layer_update_coord()
151 DRM_DEBUG_DRIVER("Layer source offset X: %d Y: %d\n", in sun8i_vi_layer_update_coord()
152 (state->src.x1 >> 16) & ~(format->hsub - 1), in sun8i_vi_layer_update_coord()
153 (state->src.y1 >> 16) & ~(format->vsub - 1)); in sun8i_vi_layer_update_coord()
154 DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h); in sun8i_vi_layer_update_coord()
155 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
158 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
166 subsampled = format->hsub > 1 || format->vsub > 1; in sun8i_vi_layer_update_coord()
170 struct drm_display_mode *mode; in sun8i_vi_layer_update_coord() local
176 mode = &plane->state->crtc->state->mode; in sun8i_vi_layer_update_coord()
177 fps = (mode->clock * 1000) / (mode->vtotal * mode->htotal); in sun8i_vi_layer_update_coord()
178 ability = clk_get_rate(mixer->mod_clk); in sun8i_vi_layer_update_coord()
181 do_div(ability, mode->vdisplay * fps * max(src_w, dst_w)); in sun8i_vi_layer_update_coord()
193 scanline = subsampled ? mixer->cfg->scanline_yuv : 2048; in sun8i_vi_layer_update_coord()
214 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
218 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
222 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
226 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
232 DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", in sun8i_vi_layer_update_coord()
233 state->dst.x1, state->dst.y1); in sun8i_vi_layer_update_coord()
234 DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); in sun8i_vi_layer_update_coord()
235 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
237 SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1)); in sun8i_vi_layer_update_coord()
238 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_coord()
247 if (!format->is_yuv) in sun8i_vi_layer_get_csc_mode()
250 switch (format->format) { in sun8i_vi_layer_get_csc_mode()
264 struct drm_plane_state *state = plane->state; in sun8i_vi_layer_update_formats()
271 fmt = state->fb->format; in sun8i_vi_layer_update_formats()
272 ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt); in sun8i_vi_layer_update_formats()
279 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_update_formats()
286 state->color_encoding, in sun8i_vi_layer_update_formats()
287 state->color_range); in sun8i_vi_layer_update_formats()
293 if (!fmt->is_yuv) in sun8i_vi_layer_update_formats()
298 regmap_update_bits(mixer->engine.regs, in sun8i_vi_layer_update_formats()
308 struct drm_plane_state *state = plane->state; in sun8i_vi_layer_update_buffer()
309 struct drm_framebuffer *fb = state->fb; in sun8i_vi_layer_update_buffer()
310 const struct drm_format_info *format = fb->format; in sun8i_vi_layer_update_buffer()
320 src_x = (state->src.x1 >> 16) & ~(format->hsub - 1); in sun8i_vi_layer_update_buffer()
321 src_y = (state->src.y1 >> 16) & ~(format->vsub - 1); in sun8i_vi_layer_update_buffer()
323 for (i = 0; i < format->num_planes; i++) { in sun8i_vi_layer_update_buffer()
327 DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); in sun8i_vi_layer_update_buffer()
330 dma_addr = gem->dma_addr + fb->offsets[i]; in sun8i_vi_layer_update_buffer()
336 dx /= format->hsub; in sun8i_vi_layer_update_buffer()
337 dy /= format->vsub; in sun8i_vi_layer_update_buffer()
341 dma_addr += dx * format->cpp[i]; in sun8i_vi_layer_update_buffer()
342 dma_addr += dy * fb->pitches[i]; in sun8i_vi_layer_update_buffer()
345 DRM_DEBUG_DRIVER("Layer %d. line width: %d bytes\n", in sun8i_vi_layer_update_buffer()
346 i + 1, fb->pitches[i]); in sun8i_vi_layer_update_buffer()
347 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_buffer()
350 fb->pitches[i]); in sun8i_vi_layer_update_buffer()
355 regmap_write(mixer->engine.regs, in sun8i_vi_layer_update_buffer()
369 struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); in sun8i_vi_layer_atomic_check() local
370 struct drm_crtc *crtc = new_plane_state->crtc; in sun8i_vi_layer_atomic_check()
380 return -EINVAL; in sun8i_vi_layer_atomic_check()
385 if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { in sun8i_vi_layer_atomic_check()
401 struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); in sun8i_vi_layer_atomic_disable() local
402 unsigned int old_zpos = old_state->normalized_zpos; in sun8i_vi_layer_atomic_disable()
403 struct sun8i_mixer *mixer = layer->mixer; in sun8i_vi_layer_atomic_disable()
405 sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, in sun8i_vi_layer_atomic_disable()
416 struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); in sun8i_vi_layer_atomic_update() local
417 unsigned int zpos = new_state->normalized_zpos; in sun8i_vi_layer_atomic_update()
418 unsigned int old_zpos = old_state->normalized_zpos; in sun8i_vi_layer_atomic_update()
419 struct sun8i_mixer *mixer = layer->mixer; in sun8i_vi_layer_atomic_update()
421 if (!new_state->visible) { in sun8i_vi_layer_atomic_update()
422 sun8i_vi_layer_enable(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
423 layer->overlay, false, 0, old_zpos); in sun8i_vi_layer_atomic_update()
427 sun8i_vi_layer_update_coord(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
428 layer->overlay, plane, zpos); in sun8i_vi_layer_atomic_update()
429 sun8i_vi_layer_update_alpha(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
430 layer->overlay, plane); in sun8i_vi_layer_atomic_update()
431 sun8i_vi_layer_update_formats(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
432 layer->overlay, plane); in sun8i_vi_layer_atomic_update()
433 sun8i_vi_layer_update_buffer(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
434 layer->overlay, plane); in sun8i_vi_layer_atomic_update()
435 sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, in sun8i_vi_layer_atomic_update()
455 * While DE2 VI layer supports same RGB formats as UI layer, alpha
457 * where alpha channel is replaced with "don't care" (X) channel.
549 struct sun8i_vi_layer *layer; in sun8i_vi_layer_init_one() local
553 layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL); in sun8i_vi_layer_init_one()
554 if (!layer) in sun8i_vi_layer_init_one()
555 return ERR_PTR(-ENOMEM); in sun8i_vi_layer_init_one()
557 if (mixer->cfg->is_de3) { in sun8i_vi_layer_init_one()
565 if (!mixer->cfg->ui_num && index == 0) in sun8i_vi_layer_init_one()
569 ret = drm_universal_plane_init(drm, &layer->plane, 0, in sun8i_vi_layer_init_one()
575 dev_err(drm->dev, "Couldn't initialize layer\n"); in sun8i_vi_layer_init_one()
579 plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num; in sun8i_vi_layer_init_one()
581 if (mixer->cfg->vi_num == 1 || mixer->cfg->is_de3) { in sun8i_vi_layer_init_one()
582 ret = drm_plane_create_alpha_property(&layer->plane); in sun8i_vi_layer_init_one()
584 dev_err(drm->dev, "Couldn't add alpha property\n"); in sun8i_vi_layer_init_one()
589 ret = drm_plane_create_zpos_property(&layer->plane, index, in sun8i_vi_layer_init_one()
590 0, plane_cnt - 1); in sun8i_vi_layer_init_one()
592 dev_err(drm->dev, "Couldn't add zpos property\n"); in sun8i_vi_layer_init_one()
598 if (mixer->cfg->is_de3) in sun8i_vi_layer_init_one()
604 ret = drm_plane_create_color_properties(&layer->plane, in sun8i_vi_layer_init_one()
610 dev_err(drm->dev, "Couldn't add encoding and range properties!\n"); in sun8i_vi_layer_init_one()
614 drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); in sun8i_vi_layer_init_one()
615 layer->mixer = mixer; in sun8i_vi_layer_init_one()
616 layer->channel = index; in sun8i_vi_layer_init_one()
617 layer->overlay = 0; in sun8i_vi_layer_init_one()
619 return layer; in sun8i_vi_layer_init_one()