Lines Matching defs:SMU7_Fusion_DpmTable
217 struct SMU7_Fusion_DpmTable struct
219 uint32_t SystemFlags;
221 SMU7_PIDController GraphicsPIDController;
222 SMU7_PIDController GioPIDController;
224 uint8_t GraphicsDpmLevelCount;
225 uint8_t GIOLevelCount;
226 uint8_t UvdLevelCount;
227 uint8_t VceLevelCount;
229 uint8_t AcpLevelCount;
230 uint8_t SamuLevelCount;
231 uint16_t FpsHighT;
233 SMU7_Fusion_GraphicsLevel GraphicsLevel [SMU__NUM_SCLK_DPM_STATE];
234 SMU7_Fusion_ACPILevel ACPILevel;
235 SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD];
236 SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE];
237 SMU7_Fusion_ExtClkLevel AcpLevel [SMU7_MAX_LEVELS_ACP];
238 SMU7_Fusion_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU];
240 uint8_t UvdBootLevel;
241 uint8_t VceBootLevel;
242 uint8_t AcpBootLevel;
243 uint8_t SamuBootLevel;
244 uint8_t UVDInterval;
245 uint8_t VCEInterval;
246 uint8_t ACPInterval;
247 uint8_t SAMUInterval;
249 uint8_t GraphicsBootLevel;
250 uint8_t GraphicsInterval;
251 uint8_t GraphicsThermThrottleEnable;
252 uint8_t GraphicsVoltageChangeEnable;
254 uint8_t GraphicsClkSlowEnable;
255 uint8_t GraphicsClkSlowDivider;
256 uint16_t FpsLowT;
258 uint32_t DisplayCac;
259 uint32_t LowSclkInterruptT;
261 uint32_t DRAM_LOG_ADDR_H;
262 uint32_t DRAM_LOG_ADDR_L;
263 uint32_t DRAM_LOG_PHY_ADDR_H;
264 uint32_t DRAM_LOG_PHY_ADDR_L;
265 uint32_t DRAM_LOG_BUFF_SIZE;
294 typedef struct SMU7_Fusion_DpmTable SMU7_Fusion_DpmTable; typedef