Lines Matching +full:mode +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
15 struct msm_drm_private *priv = encoder->dev->dev_private; in get_kms()
16 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms()
20 struct drm_display_mode *mode, in mdp5_vid_encoder_mode_set() argument
25 struct drm_device *dev = encoder->dev; in mdp5_vid_encoder_mode_set()
27 int intf = mdp5_encoder->intf->num; in mdp5_vid_encoder_mode_set()
34 mode = adjusted_mode; in mdp5_vid_encoder_mode_set()
36 DBG("set mode: " DRM_MODE_FMT, DRM_MODE_ARG(mode)); in mdp5_vid_encoder_mode_set()
40 /* DSI controller cannot handle active-low sync signals. */ in mdp5_vid_encoder_mode_set()
41 if (mdp5_encoder->intf->type != INTF_DSI) { in mdp5_vid_encoder_mode_set()
42 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in mdp5_vid_encoder_mode_set()
44 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in mdp5_vid_encoder_mode_set()
52 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { in mdp5_vid_encoder_mode_set()
53 if (connector->encoder == encoder) { in mdp5_vid_encoder_mode_set()
54 switch (connector->display_info.bpc) { in mdp5_vid_encoder_mode_set()
73 hsync_start_x = (mode->htotal - mode->hsync_start); in mdp5_vid_encoder_mode_set()
74 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; in mdp5_vid_encoder_mode_set()
76 vsync_period = mode->vtotal * mode->htotal; in mdp5_vid_encoder_mode_set()
77 vsync_len = (mode->vsync_end - mode->vsync_start) * mode->htotal; in mdp5_vid_encoder_mode_set()
78 display_v_start = (mode->vtotal - mode->vsync_start) * mode->htotal + dtv_hsync_skew; in mdp5_vid_encoder_mode_set()
79 …display_v_end = vsync_period - ((mode->vsync_start - mode->vdisplay) * mode->htotal) + dtv_hsync_s… in mdp5_vid_encoder_mode_set()
84 * DISPLAY_V_END = (VBP + VACTIVE) * HCYCLE - 1 - HFP in mdp5_vid_encoder_mode_set()
86 if (mdp5_encoder->intf->type == INTF_eDP) { in mdp5_vid_encoder_mode_set()
87 display_v_start += mode->htotal - mode->hsync_start; in mdp5_vid_encoder_mode_set()
88 display_v_end -= mode->hsync_start - mode->hdisplay; in mdp5_vid_encoder_mode_set()
91 spin_lock_irqsave(&mdp5_encoder->intf_lock, flags); in mdp5_vid_encoder_mode_set()
94 MDP5_INTF_HSYNC_CTL_PULSEW(mode->hsync_end - mode->hsync_start) | in mdp5_vid_encoder_mode_set()
95 MDP5_INTF_HSYNC_CTL_PERIOD(mode->htotal)); in mdp5_vid_encoder_mode_set()
115 spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags); in mdp5_vid_encoder_mode_set()
117 mdp5_crtc_set_pipeline(encoder->crtc); in mdp5_vid_encoder_mode_set()
124 struct mdp5_ctl *ctl = mdp5_encoder->ctl; in mdp5_vid_encoder_disable()
125 struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); in mdp5_vid_encoder_disable()
126 struct mdp5_hw_mixer *mixer = mdp5_crtc_get_mixer(encoder->crtc); in mdp5_vid_encoder_disable()
127 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_vid_encoder_disable()
128 int intfn = mdp5_encoder->intf->num; in mdp5_vid_encoder_disable()
131 if (WARN_ON(!mdp5_encoder->enabled)) in mdp5_vid_encoder_disable()
136 spin_lock_irqsave(&mdp5_encoder->intf_lock, flags); in mdp5_vid_encoder_disable()
138 spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags); in mdp5_vid_encoder_disable()
144 * otherwise we end up in a funny state if we re-enable in mdp5_vid_encoder_disable()
149 mdp_irq_wait(&mdp5_kms->base, intf2vblank(mixer, intf)); in mdp5_vid_encoder_disable()
151 mdp5_encoder->enabled = false; in mdp5_vid_encoder_disable()
158 struct mdp5_ctl *ctl = mdp5_encoder->ctl; in mdp5_vid_encoder_enable()
159 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_vid_encoder_enable()
160 struct mdp5_pipeline *pipeline = mdp5_crtc_get_pipeline(encoder->crtc); in mdp5_vid_encoder_enable()
161 int intfn = intf->num; in mdp5_vid_encoder_enable()
164 if (WARN_ON(mdp5_encoder->enabled)) in mdp5_vid_encoder_enable()
167 spin_lock_irqsave(&mdp5_encoder->intf_lock, flags); in mdp5_vid_encoder_enable()
169 spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags); in mdp5_vid_encoder_enable()
174 mdp5_encoder->enabled = true; in mdp5_vid_encoder_enable()
178 struct drm_display_mode *mode, in mdp5_encoder_mode_set() argument
182 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_encoder_mode_set()
184 if (intf->mode == MDP5_INTF_DSI_MODE_COMMAND) in mdp5_encoder_mode_set()
185 mdp5_cmd_encoder_mode_set(encoder, mode, adjusted_mode); in mdp5_encoder_mode_set()
187 mdp5_vid_encoder_mode_set(encoder, mode, adjusted_mode); in mdp5_encoder_mode_set()
193 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_encoder_disable()
195 if (intf->mode == MDP5_INTF_DSI_MODE_COMMAND) in mdp5_encoder_disable()
204 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_encoder_enable()
206 struct drm_crtc_state *cstate = encoder->crtc->state; in mdp5_encoder_enable()
208 mdp5_encoder_mode_set(encoder, &cstate->mode, &cstate->adjusted_mode); in mdp5_encoder_enable()
210 if (intf->mode == MDP5_INTF_DSI_MODE_COMMAND) in mdp5_encoder_enable()
222 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_encoder_atomic_check()
223 struct mdp5_ctl *ctl = mdp5_encoder->ctl; in mdp5_encoder_atomic_check()
225 mdp5_cstate->ctl = ctl; in mdp5_encoder_atomic_check()
226 mdp5_cstate->pipeline.intf = intf; in mdp5_encoder_atomic_check()
230 * START bit at most once for an atomic update. In the non-full- in mdp5_encoder_atomic_check()
231 * modeset case, this is done from crtc->atomic_flush(), but that in mdp5_encoder_atomic_check()
233 * defer to encoder->enable(). But we need to *know* whether in mdp5_encoder_atomic_check()
234 * encoder->enable() will be called to do this: in mdp5_encoder_atomic_check()
237 mdp5_cstate->defer_start = true; in mdp5_encoder_atomic_check()
252 int intf = mdp5_encoder->intf->num; in mdp5_encoder_get_linecount()
261 int intf = mdp5_encoder->intf->num; in mdp5_encoder_get_framecount()
277 return -EINVAL; in mdp5_vid_encoder_set_split_display()
280 intf_num = mdp5_encoder->intf->num; in mdp5_vid_encoder_set_split_display()
282 /* Switch slave encoder's TimingGen Sync mode, in mdp5_vid_encoder_set_split_display()
290 return -EINVAL; in mdp5_vid_encoder_set_split_display()
292 dev = &mdp5_kms->pdev->dev; in mdp5_vid_encoder_set_split_display()
296 /* Dumb Panel, Sync mode */ in mdp5_vid_encoder_set_split_display()
301 mdp5_ctl_pair(mdp5_encoder->ctl, mdp5_slave_enc->ctl, true); in mdp5_vid_encoder_set_split_display()
311 struct mdp5_interface *intf = mdp5_encoder->intf; in mdp5_encoder_set_intf_mode()
315 WARN_ON(intf->type != INTF_DSI); in mdp5_encoder_set_intf_mode()
316 intf->mode = MDP5_INTF_DSI_MODE_COMMAND; in mdp5_encoder_set_intf_mode()
318 if (intf->type == INTF_DSI) in mdp5_encoder_set_intf_mode()
319 intf->mode = MDP5_INTF_DSI_MODE_VIDEO; in mdp5_encoder_set_intf_mode()
321 intf->mode = MDP5_INTF_MODE_NONE; in mdp5_encoder_set_intf_mode()
332 int enc_type = (intf->type == INTF_DSI) ? in mdp5_encoder_init()
340 encoder = &mdp5_encoder->base; in mdp5_encoder_init()
341 mdp5_encoder->ctl = ctl; in mdp5_encoder_init()
342 mdp5_encoder->intf = intf; in mdp5_encoder_init()
344 spin_lock_init(&mdp5_encoder->intf_lock); in mdp5_encoder_init()