237 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_get_crc_values_cnt()  local
239 		if (phys->hw_intf && phys->hw_intf->ops.setup_misr  in dpu_encoder_get_crc_values_cnt()
240 				&& phys->hw_intf->ops.collect_misr)  in dpu_encoder_get_crc_values_cnt()
256 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_setup_misr()  local
258 		if (!phys->hw_intf || !phys->hw_intf->ops.setup_misr)  in dpu_encoder_setup_misr()
261 		phys->hw_intf->ops.setup_misr(phys->hw_intf);  in dpu_encoder_setup_misr()
279 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_get_crc()  local
281 		if (!phys->hw_intf || !phys->hw_intf->ops.collect_misr)  in dpu_encoder_get_crc()
284 		rc = phys->hw_intf->ops.collect_misr(phys->hw_intf, &crcs[pos + entries_added]);  in dpu_encoder_get_crc()
426 	struct dpu_encoder_phys *phys = dpu_enc ? dpu_enc->cur_master : NULL;  in dpu_encoder_get_vsync_count()  local
427 	return phys ? atomic_read(&phys->vsync_cnt) : 0;  in dpu_encoder_get_vsync_count()
433 	struct dpu_encoder_phys *phys;  in dpu_encoder_get_linecount()  local
437 	phys = dpu_enc ? dpu_enc->cur_master : NULL;  in dpu_encoder_get_linecount()
439 	if (phys && phys->ops.get_line_count)  in dpu_encoder_get_linecount()
440 		linecount = phys->ops.get_line_count(phys);  in dpu_encoder_get_linecount()
610 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_virt_atomic_check()  local
612 		if (phys->ops.atomic_check)  in dpu_encoder_virt_atomic_check()
613 			ret = phys->ops.atomic_check(phys, crtc_state,  in dpu_encoder_virt_atomic_check()
617 					"mode unsupported, phys idx %d\n", i);  in dpu_encoder_virt_atomic_check()
675 		DPU_ERROR("invalid num phys enc %d/%d\n",  in _dpu_encoder_update_vsync_source()
731 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in _dpu_encoder_irq_control()  local
733 		if (phys->ops.irq_control)  in _dpu_encoder_irq_control()
734 			phys->ops.irq_control(phys, enable);  in _dpu_encoder_irq_control()
994 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_prepare_wb_job()  local
996 		if (phys->ops.prepare_wb_job)  in dpu_encoder_prepare_wb_job()
997 			phys->ops.prepare_wb_job(phys, job);  in dpu_encoder_prepare_wb_job()
1011 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_cleanup_wb_job()  local
1013 		if (phys->ops.cleanup_wb_job)  in dpu_encoder_cleanup_wb_job()
1014 			phys->ops.cleanup_wb_job(phys, job);  in dpu_encoder_cleanup_wb_job()
1106 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_virt_atomic_mode_set()  local
1120 		phys->hw_pp = dpu_enc->hw_pp[i];  in dpu_encoder_virt_atomic_mode_set()
1121 		phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]);  in dpu_encoder_virt_atomic_mode_set()
1123 		phys->cached_mode = crtc_state->adjusted_mode;  in dpu_encoder_virt_atomic_mode_set()
1124 		if (phys->ops.atomic_mode_set)  in dpu_encoder_virt_atomic_mode_set()
1125 			phys->ops.atomic_mode_set(phys, crtc_state, conn_state);  in dpu_encoder_virt_atomic_mode_set()
1269 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_virt_atomic_disable()  local
1271 		if (phys->ops.disable)  in dpu_encoder_virt_atomic_disable()
1272 			phys->ops.disable(phys);  in dpu_encoder_virt_atomic_disable()
1276 	/* after phys waits for frame-done, should be no more frames pending */  in dpu_encoder_virt_atomic_disable()
1379 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_toggle_vblank_for_crtc()  local
1381 		if (phys->ops.control_vblank_irq)  in dpu_encoder_toggle_vblank_for_crtc()
1382 			phys->ops.control_vblank_irq(phys, enable);  in dpu_encoder_toggle_vblank_for_crtc()
1474  * @phys: Pointer to physical encoder structure
1478 		struct dpu_encoder_phys *phys, uint32_t extra_flush_bits)  in _dpu_encoder_trigger_flush()  argument
1484 	if (!phys->hw_pp) {  in _dpu_encoder_trigger_flush()
1489 	ctl = phys->hw_ctl;  in _dpu_encoder_trigger_flush()
1495 	pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys);  in _dpu_encoder_trigger_flush()
1506 			dpu_encoder_helper_get_intf_type(phys->intf_mode),  in _dpu_encoder_trigger_flush()
1507 			phys->hw_intf ? phys->hw_intf->idx : -1,  in _dpu_encoder_trigger_flush()
1508 			phys->hw_wb ? phys->hw_wb->idx : -1,  in _dpu_encoder_trigger_flush()
1515  * @phys: Pointer to physical encoder structure
1517 static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys)  in _dpu_encoder_trigger_start()  argument
1519 	if (!phys) {  in _dpu_encoder_trigger_start()
1524 	if (!phys->hw_pp) {  in _dpu_encoder_trigger_start()
1529 	if (phys->ops.trigger_start && phys->enable_state != DPU_ENC_DISABLED)  in _dpu_encoder_trigger_start()
1530 		phys->ops.trigger_start(phys);  in _dpu_encoder_trigger_start()
1619 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in _dpu_encoder_kickoff_phys()  local
1621 		if (phys->enable_state == DPU_ENC_DISABLED)  in _dpu_encoder_kickoff_phys()
1624 		ctl = phys->hw_ctl;  in _dpu_encoder_kickoff_phys()
1631 		if (phys->split_role != ENC_ROLE_SLAVE)  in _dpu_encoder_kickoff_phys()
1634 		if (!phys->ops.needs_single_flush ||  in _dpu_encoder_kickoff_phys()
1635 				!phys->ops.needs_single_flush(phys))  in _dpu_encoder_kickoff_phys()
1636 			_dpu_encoder_trigger_flush(&dpu_enc->base, phys, 0x0);  in _dpu_encoder_kickoff_phys()
1657 	struct dpu_encoder_phys *phys;  in dpu_encoder_trigger_kickoff_pending()  local
1670 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_trigger_kickoff_pending()
1672 		ctl = phys->hw_ctl;  in dpu_encoder_trigger_kickoff_pending()
1677 		if ((phys == dpu_enc->cur_master) &&  in dpu_encoder_trigger_kickoff_pending()
1878 	struct dpu_encoder_phys *phys;  in dpu_encoder_prepare_for_kickoff()  local
1889 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_prepare_for_kickoff()
1890 		if (phys->ops.prepare_for_kickoff)  in dpu_encoder_prepare_for_kickoff()
1891 			phys->ops.prepare_for_kickoff(phys);  in dpu_encoder_prepare_for_kickoff()
1892 		if (phys->enable_state == DPU_ENC_ERR_NEEDS_HW_RESET)  in dpu_encoder_prepare_for_kickoff()
1899 	/* if any phys needs reset, reset all phys, in-order */  in dpu_encoder_prepare_for_kickoff()
1915 	struct dpu_encoder_phys *phys;  in dpu_encoder_is_valid_for_commit()  local
1921 			phys = dpu_enc->phys_encs[i];  in dpu_encoder_is_valid_for_commit()
1922 			if (phys->ops.is_valid_for_commit && !phys->ops.is_valid_for_commit(phys)) {  in dpu_encoder_is_valid_for_commit()
1935 	struct dpu_encoder_phys *phys;  in dpu_encoder_kickoff()  local
1951 	/* All phys encs are ready to go, trigger the kickoff */  in dpu_encoder_kickoff()
1954 	/* allow phys encs to handle any post-kickoff business */  in dpu_encoder_kickoff()
1956 		phys = dpu_enc->phys_encs[i];  in dpu_encoder_kickoff()
1957 		if (phys->ops.handle_post_kickoff)  in dpu_encoder_kickoff()
1958 			phys->ops.handle_post_kickoff(phys);  in dpu_encoder_kickoff()
2046 	 * to be done per phys encoder into the phys_disable() op.  in dpu_encoder_helper_phys_cleanup()
2122 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in _dpu_encoder_status_show()  local
2125 				phys->hw_intf ? phys->hw_intf->idx - INTF_0 : -1,  in _dpu_encoder_status_show()
2126 				phys->hw_wb ? phys->hw_wb->idx - WB_0 : -1,  in _dpu_encoder_status_show()
2127 				atomic_read(&phys->vsync_cnt),  in _dpu_encoder_status_show()
2128 				atomic_read(&phys->underrun_cnt),  in _dpu_encoder_status_show()
2131 		seq_printf(s, "mode: %s\n", dpu_encoder_helper_get_intf_type(phys->intf_mode));  in _dpu_encoder_status_show()
2279 					"invalid phys both intf and wb block at idx: %d\n", i);  in dpu_encoder_setup_display()
2287 			DPU_ERROR_ENC(dpu_enc, "failed to add phys encs\n");  in dpu_encoder_setup_display()
2397 		struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];  in dpu_encoder_wait_for_event()  local
2401 			fn_wait = phys->ops.wait_for_commit_done;  in dpu_encoder_wait_for_event()
2404 			fn_wait = phys->ops.wait_for_tx_complete;  in dpu_encoder_wait_for_event()
2414 			ret = fn_wait(phys);  in dpu_encoder_wait_for_event()