1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
11 #include <linux/soc/mediatek/mtk-cmdq.h>
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
29  * struct mtk_drm_crtc - MediaTek specific crtc structure.
95 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_drm_crtc_finish_page_flip()
98 	spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_finish_page_flip()
99 	drm_crtc_send_vblank_event(crtc, mtk_crtc->event);  in mtk_drm_crtc_finish_page_flip()
101 	mtk_crtc->event = NULL;  in mtk_drm_crtc_finish_page_flip()
102 	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_finish_page_flip()
107 	drm_crtc_handle_vblank(&mtk_crtc->base);  in mtk_drm_finish_page_flip()
108 	if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {  in mtk_drm_finish_page_flip()
110 		mtk_crtc->pending_needs_vblank = false;  in mtk_drm_finish_page_flip()
121 	pkt->va_base = kzalloc(size, GFP_KERNEL);  in mtk_drm_cmdq_pkt_create()
122 	if (!pkt->va_base)  in mtk_drm_cmdq_pkt_create()
123 		return -ENOMEM;  in mtk_drm_cmdq_pkt_create()
125 	pkt->buf_size = size;  in mtk_drm_cmdq_pkt_create()
126 	pkt->cl = (void *)client;  in mtk_drm_cmdq_pkt_create()
128 	dev = client->chan->mbox->dev;  in mtk_drm_cmdq_pkt_create()
129 	dma_addr = dma_map_single(dev, pkt->va_base, pkt->buf_size,  in mtk_drm_cmdq_pkt_create()
133 		kfree(pkt->va_base);  in mtk_drm_cmdq_pkt_create()
134 		return -ENOMEM;  in mtk_drm_cmdq_pkt_create()
137 	pkt->pa_base = dma_addr;  in mtk_drm_cmdq_pkt_create()
144 	struct cmdq_client *client = (struct cmdq_client *)pkt->cl;  in mtk_drm_cmdq_pkt_destroy()
146 	dma_unmap_single(client->chan->mbox->dev, pkt->pa_base, pkt->buf_size,  in mtk_drm_cmdq_pkt_destroy()
148 	kfree(pkt->va_base);  in mtk_drm_cmdq_pkt_destroy()
157 	mtk_mutex_put(mtk_crtc->mutex);  in mtk_drm_crtc_destroy()
159 	mtk_drm_cmdq_pkt_destroy(&mtk_crtc->cmdq_handle);  in mtk_drm_crtc_destroy()
161 	if (mtk_crtc->cmdq_client.chan) {  in mtk_drm_crtc_destroy()
162 		mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_drm_crtc_destroy()
163 		mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_destroy()
167 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_destroy()
170 		comp = mtk_crtc->ddp_comp[i];  in mtk_drm_crtc_destroy()
181 	if (crtc->state)  in mtk_drm_crtc_reset()
182 		__drm_atomic_helper_crtc_destroy_state(crtc->state);  in mtk_drm_crtc_reset()
184 	kfree(to_mtk_crtc_state(crtc->state));  in mtk_drm_crtc_reset()
185 	crtc->state = NULL;  in mtk_drm_crtc_reset()
189 		__drm_atomic_helper_crtc_reset(crtc, &state->base);  in mtk_drm_crtc_reset()
200 	__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);  in mtk_drm_crtc_duplicate_state()
202 	WARN_ON(state->base.crtc != crtc);  in mtk_drm_crtc_duplicate_state()
203 	state->base.crtc = crtc;  in mtk_drm_crtc_duplicate_state()
204 	state->pending_config = false;  in mtk_drm_crtc_duplicate_state()
206 	return &state->base;  in mtk_drm_crtc_duplicate_state()
226 	struct mtk_crtc_state *state = to_mtk_crtc_state(crtc->state);  in mtk_drm_crtc_mode_set_nofb()
228 	state->pending_width = crtc->mode.hdisplay;  in mtk_drm_crtc_mode_set_nofb()
229 	state->pending_height = crtc->mode.vdisplay;  in mtk_drm_crtc_mode_set_nofb()
230 	state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode);  in mtk_drm_crtc_mode_set_nofb()
232 	state->pending_config = true;  in mtk_drm_crtc_mode_set_nofb()
240 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_clk_enable()
241 		ret = mtk_ddp_comp_clk_enable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
250 	while (--i >= 0)  in mtk_crtc_ddp_clk_enable()
251 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_enable()
259 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_clk_disable()
260 		mtk_ddp_comp_clk_disable(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_clk_disable()
271 	unsigned int local_index = plane - mtk_crtc->planes;  in mtk_drm_ddp_comp_for_plane()
273 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_ddp_comp_for_plane()
274 		comp = mtk_crtc->ddp_comp[i];  in mtk_drm_ddp_comp_for_plane()
276 			*local_layer = local_index - count;  in mtk_drm_ddp_comp_for_plane()
282 	WARN(1, "Failed to find component for plane %d\n", plane->index);  in mtk_drm_ddp_comp_for_plane()
295 	if (data->sta < 0)  in ddp_cmdq_cb()
298 	state = to_mtk_crtc_state(mtk_crtc->base.state);  in ddp_cmdq_cb()
300 	state->pending_config = false;  in ddp_cmdq_cb()
302 	if (mtk_crtc->pending_planes) {  in ddp_cmdq_cb()
303 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in ddp_cmdq_cb()
304 			struct drm_plane *plane = &mtk_crtc->planes[i];  in ddp_cmdq_cb()
307 			plane_state = to_mtk_plane_state(plane->state);  in ddp_cmdq_cb()
309 			plane_state->pending.config = false;  in ddp_cmdq_cb()
311 		mtk_crtc->pending_planes = false;  in ddp_cmdq_cb()
314 	if (mtk_crtc->pending_async_planes) {  in ddp_cmdq_cb()
315 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in ddp_cmdq_cb()
316 			struct drm_plane *plane = &mtk_crtc->planes[i];  in ddp_cmdq_cb()
319 			plane_state = to_mtk_plane_state(plane->state);  in ddp_cmdq_cb()
321 			plane_state->pending.async_config = false;  in ddp_cmdq_cb()
323 		mtk_crtc->pending_async_planes = false;  in ddp_cmdq_cb()
326 	mtk_crtc->cmdq_vblank_cnt = 0;  in ddp_cmdq_cb()
327 	wake_up(&mtk_crtc->cb_blocking_queue);  in ddp_cmdq_cb()
333 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_init()
341 	if (WARN_ON(!crtc->state))  in mtk_crtc_ddp_hw_init()
342 		return -EINVAL;  in mtk_crtc_ddp_hw_init()
344 	width = crtc->state->adjusted_mode.hdisplay;  in mtk_crtc_ddp_hw_init()
345 	height = crtc->state->adjusted_mode.vdisplay;  in mtk_crtc_ddp_hw_init()
346 	vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode);  in mtk_crtc_ddp_hw_init()
348 	drm_for_each_encoder(encoder, crtc->dev) {  in mtk_crtc_ddp_hw_init()
349 		if (encoder->crtc != crtc)  in mtk_crtc_ddp_hw_init()
352 		drm_connector_list_iter_begin(crtc->dev, &conn_iter);  in mtk_crtc_ddp_hw_init()
354 			if (connector->encoder != encoder)  in mtk_crtc_ddp_hw_init()
356 			if (connector->display_info.bpc != 0 &&  in mtk_crtc_ddp_hw_init()
357 			    bpc > connector->display_info.bpc)  in mtk_crtc_ddp_hw_init()
358 				bpc = connector->display_info.bpc;  in mtk_crtc_ddp_hw_init()
363 	ret = pm_runtime_resume_and_get(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
369 	ret = mtk_mutex_prepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
381 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_init()
382 		if (!mtk_ddp_comp_connect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_init()
383 					  mtk_crtc->ddp_comp[i + 1]->id))  in mtk_crtc_ddp_hw_init()
384 			mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_init()
385 					      mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_init()
386 					      mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_init()
387 		if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_init()
388 			mtk_mutex_add_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_init()
389 					   mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
391 	if (!mtk_ddp_comp_add(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_init()
392 		mtk_mutex_add_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_init()
393 	mtk_mutex_enable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
395 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_init()
396 		struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i];  in mtk_crtc_ddp_hw_init()
406 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_hw_init()
407 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_hw_init()
412 		plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_hw_init()
415 		plane_state->pending.enable = false;  in mtk_crtc_ddp_hw_init()
425 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_init()
427 	pm_runtime_put(crtc->dev->dev);  in mtk_crtc_ddp_hw_init()
433 	struct drm_device *drm = mtk_crtc->base.dev;  in mtk_crtc_ddp_hw_fini()
434 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_crtc_ddp_hw_fini()
437 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_crtc_ddp_hw_fini()
438 		mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
440 			mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]);  in mtk_crtc_ddp_hw_fini()
443 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_crtc_ddp_hw_fini()
444 		if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_fini()
445 			mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
446 					      mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
447 	mtk_mutex_disable(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
448 	for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {  in mtk_crtc_ddp_hw_fini()
449 		if (!mtk_ddp_comp_disconnect(mtk_crtc->ddp_comp[i], mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_fini()
450 					     mtk_crtc->ddp_comp[i + 1]->id))  in mtk_crtc_ddp_hw_fini()
451 			mtk_mmsys_ddp_disconnect(mtk_crtc->mmsys_dev,  in mtk_crtc_ddp_hw_fini()
452 						 mtk_crtc->ddp_comp[i]->id,  in mtk_crtc_ddp_hw_fini()
453 						 mtk_crtc->ddp_comp[i + 1]->id);  in mtk_crtc_ddp_hw_fini()
454 		if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_fini()
455 			mtk_mutex_remove_comp(mtk_crtc->mutex,  in mtk_crtc_ddp_hw_fini()
456 					      mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
458 	if (!mtk_ddp_comp_remove(mtk_crtc->ddp_comp[i], mtk_crtc->mutex))  in mtk_crtc_ddp_hw_fini()
459 		mtk_mutex_remove_comp(mtk_crtc->mutex, mtk_crtc->ddp_comp[i]->id);  in mtk_crtc_ddp_hw_fini()
461 	mtk_mutex_unprepare(mtk_crtc->mutex);  in mtk_crtc_ddp_hw_fini()
463 	pm_runtime_put(drm->dev);  in mtk_crtc_ddp_hw_fini()
465 	if (crtc->state->event && !crtc->state->active) {  in mtk_crtc_ddp_hw_fini()
466 		spin_lock_irq(&crtc->dev->event_lock);  in mtk_crtc_ddp_hw_fini()
467 		drm_crtc_send_vblank_event(crtc, crtc->state->event);  in mtk_crtc_ddp_hw_fini()
468 		crtc->state->event = NULL;  in mtk_crtc_ddp_hw_fini()
469 		spin_unlock_irq(&crtc->dev->event_lock);  in mtk_crtc_ddp_hw_fini()
477 	struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state);  in mtk_crtc_ddp_config()
478 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_crtc_ddp_config()
487 	if (state->pending_config) {  in mtk_crtc_ddp_config()
488 		mtk_ddp_comp_config(comp, state->pending_width,  in mtk_crtc_ddp_config()
489 				    state->pending_height,  in mtk_crtc_ddp_config()
490 				    state->pending_vrefresh, 0,  in mtk_crtc_ddp_config()
494 			state->pending_config = false;  in mtk_crtc_ddp_config()
497 	if (mtk_crtc->pending_planes) {  in mtk_crtc_ddp_config()
498 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
499 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
502 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
504 			if (!plane_state->pending.config)  in mtk_crtc_ddp_config()
515 				plane_state->pending.config = false;  in mtk_crtc_ddp_config()
519 			mtk_crtc->pending_planes = false;  in mtk_crtc_ddp_config()
522 	if (mtk_crtc->pending_async_planes) {  in mtk_crtc_ddp_config()
523 		for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_crtc_ddp_config()
524 			struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_crtc_ddp_config()
527 			plane_state = to_mtk_plane_state(plane->state);  in mtk_crtc_ddp_config()
529 			if (!plane_state->pending.async_config)  in mtk_crtc_ddp_config()
540 				plane_state->pending.async_config = false;  in mtk_crtc_ddp_config()
544 			mtk_crtc->pending_async_planes = false;  in mtk_crtc_ddp_config()
552 	struct cmdq_pkt *cmdq_handle = &mtk_crtc->cmdq_handle;  in mtk_drm_crtc_update_config()
554 	struct drm_crtc *crtc = &mtk_crtc->base;  in mtk_drm_crtc_update_config()
555 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_drm_crtc_update_config()
559 	mutex_lock(&mtk_crtc->hw_lock);  in mtk_drm_crtc_update_config()
560 	mtk_crtc->config_updating = true;  in mtk_drm_crtc_update_config()
562 		mtk_crtc->pending_needs_vblank = true;  in mtk_drm_crtc_update_config()
564 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_update_config()
565 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_drm_crtc_update_config()
568 		plane_state = to_mtk_plane_state(plane->state);  in mtk_drm_crtc_update_config()
569 		if (plane_state->pending.dirty) {  in mtk_drm_crtc_update_config()
570 			plane_state->pending.config = true;  in mtk_drm_crtc_update_config()
571 			plane_state->pending.dirty = false;  in mtk_drm_crtc_update_config()
573 		} else if (plane_state->pending.async_dirty) {  in mtk_drm_crtc_update_config()
574 			plane_state->pending.async_config = true;  in mtk_drm_crtc_update_config()
575 			plane_state->pending.async_dirty = false;  in mtk_drm_crtc_update_config()
580 		mtk_crtc->pending_planes = true;  in mtk_drm_crtc_update_config()
582 		mtk_crtc->pending_async_planes = true;  in mtk_drm_crtc_update_config()
584 	if (priv->data->shadow_register) {  in mtk_drm_crtc_update_config()
585 		mtk_mutex_acquire(mtk_crtc->mutex);  in mtk_drm_crtc_update_config()
587 		mtk_mutex_release(mtk_crtc->mutex);  in mtk_drm_crtc_update_config()
590 	if (mtk_crtc->cmdq_client.chan) {  in mtk_drm_crtc_update_config()
591 		mbox_flush(mtk_crtc->cmdq_client.chan, 2000);  in mtk_drm_crtc_update_config()
592 		cmdq_handle->cmd_buf_size = 0;  in mtk_drm_crtc_update_config()
593 		cmdq_pkt_clear_event(cmdq_handle, mtk_crtc->cmdq_event);  in mtk_drm_crtc_update_config()
594 		cmdq_pkt_wfe(cmdq_handle, mtk_crtc->cmdq_event, false);  in mtk_drm_crtc_update_config()
597 		dma_sync_single_for_device(mtk_crtc->cmdq_client.chan->mbox->dev,  in mtk_drm_crtc_update_config()
598 					   cmdq_handle->pa_base,  in mtk_drm_crtc_update_config()
599 					   cmdq_handle->cmd_buf_size,  in mtk_drm_crtc_update_config()
608 		mtk_crtc->cmdq_vblank_cnt = 3;  in mtk_drm_crtc_update_config()
610 		mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle);  in mtk_drm_crtc_update_config()
611 		mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0);  in mtk_drm_crtc_update_config()
614 	mtk_crtc->config_updating = false;  in mtk_drm_crtc_update_config()
615 	mutex_unlock(&mtk_crtc->hw_lock);  in mtk_drm_crtc_update_config()
622 	struct mtk_drm_private *priv = crtc->dev->dev_private;  in mtk_crtc_ddp_irq()
625 	if (!priv->data->shadow_register && !mtk_crtc->cmdq_client.chan)  in mtk_crtc_ddp_irq()
627 	else if (mtk_crtc->cmdq_vblank_cnt > 0 && --mtk_crtc->cmdq_vblank_cnt == 0)  in mtk_crtc_ddp_irq()
629 			  drm_crtc_index(&mtk_crtc->base));  in mtk_crtc_ddp_irq()
631 	if (!priv->data->shadow_register)  in mtk_crtc_ddp_irq()
640 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_enable_vblank()
650 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_disable_vblank()
661 	struct drm_crtc_state *crtc_state = state->crtcs[crtc_index].new_state;  in mtk_drm_crtc_update_output()
664 	unsigned int encoder_mask = crtc_state->encoder_mask;  in mtk_drm_crtc_update_output()
666 	if (!crtc_state->connectors_changed)  in mtk_drm_crtc_update_output()
669 	if (!mtk_crtc->num_conn_routes)  in mtk_drm_crtc_update_output()
672 	priv = ((struct mtk_drm_private *)crtc->dev->dev_private)->all_drm_private[crtc_index];  in mtk_drm_crtc_update_output()
673 	dev = priv->dev;  in mtk_drm_crtc_update_output()
676 		crtc_state->connectors_changed, encoder_mask, crtc_index);  in mtk_drm_crtc_update_output()
678 	for (i = 0; i < mtk_crtc->num_conn_routes; i++) {  in mtk_drm_crtc_update_output()
679 		unsigned int comp_id = mtk_crtc->conn_routes[i].route_ddp;  in mtk_drm_crtc_update_output()
680 		struct mtk_ddp_comp *comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_update_output()
682 		if (comp->encoder_index >= 0 &&  in mtk_drm_crtc_update_output()
683 		    (encoder_mask & BIT(comp->encoder_index))) {  in mtk_drm_crtc_update_output()
684 			mtk_crtc->ddp_comp[mtk_crtc->ddp_comp_nr - 1] = comp;  in mtk_drm_crtc_update_output()
686 				comp->id, mtk_crtc->ddp_comp_nr - 1);  in mtk_drm_crtc_update_output()
709 	if (!mtk_crtc->enabled)  in mtk_drm_crtc_async_update()
719 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_atomic_enable()
722 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_drm_crtc_atomic_enable()
726 		DRM_DEV_ERROR(comp->dev, "Failed to enable power domain: %d\n", ret);  in mtk_drm_crtc_atomic_enable()
739 	mtk_crtc->enabled = true;  in mtk_drm_crtc_atomic_enable()
746 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0];  in mtk_drm_crtc_atomic_disable()
749 	DRM_DEBUG_DRIVER("%s %d\n", __func__, crtc->base.id);  in mtk_drm_crtc_atomic_disable()
750 	if (!mtk_crtc->enabled)  in mtk_drm_crtc_atomic_disable()
754 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_atomic_disable()
755 		struct drm_plane *plane = &mtk_crtc->planes[i];  in mtk_drm_crtc_atomic_disable()
758 		plane_state = to_mtk_plane_state(plane->state);  in mtk_drm_crtc_atomic_disable()
759 		plane_state->pending.enable = false;  in mtk_drm_crtc_atomic_disable()
760 		plane_state->pending.config = true;  in mtk_drm_crtc_atomic_disable()
762 	mtk_crtc->pending_planes = true;  in mtk_drm_crtc_atomic_disable()
767 	if (mtk_crtc->cmdq_client.chan)  in mtk_drm_crtc_atomic_disable()
768 		wait_event_timeout(mtk_crtc->cb_blocking_queue,  in mtk_drm_crtc_atomic_disable()
769 				   mtk_crtc->cmdq_vblank_cnt == 0,  in mtk_drm_crtc_atomic_disable()
779 	mtk_crtc->enabled = false;  in mtk_drm_crtc_atomic_disable()
791 	if (mtk_crtc->event && mtk_crtc_state->base.event)  in mtk_drm_crtc_atomic_begin()
794 	if (mtk_crtc_state->base.event) {  in mtk_drm_crtc_atomic_begin()
795 		mtk_crtc_state->base.event->pipe = drm_crtc_index(crtc);  in mtk_drm_crtc_atomic_begin()
798 		spin_lock_irqsave(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_atomic_begin()
799 		mtk_crtc->event = mtk_crtc_state->base.event;  in mtk_drm_crtc_atomic_begin()
800 		spin_unlock_irqrestore(&crtc->dev->event_lock, flags);  in mtk_drm_crtc_atomic_begin()
802 		mtk_crtc_state->base.event = NULL;  in mtk_drm_crtc_atomic_begin()
812 	if (crtc->state->color_mgmt_changed)  in mtk_drm_crtc_atomic_flush()
813 		for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_atomic_flush()
814 			mtk_ddp_gamma_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_drm_crtc_atomic_flush()
815 			mtk_ddp_ctm_set(mtk_crtc->ddp_comp[i], crtc->state);  in mtk_drm_crtc_atomic_flush()
817 	mtk_drm_crtc_update_config(mtk_crtc, !!mtk_crtc->event);  in mtk_drm_crtc_atomic_flush()
848 	for (i = 0; i < mtk_crtc->layer_nr; i++) {  in mtk_drm_crtc_init()
849 		if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_PRIMARY)  in mtk_drm_crtc_init()
850 			primary = &mtk_crtc->planes[i];  in mtk_drm_crtc_init()
851 		else if (mtk_crtc->planes[i].type == DRM_PLANE_TYPE_CURSOR)  in mtk_drm_crtc_init()
852 			cursor = &mtk_crtc->planes[i];  in mtk_drm_crtc_init()
855 	ret = drm_crtc_init_with_planes(drm, &mtk_crtc->base, primary, cursor,  in mtk_drm_crtc_init()
860 	drm_crtc_helper_add(&mtk_crtc->base, &mtk_crtc_helper_funcs);  in mtk_drm_crtc_init()
865 	drm_crtc_cleanup(&mtk_crtc->base);  in mtk_drm_crtc_init()
877 	comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_drm_crtc_num_comp_planes()
878 	if (!comp->funcs)  in mtk_drm_crtc_num_comp_planes()
881 	if (comp_idx == 1 && !comp->funcs->bgclr_in_on)  in mtk_drm_crtc_num_comp_planes()
893 	else if (plane_idx == (num_planes - 1))  in mtk_drm_crtc_plane_type()
905 	struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[comp_idx];  in mtk_drm_crtc_init_comp_planes()
910 				&mtk_crtc->planes[mtk_crtc->layer_nr],  in mtk_drm_crtc_init_comp_planes()
912 				mtk_drm_crtc_plane_type(mtk_crtc->layer_nr,  in mtk_drm_crtc_init_comp_planes()
920 		mtk_crtc->layer_nr++;  in mtk_drm_crtc_init_comp_planes()
936 	return mtk_crtc->dma_dev;  in mtk_drm_crtc_dma_dev_get()
944 	struct mtk_drm_private *priv = drm_dev->dev_private;  in mtk_drm_crtc_create()
945 	struct device *dev = drm_dev->dev;  in mtk_drm_crtc_create()
958 	priv = priv->all_drm_private[priv_data_index];  in mtk_drm_crtc_create()
968 		node = priv->comp_node[comp_id];  in mtk_drm_crtc_create()
969 		comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
981 		if (!comp->dev) {  in mtk_drm_crtc_create()
983 			return -ENODEV;  in mtk_drm_crtc_create()
989 		return -ENOMEM;  in mtk_drm_crtc_create()
991 	mtk_crtc->mmsys_dev = priv->mmsys_dev;  in mtk_drm_crtc_create()
992 	mtk_crtc->ddp_comp_nr = path_len;  in mtk_drm_crtc_create()
993 	mtk_crtc->ddp_comp = devm_kmalloc_array(dev,  in mtk_drm_crtc_create()
994 						mtk_crtc->ddp_comp_nr + (conn_routes ? 1 : 0),  in mtk_drm_crtc_create()
995 						sizeof(*mtk_crtc->ddp_comp),  in mtk_drm_crtc_create()
997 	if (!mtk_crtc->ddp_comp)  in mtk_drm_crtc_create()
998 		return -ENOMEM;  in mtk_drm_crtc_create()
1000 	mtk_crtc->mutex = mtk_mutex_get(priv->mutex_dev);  in mtk_drm_crtc_create()
1001 	if (IS_ERR(mtk_crtc->mutex)) {  in mtk_drm_crtc_create()
1002 		ret = PTR_ERR(mtk_crtc->mutex);  in mtk_drm_crtc_create()
1007 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_create()
1011 		comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
1012 		mtk_crtc->ddp_comp[i] = comp;  in mtk_drm_crtc_create()
1014 		if (comp->funcs) {  in mtk_drm_crtc_create()
1015 			if (comp->funcs->gamma_set && comp->funcs->gamma_get_lut_size) {  in mtk_drm_crtc_create()
1022 			if (comp->funcs->ctm_set)  in mtk_drm_crtc_create()
1027 						&mtk_crtc->base);  in mtk_drm_crtc_create()
1030 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)  in mtk_drm_crtc_create()
1033 	mtk_crtc->planes = devm_kcalloc(dev, num_comp_planes,  in mtk_drm_crtc_create()
1035 	if (!mtk_crtc->planes)  in mtk_drm_crtc_create()
1036 		return -ENOMEM;  in mtk_drm_crtc_create()
1038 	for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {  in mtk_drm_crtc_create()
1050 	mtk_crtc->dma_dev = mtk_ddp_comp_dma_dev_get(&priv->ddp_comp[path[0]]);  in mtk_drm_crtc_create()
1057 		drm_mode_crtc_set_gamma_size(&mtk_crtc->base, gamma_lut_size);  in mtk_drm_crtc_create()
1058 	drm_crtc_enable_color_mgmt(&mtk_crtc->base, 0, has_ctm, gamma_lut_size);  in mtk_drm_crtc_create()
1059 	mutex_init(&mtk_crtc->hw_lock);  in mtk_drm_crtc_create()
1062 	i = priv->mbox_index++;  in mtk_drm_crtc_create()
1063 	mtk_crtc->cmdq_client.client.dev = mtk_crtc->mmsys_dev;  in mtk_drm_crtc_create()
1064 	mtk_crtc->cmdq_client.client.tx_block = false;  in mtk_drm_crtc_create()
1065 	mtk_crtc->cmdq_client.client.knows_txdone = true;  in mtk_drm_crtc_create()
1066 	mtk_crtc->cmdq_client.client.rx_callback = ddp_cmdq_cb;  in mtk_drm_crtc_create()
1067 	mtk_crtc->cmdq_client.chan =  in mtk_drm_crtc_create()
1068 			mbox_request_channel(&mtk_crtc->cmdq_client.client, i);  in mtk_drm_crtc_create()
1069 	if (IS_ERR(mtk_crtc->cmdq_client.chan)) {  in mtk_drm_crtc_create()
1071 			drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
1072 		mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_create()
1075 	if (mtk_crtc->cmdq_client.chan) {  in mtk_drm_crtc_create()
1076 		ret = of_property_read_u32_index(priv->mutex_node,  in mtk_drm_crtc_create()
1077 						 "mediatek,gce-events",  in mtk_drm_crtc_create()
1079 						 &mtk_crtc->cmdq_event);  in mtk_drm_crtc_create()
1081 			dev_dbg(dev, "mtk_crtc %d failed to get mediatek,gce-events property\n",  in mtk_drm_crtc_create()
1082 				drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
1083 			mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_drm_crtc_create()
1084 			mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_create()
1086 			ret = mtk_drm_cmdq_pkt_create(&mtk_crtc->cmdq_client,  in mtk_drm_crtc_create()
1087 						      &mtk_crtc->cmdq_handle,  in mtk_drm_crtc_create()
1091 					drm_crtc_index(&mtk_crtc->base));  in mtk_drm_crtc_create()
1092 				mbox_free_channel(mtk_crtc->cmdq_client.chan);  in mtk_drm_crtc_create()
1093 				mtk_crtc->cmdq_client.chan = NULL;  in mtk_drm_crtc_create()
1098 		init_waitqueue_head(&mtk_crtc->cb_blocking_queue);  in mtk_drm_crtc_create()
1105 			struct device_node *node = priv->comp_node[comp_id];  in mtk_drm_crtc_create()
1106 			struct mtk_ddp_comp *comp = &priv->ddp_comp[comp_id];  in mtk_drm_crtc_create()
1108 			if (!comp->dev) {  in mtk_drm_crtc_create()
1111 				/* mark encoder_index to -1, if route comp device is not enabled */  in mtk_drm_crtc_create()
1112 				comp->encoder_index = -1;  in mtk_drm_crtc_create()
1116 			mtk_ddp_comp_encoder_index_set(&priv->ddp_comp[comp_id]);  in mtk_drm_crtc_create()
1119 		mtk_crtc->num_conn_routes = num_conn_routes;  in mtk_drm_crtc_create()
1120 		mtk_crtc->conn_routes = conn_routes;  in mtk_drm_crtc_create()
1123 		mtk_crtc->ddp_comp_nr++;  in mtk_drm_crtc_create()