Lines Matching +full:cpu +full:- +full:centric
2 * Copyright © 2015-2016 Intel Corporation
40 * captured by DMA from the GPU, unsynchronized with and unrelated to the CPU.
44 * without special privileges. Access to system-wide metrics requires root
58 * might sample sets of tightly-coupled counters, depending on the
70 * interleaved with event-type specific members.
74 * with the CPU, using HW specific packing formats for counter sets. Sometimes
76 * would be acceptable to expose them to unprivileged applications - to hide
88 * into perf's currently cpu centric design.
96 * side-band OA data captured via MI_REPORT_PERF_COUNT commands; we're
102 * For posterity, in case we might re-visit trying to adapt core perf to be
106 * - The perf based OA PMU driver broke some significant design assumptions:
108 * Existing perf pmus are used for profiling work on a cpu and we were
110 * implications, the need to fake cpu-related data (such as user/kernel
112 * as a way to forward device-specific status records.
115 * involvement from the CPU, making our PMU driver the first of a kind.
117 * Given the way we were periodically forward data from the GPU-mapped, OA
123 * explicitly initiated from the cpu (say in response to a userspace read())
125 * trigger a report from the cpu on demand.
130 * opened, there's no clear precedent for being able to provide group-wide
139 * for combining with the side-band raw reports it captures using
142 * - As a side note on perf's grouping feature; there was also some concern
158 * one time. The OA unit is not designed to allow re-configuration while in
178 * - It felt like our perf based PMU was making some technical compromises
182 * cpu core, while our device pmu related to neither. Events opened with a
184 * that process - so not appropriate for us. When an event is related to a
185 * cpu id, perf ensures pmu methods will be invoked via an inter process
187 * perf events for a specific cpu. This was workable but it meant the
229 #define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
237 * CPU).
240 * by checking for a zeroed report-id field in tail reports, we want to account
260 * non-periodic reports (such as on context switch) or the OA unit may be
315 * code assumes all reports have a power-of-two size and ~(size - 1) can
343 * struct perf_open_properties - for validated properties given to open a stream
358 * @poll_oa_period: The period in nanoseconds at which the CPU will check for OA
402 kfree(oa_config->flex_regs); in i915_oa_config_release()
403 kfree(oa_config->b_counter_regs); in i915_oa_config_release()
404 kfree(oa_config->mux_regs); in i915_oa_config_release()
415 oa_config = idr_find(&perf->metrics_idr, metrics_set); in i915_perf_get_oa_config()
425 i915_oa_config_put(oa_bo->oa_config); in free_oa_config_bo()
426 i915_vma_put(oa_bo->vma); in free_oa_config_bo()
433 return &stream->engine->oa_group->regs; in __oa_regs()
438 struct intel_uncore *uncore = stream->uncore; in gen12_oa_hw_tail_read()
440 return intel_uncore_read(uncore, __oa_regs(stream)->oa_tail_ptr) & in gen12_oa_hw_tail_read()
446 struct intel_uncore *uncore = stream->uncore; in gen8_oa_hw_tail_read()
453 struct intel_uncore *uncore = stream->uncore; in gen7_oa_hw_tail_read()
460 ((__s)->oa_buffer.format->header == HDR_64_BIT)
470 (GRAPHICS_VER(stream->perf->i915) == 12 ? in oa_report_reason()
486 stream->perf->gen8_valid_ctx_bit); in oa_report_ctx_invalid()
508 return ctx_id & stream->specific_ctx_id_mask; in oa_context_id()
520 * oa_buffer_check_unlocked - check for data and update tail ptr state
528 * pointer having a race with respect to what data is visible to the CPU.
544 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in oa_buffer_check_unlocked()
545 int report_size = stream->oa_buffer.format->size; in oa_buffer_check_unlocked()
555 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
557 hw_tail = stream->perf->ops.oa_hw_tail_read(stream); in oa_buffer_check_unlocked()
558 hw_tail -= gtt_offset; in oa_buffer_check_unlocked()
564 partial_report_size = OA_TAKEN(hw_tail, stream->oa_buffer.tail); in oa_buffer_check_unlocked()
583 while (OA_TAKEN(tail, stream->oa_buffer.tail) >= report_size) { in oa_buffer_check_unlocked()
584 void *report = stream->oa_buffer.vaddr + tail; in oa_buffer_check_unlocked()
590 tail = (tail - report_size) & (OA_BUFFER_SIZE - 1); in oa_buffer_check_unlocked()
594 __ratelimit(&stream->perf->tail_pointer_race)) in oa_buffer_check_unlocked()
595 drm_notice(&stream->uncore->i915->drm, in oa_buffer_check_unlocked()
597 stream->oa_buffer.head, tail, hw_tail); in oa_buffer_check_unlocked()
599 stream->oa_buffer.tail = tail; in oa_buffer_check_unlocked()
601 pollin = OA_TAKEN(stream->oa_buffer.tail, in oa_buffer_check_unlocked()
602 stream->oa_buffer.head) >= report_size; in oa_buffer_check_unlocked()
604 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in oa_buffer_check_unlocked()
610 * append_oa_status - Appends a status record to a userspace read() buffer.
611 * @stream: An i915-perf stream opened for OA metrics
632 if ((count - *offset) < header.size) in append_oa_status()
633 return -ENOSPC; in append_oa_status()
636 return -EFAULT; in append_oa_status()
644 * append_oa_sample - Copies single OA report into userspace read() buffer.
645 * @stream: An i915-perf stream opened for OA metrics
652 * properties when opening a stream, tracked as `stream->sample_flags`. This
666 int report_size = stream->oa_buffer.format->size; in append_oa_sample()
673 header.size = stream->sample_size; in append_oa_sample()
675 if ((count - *offset) < header.size) in append_oa_sample()
676 return -ENOSPC; in append_oa_sample()
680 return -EFAULT; in append_oa_sample()
683 oa_buf_end = stream->oa_buffer.vaddr + OA_BUFFER_SIZE; in append_oa_sample()
684 report_size_partial = oa_buf_end - report; in append_oa_sample()
688 return -EFAULT; in append_oa_sample()
691 if (copy_to_user(buf, stream->oa_buffer.vaddr, in append_oa_sample()
692 report_size - report_size_partial)) in append_oa_sample()
693 return -EFAULT; in append_oa_sample()
695 return -EFAULT; in append_oa_sample()
704 * gen8_append_oa_reports - Copies all buffered OA reports into
706 * @stream: An i915-perf stream opened for OA metrics
711 * Notably any error condition resulting in a short read (-%ENOSPC or
712 * -%EFAULT) will be returned even though one or more records may
719 * and back-to-front you're not alone, but this follows the
729 struct intel_uncore *uncore = stream->uncore; in gen8_append_oa_reports()
730 int report_size = stream->oa_buffer.format->size; in gen8_append_oa_reports()
731 u8 *oa_buf_base = stream->oa_buffer.vaddr; in gen8_append_oa_reports()
732 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_append_oa_reports()
733 u32 mask = (OA_BUFFER_SIZE - 1); in gen8_append_oa_reports()
739 if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled)) in gen8_append_oa_reports()
740 return -EIO; in gen8_append_oa_reports()
742 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
744 head = stream->oa_buffer.head; in gen8_append_oa_reports()
745 tail = stream->oa_buffer.tail; in gen8_append_oa_reports()
747 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
755 if (drm_WARN_ONCE(&uncore->i915->drm, in gen8_append_oa_reports()
760 return -EIO; in gen8_append_oa_reports()
781 * invalid to be sure we avoid false-positive, single-context in gen8_append_oa_reports()
793 * context-switch-report: This is a report with the reason type in gen8_append_oa_reports()
794 * being context-switch. It is generated when a context switches in gen8_append_oa_reports()
797 * context-valid-bit: A bit that is set in the report ID field in gen8_append_oa_reports()
800 * gpu-idle: A condition characterized by a in gen8_append_oa_reports()
801 * context-switch-report with context-valid-bit set to 0. in gen8_append_oa_reports()
803 * On prior platforms, context-id-valid bit is set to 0 only in gen8_append_oa_reports()
806 * On XEHP platforms, context-valid-bit is set to 1 in a context in gen8_append_oa_reports()
812 * context ID field and the context-valid-bit is 0. The logic in gen8_append_oa_reports()
820 GRAPHICS_VER_FULL(stream->engine->i915) < IP_VER(12, 50)) { in gen8_append_oa_reports()
828 * stop the counters from updating as system-wide / global in gen8_append_oa_reports()
832 * filtered on the cpu but it's not worth trying to in gen8_append_oa_reports()
836 * provide a side-band view of the real values. in gen8_append_oa_reports()
840 * needs be forwarded bookend context-switch reports so that it in gen8_append_oa_reports()
853 * switches since it's not-uncommon for periodic samples to in gen8_append_oa_reports()
856 if (!stream->ctx || in gen8_append_oa_reports()
857 stream->specific_ctx_id == ctx_id || in gen8_append_oa_reports()
858 stream->oa_buffer.last_ctx_id == stream->specific_ctx_id || in gen8_append_oa_reports()
865 if (stream->ctx && in gen8_append_oa_reports()
866 stream->specific_ctx_id != ctx_id) { in gen8_append_oa_reports()
875 stream->oa_buffer.last_ctx_id = ctx_id; in gen8_append_oa_reports()
886 u8 *oa_buf_end = stream->oa_buffer.vaddr + in gen8_append_oa_reports()
888 u32 part = oa_buf_end - (u8 *)report32; in gen8_append_oa_reports()
895 memset(oa_buf_base, 0, report_size - part); in gen8_append_oa_reports()
903 oaheadptr = GRAPHICS_VER(stream->perf->i915) == 12 ? in gen8_append_oa_reports()
904 __oa_regs(stream)->oa_head_ptr : in gen8_append_oa_reports()
907 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
915 stream->oa_buffer.head = head; in gen8_append_oa_reports()
917 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_append_oa_reports()
924 * gen8_oa_read - copy status records then buffered OA reports
925 * @stream: An i915-perf stream opened for OA metrics
948 struct intel_uncore *uncore = stream->uncore; in gen8_oa_read()
953 if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr)) in gen8_oa_read()
954 return -EIO; in gen8_oa_read()
956 oastatus_reg = GRAPHICS_VER(stream->perf->i915) == 12 ? in gen8_oa_read()
957 __oa_regs(stream)->oa_status : in gen8_oa_read()
982 drm_dbg(&stream->perf->i915->drm, in gen8_oa_read()
984 stream->period_exponent); in gen8_oa_read()
986 stream->perf->ops.oa_disable(stream); in gen8_oa_read()
987 stream->perf->ops.oa_enable(stream); in gen8_oa_read()
990 * Note: .oa_enable() is expected to re-init the oabuffer and in gen8_oa_read()
1005 IS_GRAPHICS_VER(uncore->i915, 8, 11) ? in gen8_oa_read()
1014 * gen7_append_oa_reports - Copies all buffered OA reports into
1016 * @stream: An i915-perf stream opened for OA metrics
1021 * Notably any error condition resulting in a short read (-%ENOSPC or
1022 * -%EFAULT) will be returned even though one or more records may
1029 * and back-to-front you're not alone, but this follows the
1039 struct intel_uncore *uncore = stream->uncore; in gen7_append_oa_reports()
1040 int report_size = stream->oa_buffer.format->size; in gen7_append_oa_reports()
1041 u8 *oa_buf_base = stream->oa_buffer.vaddr; in gen7_append_oa_reports()
1042 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_append_oa_reports()
1043 u32 mask = (OA_BUFFER_SIZE - 1); in gen7_append_oa_reports()
1049 if (drm_WARN_ON(&uncore->i915->drm, !stream->enabled)) in gen7_append_oa_reports()
1050 return -EIO; in gen7_append_oa_reports()
1052 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1054 head = stream->oa_buffer.head; in gen7_append_oa_reports()
1055 tail = stream->oa_buffer.tail; in gen7_append_oa_reports()
1057 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1065 if (drm_WARN_ONCE(&uncore->i915->drm, in gen7_append_oa_reports()
1070 return -EIO; in gen7_append_oa_reports()
1087 if (drm_WARN_ON(&uncore->i915->drm, in gen7_append_oa_reports()
1088 (OA_BUFFER_SIZE - head) < report_size)) { in gen7_append_oa_reports()
1089 drm_err(&uncore->i915->drm, in gen7_append_oa_reports()
1090 "Spurious OA head ptr: non-integral report offset\n"); in gen7_append_oa_reports()
1094 /* The report-ID field for periodic samples includes in gen7_append_oa_reports()
1101 if (__ratelimit(&stream->perf->spurious_report_rs)) in gen7_append_oa_reports()
1102 drm_notice(&uncore->i915->drm, in gen7_append_oa_reports()
1119 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1124 stream->oa_buffer.head = head; in gen7_append_oa_reports()
1126 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_append_oa_reports()
1133 * gen7_oa_read - copy status records then buffered OA reports
1134 * @stream: An i915-perf stream opened for OA metrics
1153 struct intel_uncore *uncore = stream->uncore; in gen7_oa_read()
1157 if (drm_WARN_ON(&uncore->i915->drm, !stream->oa_buffer.vaddr)) in gen7_oa_read()
1158 return -EIO; in gen7_oa_read()
1167 oastatus1 &= ~stream->perf->gen7_latched_oastatus1; in gen7_oa_read()
1171 * - The status can be interpreted to mean that the buffer is in gen7_oa_read()
1173 * which will start to report a near-empty buffer after an in gen7_oa_read()
1178 * - Since it also implies the HW has started overwriting old in gen7_oa_read()
1183 * - In the future we may want to introduce a flight recorder in gen7_oa_read()
1195 drm_dbg(&stream->perf->i915->drm, in gen7_oa_read()
1197 stream->period_exponent); in gen7_oa_read()
1199 stream->perf->ops.oa_disable(stream); in gen7_oa_read()
1200 stream->perf->ops.oa_enable(stream); in gen7_oa_read()
1210 stream->perf->gen7_latched_oastatus1 |= in gen7_oa_read()
1218 * i915_oa_wait_unlocked - handles blocking IO until OA data available
1219 * @stream: An i915-perf stream opened for OA metrics
1222 * for OA metrics. It waits until the hrtimer callback finds a non-empty
1226 * since any subsequent read handling will return -EAGAIN if there isn't
1234 if (!stream->periodic) in i915_oa_wait_unlocked()
1235 return -EIO; in i915_oa_wait_unlocked()
1237 return wait_event_interruptible(stream->poll_wq, in i915_oa_wait_unlocked()
1242 * i915_oa_poll_wait - call poll_wait() for an OA stream poll()
1243 * @stream: An i915-perf stream opened for OA metrics
1255 poll_wait(file, &stream->poll_wq, wait); in i915_oa_poll_wait()
1259 * i915_oa_read - just calls through to &i915_oa_ops->read
1260 * @stream: An i915-perf stream opened for OA metrics
1275 return stream->perf->ops.read(stream, buf, count, offset); in i915_oa_read()
1281 struct i915_gem_context *ctx = stream->ctx; in oa_pin_context()
1284 int err = -ENODEV; in oa_pin_context()
1287 if (ce->engine != stream->engine) /* first match! */ in oa_pin_context()
1305 if (err == -EDEADLK) { in oa_pin_context()
1315 stream->pinned_ctx = ce; in oa_pin_context()
1316 return stream->pinned_ctx; in oa_pin_context()
1325 if (GRAPHICS_VER(rq->i915) >= 8) in __store_reg_to_mem()
1358 err = -ETIME; in __read_reg()
1372 scratch = __vm_create_scratch_for_read_pinned(&ce->engine->gt->ggtt->vm, 4); in gen12_guc_sw_ctx_id()
1380 err = __read_reg(ce, RING_EXECLIST_STATUS_HI(ce->engine->mmio_base), in gen12_guc_sw_ctx_id()
1385 val = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB); in gen12_guc_sw_ctx_id()
1392 i915_gem_object_unpin_map(scratch->obj); in gen12_guc_sw_ctx_id()
1401 * 0 - (NUM_CONTEXT_TAG -1) are used by other contexts
1415 if (intel_engine_uses_guc(stream->engine)) { in gen12_get_render_context_id()
1416 ret = gen12_guc_sw_ctx_id(stream->pinned_ctx, &ctx_id); in gen12_get_render_context_id()
1420 mask = ((1U << GEN12_GUC_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1421 (GEN12_GUC_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1422 } else if (GRAPHICS_VER_FULL(stream->engine->i915) >= IP_VER(12, 50)) { in gen12_get_render_context_id()
1423 ctx_id = (XEHP_MAX_CONTEXT_HW_ID - 1) << in gen12_get_render_context_id()
1424 (XEHP_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1426 mask = ((1U << XEHP_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1427 (XEHP_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1429 ctx_id = (GEN12_MAX_CONTEXT_HW_ID - 1) << in gen12_get_render_context_id()
1430 (GEN11_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1432 mask = ((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << in gen12_get_render_context_id()
1433 (GEN11_SW_CTX_ID_SHIFT - 32); in gen12_get_render_context_id()
1435 stream->specific_ctx_id = ctx_id & mask; in gen12_get_render_context_id()
1436 stream->specific_ctx_id_mask = mask; in gen12_get_render_context_id()
1461 u32 offset, len = (ce->engine->context_size - PAGE_SIZE) / 4; in oa_context_image_offset()
1462 u32 *state = ce->lrc_reg_state; in oa_context_image_offset()
1464 if (drm_WARN_ON(&ce->engine->i915->drm, !state)) in oa_context_image_offset()
1470 * We expect reg-value pairs in MI_LRI command, so in oa_context_image_offset()
1473 drm_WARN_ON(&ce->engine->i915->drm, in oa_context_image_offset()
1488 i915_reg_t reg = GEN12_OACTXCONTROL(ce->engine->mmio_base); in set_oa_ctx_ctrl_offset()
1489 struct i915_perf *perf = &ce->engine->i915->perf; in set_oa_ctx_ctrl_offset()
1490 u32 offset = perf->ctx_oactxctrl_offset; in set_oa_ctx_ctrl_offset()
1497 perf->ctx_oactxctrl_offset = offset; in set_oa_ctx_ctrl_offset()
1499 drm_dbg(&ce->engine->i915->drm, in set_oa_ctx_ctrl_offset()
1501 ce->engine->name, offset); in set_oa_ctx_ctrl_offset()
1504 return offset && offset != U32_MAX ? 0 : -ENODEV; in set_oa_ctx_ctrl_offset()
1509 return engine->class == RENDER_CLASS; in engine_supports_mi_query()
1513 * oa_get_render_ctx_id - determine and hold ctx hw id
1514 * @stream: An i915-perf stream opened for OA metrics
1531 if (engine_supports_mi_query(stream->engine) && in oa_get_render_ctx_id()
1532 HAS_LOGICAL_RING_CONTEXTS(stream->perf->i915)) { in oa_get_render_ctx_id()
1540 drm_err(&stream->perf->i915->drm, in oa_get_render_ctx_id()
1542 stream->engine->name); in oa_get_render_ctx_id()
1547 switch (GRAPHICS_VER(ce->engine->i915)) { in oa_get_render_ctx_id()
1553 stream->specific_ctx_id = i915_ggtt_offset(ce->state); in oa_get_render_ctx_id()
1554 stream->specific_ctx_id_mask = 0; in oa_get_render_ctx_id()
1560 if (intel_engine_uses_guc(ce->engine)) { in oa_get_render_ctx_id()
1571 stream->specific_ctx_id = ce->lrc.lrca >> 12; in oa_get_render_ctx_id()
1577 stream->specific_ctx_id_mask = in oa_get_render_ctx_id()
1578 (1U << (GEN8_CTX_ID_WIDTH - 1)) - 1; in oa_get_render_ctx_id()
1580 stream->specific_ctx_id_mask = in oa_get_render_ctx_id()
1581 (1U << GEN8_CTX_ID_WIDTH) - 1; in oa_get_render_ctx_id()
1582 stream->specific_ctx_id = stream->specific_ctx_id_mask; in oa_get_render_ctx_id()
1592 MISSING_CASE(GRAPHICS_VER(ce->engine->i915)); in oa_get_render_ctx_id()
1595 ce->tag = stream->specific_ctx_id; in oa_get_render_ctx_id()
1597 drm_dbg(&stream->perf->i915->drm, in oa_get_render_ctx_id()
1599 stream->specific_ctx_id, in oa_get_render_ctx_id()
1600 stream->specific_ctx_id_mask); in oa_get_render_ctx_id()
1606 * oa_put_render_ctx_id - counterpart to oa_get_render_ctx_id releases hold
1607 * @stream: An i915-perf stream opened for OA metrics
1616 ce = fetch_and_zero(&stream->pinned_ctx); in oa_put_render_ctx_id()
1618 ce->tag = 0; /* recomputed on next submission after parking */ in oa_put_render_ctx_id()
1622 stream->specific_ctx_id = INVALID_CTX_ID; in oa_put_render_ctx_id()
1623 stream->specific_ctx_id_mask = 0; in oa_put_render_ctx_id()
1629 i915_vma_unpin_and_release(&stream->oa_buffer.vma, in free_oa_buffer()
1632 stream->oa_buffer.vaddr = NULL; in free_oa_buffer()
1640 i915_oa_config_put(stream->oa_config); in free_oa_configs()
1641 llist_for_each_entry_safe(oa_bo, tmp, stream->oa_config_bos.first, node) in free_oa_configs()
1648 i915_vma_unpin_and_release(&stream->noa_wait, 0); in free_noa_wait()
1653 return engine->oa_group; in engine_supports_oa()
1658 return engine->oa_group && engine->oa_group->type == type; in engine_supports_oa_format()
1663 struct i915_perf *perf = stream->perf; in i915_oa_stream_destroy()
1664 struct intel_gt *gt = stream->engine->gt; in i915_oa_stream_destroy()
1665 struct i915_perf_group *g = stream->engine->oa_group; in i915_oa_stream_destroy()
1667 if (WARN_ON(stream != g->exclusive_stream)) in i915_oa_stream_destroy()
1676 WRITE_ONCE(g->exclusive_stream, NULL); in i915_oa_stream_destroy()
1677 perf->ops.disable_metric_set(stream); in i915_oa_stream_destroy()
1681 intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_destroy()
1682 intel_engine_pm_put(stream->engine); in i915_oa_stream_destroy()
1684 if (stream->ctx) in i915_oa_stream_destroy()
1690 if (perf->spurious_report_rs.missed) { in i915_oa_stream_destroy()
1692 perf->spurious_report_rs.missed); in i915_oa_stream_destroy()
1698 struct intel_uncore *uncore = stream->uncore; in gen7_init_oa_buffer()
1699 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_init_oa_buffer()
1702 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1704 /* Pre-DevBDW: OABUFFER must be set with counters off, in gen7_init_oa_buffer()
1709 stream->oa_buffer.head = 0; in gen7_init_oa_buffer()
1717 stream->oa_buffer.tail = 0; in gen7_init_oa_buffer()
1719 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen7_init_oa_buffer()
1725 stream->perf->gen7_latched_oastatus1 = 0; in gen7_init_oa_buffer()
1729 * first allocating), we may re-init the OA buffer, either in gen7_init_oa_buffer()
1730 * when re-enabling a stream or in error/reset paths. in gen7_init_oa_buffer()
1732 * The reason we clear the buffer for each re-init is for the in gen7_init_oa_buffer()
1734 * report-id field to make sure it's non-zero which relies on in gen7_init_oa_buffer()
1738 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen7_init_oa_buffer()
1743 struct intel_uncore *uncore = stream->uncore; in gen8_init_oa_buffer()
1744 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_init_oa_buffer()
1747 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1751 stream->oa_buffer.head = 0; in gen8_init_oa_buffer()
1768 stream->oa_buffer.tail = 0; in gen8_init_oa_buffer()
1775 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen8_init_oa_buffer()
1777 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen8_init_oa_buffer()
1782 * first allocating), we may re-init the OA buffer, either in gen8_init_oa_buffer()
1783 * when re-enabling a stream or in error/reset paths. in gen8_init_oa_buffer()
1785 * The reason we clear the buffer for each re-init is for the in gen8_init_oa_buffer()
1787 * reason field to make sure it's non-zero which relies on in gen8_init_oa_buffer()
1791 memset(stream->oa_buffer.vaddr, 0, OA_BUFFER_SIZE); in gen8_init_oa_buffer()
1796 struct intel_uncore *uncore = stream->uncore; in gen12_init_oa_buffer()
1797 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen12_init_oa_buffer()
1800 spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags); in gen12_init_oa_buffer()
1802 intel_uncore_write(uncore, __oa_regs(stream)->oa_status, 0); in gen12_init_oa_buffer()
1803 intel_uncore_write(uncore, __oa_regs(stream)->oa_head_ptr, in gen12_init_oa_buffer()
1805 stream->oa_buffer.head = 0; in gen12_init_oa_buffer()
1815 intel_uncore_write(uncore, __oa_regs(stream)->oa_buffer, gtt_offset | in gen12_init_oa_buffer()
1817 intel_uncore_write(uncore, __oa_regs(stream)->oa_tail_ptr, in gen12_init_oa_buffer()
1821 stream->oa_buffer.tail = 0; in gen12_init_oa_buffer()
1828 stream->oa_buffer.last_ctx_id = INVALID_CTX_ID; in gen12_init_oa_buffer()
1830 spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags); in gen12_init_oa_buffer()
1835 * first allocating), we may re-init the OA buffer, either in gen12_init_oa_buffer()
1836 * when re-enabling a stream or in error/reset paths. in gen12_init_oa_buffer()
1838 * The reason we clear the buffer for each re-init is for the in gen12_init_oa_buffer()
1840 * reason field to make sure it's non-zero which relies on in gen12_init_oa_buffer()
1844 memset(stream->oa_buffer.vaddr, 0, in gen12_init_oa_buffer()
1845 stream->oa_buffer.vma->size); in gen12_init_oa_buffer()
1850 struct drm_i915_private *i915 = stream->perf->i915; in alloc_oa_buffer()
1851 struct intel_gt *gt = stream->engine->gt; in alloc_oa_buffer()
1856 if (drm_WARN_ON(&i915->drm, stream->oa_buffer.vma)) in alloc_oa_buffer()
1857 return -ENODEV; in alloc_oa_buffer()
1862 bo = i915_gem_object_create_shmem(stream->perf->i915, OA_BUFFER_SIZE); in alloc_oa_buffer()
1864 drm_err(&i915->drm, "Failed to allocate OA buffer\n"); in alloc_oa_buffer()
1871 vma = i915_vma_instance(bo, >->ggtt->vm, NULL); in alloc_oa_buffer()
1887 stream->oa_buffer.vma = vma; in alloc_oa_buffer()
1889 stream->oa_buffer.vaddr = in alloc_oa_buffer()
1891 if (IS_ERR(stream->oa_buffer.vaddr)) { in alloc_oa_buffer()
1892 ret = PTR_ERR(stream->oa_buffer.vaddr); in alloc_oa_buffer()
1904 stream->oa_buffer.vaddr = NULL; in alloc_oa_buffer()
1905 stream->oa_buffer.vma = NULL; in alloc_oa_buffer()
1919 if (GRAPHICS_VER(stream->perf->i915) >= 8) in save_restore_register()
1925 *cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d; in save_restore_register()
1934 struct drm_i915_private *i915 = stream->perf->i915; in alloc_noa_wait()
1935 struct intel_gt *gt = stream->engine->gt; in alloc_noa_wait()
1938 const u64 delay_ticks = 0xffffffffffffffff - in alloc_noa_wait()
1939 intel_gt_ns_to_clock_interval(to_gt(stream->perf->i915), in alloc_noa_wait()
1940 atomic64_read(&stream->perf->noa_programming_delay)); in alloc_noa_wait()
1941 const u32 base = stream->engine->mmio_base; in alloc_noa_wait()
1959 * gt->scratch was being used to save/restore the GPR registers, but on in alloc_noa_wait()
1966 drm_err(&i915->drm, in alloc_noa_wait()
1982 vma = i915_vma_instance(bo, >->ggtt->vm, NULL); in alloc_noa_wait()
1998 stream->noa_wait = vma; in alloc_noa_wait()
2023 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2041 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2061 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2073 *cs++ = i915_ggtt_offset(vma) + (ts0 - batch) * 4; in alloc_noa_wait()
2081 * (((1 * << 64) - 1) - delay_ns) in alloc_noa_wait()
2104 *cs++ = MI_LOAD_REGISTER_REG | (3 - 2); in alloc_noa_wait()
2116 *cs++ = i915_ggtt_offset(vma) + (jump - batch) * 4; in alloc_noa_wait()
2134 GEM_BUG_ON(cs - batch > PAGE_SIZE / sizeof(*batch)); in alloc_noa_wait()
2144 if (ret == -EDEADLK) { in alloc_noa_wait()
2164 n_regs - i, in write_cs_mi_lri()
2201 return ERR_PTR(-ENOMEM); in alloc_oa_config_buffer()
2203 config_length += num_lri_dwords(oa_config->mux_regs_len); in alloc_oa_config_buffer()
2204 config_length += num_lri_dwords(oa_config->b_counter_regs_len); in alloc_oa_config_buffer()
2205 config_length += num_lri_dwords(oa_config->flex_regs_len); in alloc_oa_config_buffer()
2209 obj = i915_gem_object_create_shmem(stream->perf->i915, config_length); in alloc_oa_config_buffer()
2228 oa_config->mux_regs, in alloc_oa_config_buffer()
2229 oa_config->mux_regs_len); in alloc_oa_config_buffer()
2231 oa_config->b_counter_regs, in alloc_oa_config_buffer()
2232 oa_config->b_counter_regs_len); in alloc_oa_config_buffer()
2234 oa_config->flex_regs, in alloc_oa_config_buffer()
2235 oa_config->flex_regs_len); in alloc_oa_config_buffer()
2238 *cs++ = (GRAPHICS_VER(stream->perf->i915) < 8 ? in alloc_oa_config_buffer()
2241 *cs++ = i915_ggtt_offset(stream->noa_wait); in alloc_oa_config_buffer()
2247 oa_bo->vma = i915_vma_instance(obj, in alloc_oa_config_buffer()
2248 &stream->engine->gt->ggtt->vm, in alloc_oa_config_buffer()
2250 if (IS_ERR(oa_bo->vma)) { in alloc_oa_config_buffer()
2251 err = PTR_ERR(oa_bo->vma); in alloc_oa_config_buffer()
2255 oa_bo->oa_config = i915_oa_config_get(oa_config); in alloc_oa_config_buffer()
2256 llist_add(&oa_bo->node, &stream->oa_config_bos); in alloc_oa_config_buffer()
2259 if (err == -EDEADLK) { in alloc_oa_config_buffer()
2285 llist_for_each_entry(oa_bo, stream->oa_config_bos.first, node) { in get_oa_vma()
2286 if (oa_bo->oa_config == oa_config && in get_oa_vma()
2287 memcmp(oa_bo->oa_config->uuid, in get_oa_vma()
2288 oa_config->uuid, in get_oa_vma()
2289 sizeof(oa_config->uuid)) == 0) in get_oa_vma()
2298 return i915_vma_get(oa_bo->vma); in get_oa_vma()
2318 err = i915_gem_object_lock(vma->obj, &ww); in emit_oa_config()
2326 intel_engine_pm_get(ce->engine); in emit_oa_config()
2328 intel_engine_pm_put(ce->engine); in emit_oa_config()
2350 err = rq->engine->emit_bb_start(rq, in emit_oa_config()
2361 if (err == -EDEADLK) { in emit_oa_config()
2374 return stream->pinned_ctx ?: stream->engine->kernel_context; in oa_context()
2381 struct intel_uncore *uncore = stream->uncore; in hsw_enable_metric_set()
2388 * unable to count the events from non-render clock domain. in hsw_enable_metric_set()
2390 * count the events from non-render domain. Unit level clock in hsw_enable_metric_set()
2399 stream->oa_config, oa_context(stream), in hsw_enable_metric_set()
2405 struct intel_uncore *uncore = stream->uncore; in hsw_disable_metric_set()
2429 for (i = 0; i < oa_config->flex_regs_len; i++) { in oa_config_flex_reg()
2430 if (i915_mmio_reg_offset(oa_config->flex_regs[i].addr) == mmio) in oa_config_flex_reg()
2431 return oa_config->flex_regs[i].value; in oa_config_flex_reg()
2440 * It's fine to put out-of-date values into these per-context registers
2447 u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset; in gen8_update_reg_state_unlocked()
2448 u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset; in gen8_update_reg_state_unlocked()
2459 u32 *reg_state = ce->lrc_reg_state; in gen8_update_reg_state_unlocked()
2463 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in gen8_update_reg_state_unlocked()
2464 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) | in gen8_update_reg_state_unlocked()
2469 oa_config_flex_reg(stream->oa_config, flex_regs[i]); in gen8_update_reg_state_unlocked()
2490 offset = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET; in gen8_store_flex()
2493 *cs++ = offset + flex->offset * sizeof(u32); in gen8_store_flex()
2495 *cs++ = flex->value; in gen8_store_flex()
2496 } while (flex++, --count); in gen8_store_flex()
2518 *cs++ = i915_mmio_reg_offset(flex->reg); in gen8_load_flex()
2519 *cs++ = flex->value; in gen8_load_flex()
2520 } while (flex++, --count); in gen8_load_flex()
2534 rq = intel_engine_create_kernel_request(ce->engine); in gen8_modify_context()
2555 intel_engine_pm_get(ce->engine); in gen8_modify_self()
2557 intel_engine_pm_put(ce->engine); in gen8_modify_self()
2585 GEM_BUG_ON(ce == ce->engine->kernel_context); in gen8_configure_context()
2587 if (ce->engine->class != RENDER_CLASS) in gen8_configure_context()
2594 flex->value = intel_sseu_make_rpcs(ce->engine->gt, &ce->sseu); in gen8_configure_context()
2610 struct intel_context *ce = stream->pinned_ctx; in gen12_configure_oar_context()
2611 u32 format = stream->oa_buffer.format->format; in gen12_configure_oar_context()
2612 u32 offset = stream->perf->ctx_oactxctrl_offset; in gen12_configure_oar_context()
2632 RING_CONTEXT_CONTROL(ce->engine->mmio_base), in gen12_configure_oar_context()
2657 * Manages updating the per-context aspects of the OA stream
2667 * won't automatically reload an out-of-date timer exponent even
2671 * - Ensure the currently running context's per-context OA state is
2673 * - Ensure that all existing contexts will have the correct per-context
2675 * - Ensure any new contexts will be initialized with the correct
2676 * per-context OA state.
2687 struct drm_i915_private *i915 = stream->perf->i915; in oa_configure_all_contexts()
2689 struct intel_gt *gt = stream->engine->gt; in oa_configure_all_contexts()
2693 lockdep_assert_held(>->perf.lock); in oa_configure_all_contexts()
2698 * lite-restore). This means we can't safely update a context's image, in oa_configure_all_contexts()
2711 spin_lock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2712 list_for_each_entry_safe(ctx, cn, &i915->gem.contexts.list, link) { in oa_configure_all_contexts()
2713 if (!kref_get_unless_zero(&ctx->ref)) in oa_configure_all_contexts()
2716 spin_unlock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2724 spin_lock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2728 spin_unlock(&i915->gem.contexts.lock); in oa_configure_all_contexts()
2736 struct intel_context *ce = engine->kernel_context; in oa_configure_all_contexts()
2738 if (engine->class != RENDER_CLASS) in oa_configure_all_contexts()
2741 regs[0].value = intel_sseu_make_rpcs(engine->gt, &ce->sseu); in oa_configure_all_contexts()
2763 if (stream->engine->class != RENDER_CLASS) in gen12_configure_all_contexts()
2776 u32 ctx_oactxctrl = stream->perf->ctx_oactxctrl_offset; in lrc_configure_all_contexts()
2778 const u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset; in lrc_configure_all_contexts()
2801 (stream->period_exponent << GEN8_OA_TIMER_PERIOD_SHIFT) | in lrc_configure_all_contexts()
2802 (stream->periodic ? GEN8_OA_TIMER_ENABLE : 0) | in lrc_configure_all_contexts()
2817 struct intel_uncore *uncore = stream->uncore; in gen8_enable_metric_set()
2818 struct i915_oa_config *oa_config = stream->oa_config; in gen8_enable_metric_set()
2833 * Currently none of the high-level metrics we have depend on knowing in gen8_enable_metric_set()
2844 if (IS_GRAPHICS_VER(stream->perf->i915, 9, 11)) { in gen8_enable_metric_set()
2860 stream->oa_config, oa_context(stream), in gen8_enable_metric_set()
2867 (stream->sample_flags & SAMPLE_OA_REPORT) ? in oag_report_ctx_switches()
2875 struct drm_i915_private *i915 = stream->perf->i915; in gen12_enable_metric_set()
2876 struct intel_uncore *uncore = stream->uncore; in gen12_enable_metric_set()
2877 struct i915_oa_config *oa_config = stream->oa_config; in gen12_enable_metric_set()
2878 bool periodic = stream->periodic; in gen12_enable_metric_set()
2879 u32 period_exponent = stream->period_exponent; in gen12_enable_metric_set()
2889 intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN, in gen12_enable_metric_set()
2895 intel_uncore_write(uncore, __oa_regs(stream)->oa_debug, in gen12_enable_metric_set()
2905 intel_uncore_write(uncore, __oa_regs(stream)->oa_ctx_ctrl, periodic ? in gen12_enable_metric_set()
2935 if (stream->ctx) { in gen12_enable_metric_set()
2942 stream->oa_config, oa_context(stream), in gen12_enable_metric_set()
2948 struct intel_uncore *uncore = stream->uncore; in gen8_disable_metric_set()
2958 struct intel_uncore *uncore = stream->uncore; in gen11_disable_metric_set()
2969 struct intel_uncore *uncore = stream->uncore; in gen12_disable_metric_set()
2970 struct drm_i915_private *i915 = stream->perf->i915; in gen12_disable_metric_set()
2978 intel_gt_mcr_multicast_write(uncore->gt, GEN8_ROW_CHICKEN, in gen12_disable_metric_set()
2988 if (stream->ctx) in gen12_disable_metric_set()
3003 struct intel_uncore *uncore = stream->uncore; in gen7_oa_enable()
3004 struct i915_gem_context *ctx = stream->ctx; in gen7_oa_enable()
3005 u32 ctx_id = stream->specific_ctx_id; in gen7_oa_enable()
3006 bool periodic = stream->periodic; in gen7_oa_enable()
3007 u32 period_exponent = stream->period_exponent; in gen7_oa_enable()
3008 u32 report_format = stream->oa_buffer.format->format; in gen7_oa_enable()
3033 struct intel_uncore *uncore = stream->uncore; in gen8_oa_enable()
3034 u32 report_format = stream->oa_buffer.format->format; in gen8_oa_enable()
3049 * filtering and instead filter on the cpu based on the context-id in gen8_oa_enable()
3066 if (!(stream->sample_flags & SAMPLE_OA_REPORT)) in gen12_oa_enable()
3072 val = (stream->oa_buffer.format->format << regs->oa_ctrl_counter_format_shift) | in gen12_oa_enable()
3075 intel_uncore_write(stream->uncore, regs->oa_ctrl, val); in gen12_oa_enable()
3079 * i915_oa_stream_enable - handle `I915_PERF_IOCTL_ENABLE` for OA stream
3089 stream->pollin = false; in i915_oa_stream_enable()
3091 stream->perf->ops.oa_enable(stream); in i915_oa_stream_enable()
3093 if (stream->sample_flags & SAMPLE_OA_REPORT) in i915_oa_stream_enable()
3094 hrtimer_start(&stream->poll_check_timer, in i915_oa_stream_enable()
3095 ns_to_ktime(stream->poll_oa_period), in i915_oa_stream_enable()
3101 struct intel_uncore *uncore = stream->uncore; in gen7_oa_disable()
3107 drm_err(&stream->perf->i915->drm, in gen7_oa_disable()
3113 struct intel_uncore *uncore = stream->uncore; in gen8_oa_disable()
3119 drm_err(&stream->perf->i915->drm, in gen8_oa_disable()
3125 struct intel_uncore *uncore = stream->uncore; in gen12_oa_disable()
3127 intel_uncore_write(uncore, __oa_regs(stream)->oa_ctrl, 0); in gen12_oa_disable()
3129 __oa_regs(stream)->oa_ctrl, in gen12_oa_disable()
3132 drm_err(&stream->perf->i915->drm, in gen12_oa_disable()
3140 drm_err(&stream->perf->i915->drm, in gen12_oa_disable()
3145 * i915_oa_stream_disable - handle `I915_PERF_IOCTL_DISABLE` for OA stream
3154 stream->perf->ops.oa_disable(stream); in i915_oa_stream_disable()
3156 if (stream->sample_flags & SAMPLE_OA_REPORT) in i915_oa_stream_disable()
3157 hrtimer_cancel(&stream->poll_check_timer); in i915_oa_stream_disable()
3176 return -ENOMEM; in i915_perf_stream_enable_sync()
3178 err = stream->perf->ops.enable_metric_set(stream, active); in i915_perf_stream_enable_sync()
3190 const struct sseu_dev_info *devinfo_sseu = &engine->gt->info.sseu; in get_default_sseu_config()
3194 if (GRAPHICS_VER(engine->i915) == 11) { in get_default_sseu_config()
3197 * we select - just turn off low bits in the amount of half of in get_default_sseu_config()
3200 out_sseu->subslice_mask = in get_default_sseu_config()
3201 ~(~0 << (hweight8(out_sseu->subslice_mask) / 2)); in get_default_sseu_config()
3202 out_sseu->slice_mask = 0x1; in get_default_sseu_config()
3211 if (drm_sseu->engine.engine_class != engine->uabi_class || in get_sseu_config()
3212 drm_sseu->engine.engine_instance != engine->uabi_instance) in get_sseu_config()
3213 return -EINVAL; in get_sseu_config()
3215 return i915_gem_user_to_context_sseu(engine->gt, drm_sseu, out_sseu); in get_sseu_config()
3232 with_intel_runtime_pm(to_gt(i915)->uncore->rpm, wakeref) in i915_perf_oa_timestamp_frequency()
3233 reg = intel_uncore_read(to_gt(i915)->uncore, RPM_CONFIG0); in i915_perf_oa_timestamp_frequency()
3238 return to_gt(i915)->clock_frequency << (3 - shift); in i915_perf_oa_timestamp_frequency()
3241 return to_gt(i915)->clock_frequency; in i915_perf_oa_timestamp_frequency()
3245 * i915_oa_stream_init - validate combined props for OA stream and init
3266 struct drm_i915_private *i915 = stream->perf->i915; in i915_oa_stream_init()
3267 struct i915_perf *perf = stream->perf; in i915_oa_stream_init()
3271 if (!props->engine) { in i915_oa_stream_init()
3272 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3274 return -EINVAL; in i915_oa_stream_init()
3276 g = props->engine->oa_group; in i915_oa_stream_init()
3283 if (!perf->metrics_kobj) { in i915_oa_stream_init()
3284 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3286 return -EINVAL; in i915_oa_stream_init()
3289 if (!(props->sample_flags & SAMPLE_OA_REPORT) && in i915_oa_stream_init()
3290 (GRAPHICS_VER(perf->i915) < 12 || !stream->ctx)) { in i915_oa_stream_init()
3291 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3293 return -EINVAL; in i915_oa_stream_init()
3296 if (!perf->ops.enable_metric_set) { in i915_oa_stream_init()
3297 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3299 return -ENODEV; in i915_oa_stream_init()
3307 if (g->exclusive_stream) { in i915_oa_stream_init()
3308 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3310 return -EBUSY; in i915_oa_stream_init()
3313 if (!props->oa_format) { in i915_oa_stream_init()
3314 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3316 return -EINVAL; in i915_oa_stream_init()
3319 stream->engine = props->engine; in i915_oa_stream_init()
3320 stream->uncore = stream->engine->gt->uncore; in i915_oa_stream_init()
3322 stream->sample_size = sizeof(struct drm_i915_perf_record_header); in i915_oa_stream_init()
3324 stream->oa_buffer.format = &perf->oa_formats[props->oa_format]; in i915_oa_stream_init()
3325 if (drm_WARN_ON(&i915->drm, stream->oa_buffer.format->size == 0)) in i915_oa_stream_init()
3326 return -EINVAL; in i915_oa_stream_init()
3328 stream->sample_flags = props->sample_flags; in i915_oa_stream_init()
3329 stream->sample_size += stream->oa_buffer.format->size; in i915_oa_stream_init()
3331 stream->hold_preemption = props->hold_preemption; in i915_oa_stream_init()
3333 stream->periodic = props->oa_periodic; in i915_oa_stream_init()
3334 if (stream->periodic) in i915_oa_stream_init()
3335 stream->period_exponent = props->oa_period_exponent; in i915_oa_stream_init()
3337 if (stream->ctx) { in i915_oa_stream_init()
3340 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3348 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3353 stream->oa_config = i915_perf_get_oa_config(perf, props->metrics_set); in i915_oa_stream_init()
3354 if (!stream->oa_config) { in i915_oa_stream_init()
3355 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3356 "Invalid OA config id=%i\n", props->metrics_set); in i915_oa_stream_init()
3357 ret = -EINVAL; in i915_oa_stream_init()
3361 /* PRM - observability performance counters: in i915_oa_stream_init()
3373 intel_engine_pm_get(stream->engine); in i915_oa_stream_init()
3374 intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_init()
3380 stream->ops = &i915_oa_stream_ops; in i915_oa_stream_init()
3382 stream->engine->gt->perf.sseu = props->sseu; in i915_oa_stream_init()
3383 WRITE_ONCE(g->exclusive_stream, stream); in i915_oa_stream_init()
3387 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3392 drm_dbg(&stream->perf->i915->drm, in i915_oa_stream_init()
3394 stream->oa_config->uuid); in i915_oa_stream_init()
3396 hrtimer_init(&stream->poll_check_timer, in i915_oa_stream_init()
3398 stream->poll_check_timer.function = oa_poll_check_timer_cb; in i915_oa_stream_init()
3399 init_waitqueue_head(&stream->poll_wq); in i915_oa_stream_init()
3400 spin_lock_init(&stream->oa_buffer.ptr_lock); in i915_oa_stream_init()
3401 mutex_init(&stream->lock); in i915_oa_stream_init()
3406 WRITE_ONCE(g->exclusive_stream, NULL); in i915_oa_stream_init()
3407 perf->ops.disable_metric_set(stream); in i915_oa_stream_init()
3412 intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL); in i915_oa_stream_init()
3413 intel_engine_pm_put(stream->engine); in i915_oa_stream_init()
3421 if (stream->ctx) in i915_oa_stream_init()
3432 if (engine->class != RENDER_CLASS) in i915_oa_init_reg_state()
3436 stream = READ_ONCE(engine->oa_group->exclusive_stream); in i915_oa_init_reg_state()
3437 if (stream && GRAPHICS_VER(stream->perf->i915) < 12) in i915_oa_init_reg_state()
3442 * i915_perf_read - handles read() FOP for i915 perf stream FDs
3450 * &i915_perf_stream_ops->read but to save having stream implementations (of
3464 struct i915_perf_stream *stream = file->private_data; in i915_perf_read()
3472 if (!stream->enabled || !(stream->sample_flags & SAMPLE_OA_REPORT)) in i915_perf_read()
3473 return -EIO; in i915_perf_read()
3475 if (!(file->f_flags & O_NONBLOCK)) { in i915_perf_read()
3477 * stream->ops->wait_unlocked. in i915_perf_read()
3484 ret = stream->ops->wait_unlocked(stream); in i915_perf_read()
3488 mutex_lock(&stream->lock); in i915_perf_read()
3489 ret = stream->ops->read(stream, buf, count, &offset); in i915_perf_read()
3490 mutex_unlock(&stream->lock); in i915_perf_read()
3493 mutex_lock(&stream->lock); in i915_perf_read()
3494 ret = stream->ops->read(stream, buf, count, &offset); in i915_perf_read()
3495 mutex_unlock(&stream->lock); in i915_perf_read()
3502 * and read() returning -EAGAIN. Clearing the oa.pollin state here in i915_perf_read()
3505 * The exception to this is if ops->read() returned -ENOSPC which means in i915_perf_read()
3509 if (ret != -ENOSPC) in i915_perf_read()
3510 stream->pollin = false; in i915_perf_read()
3512 /* Possible values for ret are 0, -EFAULT, -ENOSPC, -EIO, ... */ in i915_perf_read()
3513 return offset ?: (ret ?: -EAGAIN); in i915_perf_read()
3522 stream->pollin = true; in oa_poll_check_timer_cb()
3523 wake_up(&stream->poll_wq); in oa_poll_check_timer_cb()
3527 ns_to_ktime(stream->poll_oa_period)); in oa_poll_check_timer_cb()
3533 * i915_perf_poll_locked - poll_wait() with a suitable wait queue for stream
3539 * &i915_perf_stream_ops->poll_wait to call poll_wait() with a wait queue that
3550 stream->ops->poll_wait(stream, file, wait); in i915_perf_poll_locked()
3558 if (stream->pollin) in i915_perf_poll_locked()
3565 * i915_perf_poll - call poll_wait() with a suitable wait queue for stream
3579 struct i915_perf_stream *stream = file->private_data; in i915_perf_poll()
3582 mutex_lock(&stream->lock); in i915_perf_poll()
3584 mutex_unlock(&stream->lock); in i915_perf_poll()
3590 * i915_perf_enable_locked - handle `I915_PERF_IOCTL_ENABLE` ioctl
3601 if (stream->enabled) in i915_perf_enable_locked()
3604 /* Allow stream->ops->enable() to refer to this */ in i915_perf_enable_locked()
3605 stream->enabled = true; in i915_perf_enable_locked()
3607 if (stream->ops->enable) in i915_perf_enable_locked()
3608 stream->ops->enable(stream); in i915_perf_enable_locked()
3610 if (stream->hold_preemption) in i915_perf_enable_locked()
3611 intel_context_set_nopreempt(stream->pinned_ctx); in i915_perf_enable_locked()
3615 * i915_perf_disable_locked - handle `I915_PERF_IOCTL_DISABLE` ioctl
3620 * The intention is that disabling an re-enabling a stream will ideally be
3621 * cheaper than destroying and re-opening a stream with the same configuration,
3623 * must be retained between disabling and re-enabling a stream.
3626 * to attempt to read from the stream (-EIO).
3630 if (!stream->enabled) in i915_perf_disable_locked()
3633 /* Allow stream->ops->disable() to refer to this */ in i915_perf_disable_locked()
3634 stream->enabled = false; in i915_perf_disable_locked()
3636 if (stream->hold_preemption) in i915_perf_disable_locked()
3637 intel_context_clear_nopreempt(stream->pinned_ctx); in i915_perf_disable_locked()
3639 if (stream->ops->disable) in i915_perf_disable_locked()
3640 stream->ops->disable(stream); in i915_perf_disable_locked()
3647 long ret = stream->oa_config->id; in i915_perf_config_locked()
3649 config = i915_perf_get_oa_config(stream->perf, metrics_set); in i915_perf_config_locked()
3651 return -EINVAL; in i915_perf_config_locked()
3653 if (config != stream->oa_config) { in i915_perf_config_locked()
3667 config = xchg(&stream->oa_config, config); in i915_perf_config_locked()
3678 * i915_perf_ioctl_locked - support ioctl() usage with i915 perf stream FDs
3683 * Returns: zero on success or a negative error code. Returns -EINVAL for
3701 return -EINVAL; in i915_perf_ioctl_locked()
3705 * i915_perf_ioctl - support ioctl() usage with i915 perf stream FDs
3712 * Returns: zero on success or a negative error code. Returns -EINVAL for
3719 struct i915_perf_stream *stream = file->private_data; in i915_perf_ioctl()
3722 mutex_lock(&stream->lock); in i915_perf_ioctl()
3724 mutex_unlock(&stream->lock); in i915_perf_ioctl()
3730 * i915_perf_destroy_locked - destroy an i915 perf stream
3736 * Note: The >->perf.lock mutex has been taken to serialize
3737 * with any non-file-operation driver hooks.
3741 if (stream->enabled) in i915_perf_destroy_locked()
3744 if (stream->ops->destroy) in i915_perf_destroy_locked()
3745 stream->ops->destroy(stream); in i915_perf_destroy_locked()
3747 if (stream->ctx) in i915_perf_destroy_locked()
3748 i915_gem_context_put(stream->ctx); in i915_perf_destroy_locked()
3754 * i915_perf_release - handles userspace close() of a stream file
3766 struct i915_perf_stream *stream = file->private_data; in i915_perf_release()
3767 struct i915_perf *perf = stream->perf; in i915_perf_release()
3768 struct intel_gt *gt = stream->engine->gt; in i915_perf_release()
3772 * other user of stream->lock. Use the perf lock to destroy the stream in i915_perf_release()
3775 mutex_lock(>->perf.lock); in i915_perf_release()
3777 mutex_unlock(>->perf.lock); in i915_perf_release()
3780 drm_dev_put(&perf->i915->drm); in i915_perf_release()
3801 * i915_perf_open_ioctl_locked - DRM ioctl() for userspace to open a stream FD
3810 * behalf of i915_perf_open_ioctl() with the >->perf.lock mutex
3811 * taken to serialize with any non-file-operation driver hooks.
3837 if (props->single_context) { in i915_perf_open_ioctl_locked()
3838 u32 ctx_handle = props->ctx_handle; in i915_perf_open_ioctl_locked()
3839 struct drm_i915_file_private *file_priv = file->driver_priv; in i915_perf_open_ioctl_locked()
3843 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3855 * non-privileged client. in i915_perf_open_ioctl_locked()
3857 * For Gen8->11 the OA unit no longer supports clock gating off for a in i915_perf_open_ioctl_locked()
3859 * from updating as system-wide / global values. Even though we can in i915_perf_open_ioctl_locked()
3870 if (IS_HASWELL(perf->i915) && specific_ctx) in i915_perf_open_ioctl_locked()
3872 else if (GRAPHICS_VER(perf->i915) == 12 && specific_ctx && in i915_perf_open_ioctl_locked()
3873 (props->sample_flags & SAMPLE_OA_REPORT) == 0) in i915_perf_open_ioctl_locked()
3876 if (props->hold_preemption) { in i915_perf_open_ioctl_locked()
3877 if (!props->single_context) { in i915_perf_open_ioctl_locked()
3878 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3880 ret = -EINVAL; in i915_perf_open_ioctl_locked()
3889 if (props->has_sseu) in i915_perf_open_ioctl_locked()
3892 get_default_sseu_config(&props->sseu, props->engine); in i915_perf_open_ioctl_locked()
3901 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl_locked()
3903 ret = -EACCES; in i915_perf_open_ioctl_locked()
3909 ret = -ENOMEM; in i915_perf_open_ioctl_locked()
3913 stream->perf = perf; in i915_perf_open_ioctl_locked()
3914 stream->ctx = specific_ctx; in i915_perf_open_ioctl_locked()
3915 stream->poll_oa_period = props->poll_oa_period; in i915_perf_open_ioctl_locked()
3921 /* we avoid simply assigning stream->sample_flags = props->sample_flags in i915_perf_open_ioctl_locked()
3925 if (WARN_ON(stream->sample_flags != props->sample_flags)) { in i915_perf_open_ioctl_locked()
3926 ret = -ENODEV; in i915_perf_open_ioctl_locked()
3930 if (param->flags & I915_PERF_FLAG_FD_CLOEXEC) in i915_perf_open_ioctl_locked()
3932 if (param->flags & I915_PERF_FLAG_FD_NONBLOCK) in i915_perf_open_ioctl_locked()
3941 if (!(param->flags & I915_PERF_FLAG_DISABLED)) in i915_perf_open_ioctl_locked()
3947 drm_dev_get(&perf->i915->drm); in i915_perf_open_ioctl_locked()
3952 if (stream->ops->destroy) in i915_perf_open_ioctl_locked()
3953 stream->ops->destroy(stream); in i915_perf_open_ioctl_locked()
3966 u32 den = i915_perf_oa_timestamp_frequency(perf->i915); in oa_exponent_to_ns()
3968 return div_u64(nom + den - 1, den); in oa_exponent_to_ns()
3974 return test_bit(format, perf->format_mask); in oa_format_valid()
3980 __set_bit(format, perf->format_mask); in oa_format_add()
3984 * read_properties_unlocked - validate + copy userspace stream open properties
4014 props->poll_oa_period = DEFAULT_POLL_PERIOD_NS; in read_properties_unlocked()
4023 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4025 return -EINVAL; in read_properties_unlocked()
4045 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4047 return -EINVAL; in read_properties_unlocked()
4052 props->single_context = 1; in read_properties_unlocked()
4053 props->ctx_handle = value; in read_properties_unlocked()
4057 props->sample_flags |= SAMPLE_OA_REPORT; in read_properties_unlocked()
4061 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4063 return -EINVAL; in read_properties_unlocked()
4065 props->metrics_set = value; in read_properties_unlocked()
4069 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4070 "Out-of-range OA report format %llu\n", in read_properties_unlocked()
4072 return -EINVAL; in read_properties_unlocked()
4075 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4078 return -EINVAL; in read_properties_unlocked()
4080 props->oa_format = value; in read_properties_unlocked()
4084 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4087 return -EINVAL; in read_properties_unlocked()
4113 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4116 return -EACCES; in read_properties_unlocked()
4119 props->oa_periodic = true; in read_properties_unlocked()
4120 props->oa_period_exponent = value; in read_properties_unlocked()
4123 props->hold_preemption = !!value; in read_properties_unlocked()
4126 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 50)) { in read_properties_unlocked()
4127 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4129 GRAPHICS_VER_FULL(perf->i915)); in read_properties_unlocked()
4130 return -ENODEV; in read_properties_unlocked()
4136 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4138 return -EFAULT; in read_properties_unlocked()
4145 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4148 return -EINVAL; in read_properties_unlocked()
4150 props->poll_oa_period = value; in read_properties_unlocked()
4162 return -EINVAL; in read_properties_unlocked()
4170 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4171 "OA engine-class and engine-instance parameters must be passed together\n"); in read_properties_unlocked()
4172 return -EINVAL; in read_properties_unlocked()
4175 props->engine = intel_engine_lookup_user(perf->i915, class, instance); in read_properties_unlocked()
4176 if (!props->engine) { in read_properties_unlocked()
4177 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4180 return -EINVAL; in read_properties_unlocked()
4183 if (!engine_supports_oa(props->engine)) { in read_properties_unlocked()
4184 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4187 return -EINVAL; in read_properties_unlocked()
4195 if (IS_MEDIA_GT_IP_STEP(props->engine->gt, IP_VER(13, 0), STEP_A0, STEP_C0) && in read_properties_unlocked()
4196 props->engine->oa_group->type == TYPE_OAM && in read_properties_unlocked()
4197 intel_check_bios_c6_setup(&props->engine->gt->rc6)) { in read_properties_unlocked()
4198 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4200 return -EINVAL; in read_properties_unlocked()
4203 i = array_index_nospec(props->oa_format, I915_OA_FORMAT_MAX); in read_properties_unlocked()
4204 f = &perf->oa_formats[i]; in read_properties_unlocked()
4205 if (!engine_supports_oa_format(props->engine, f->type)) { in read_properties_unlocked()
4206 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4208 f->type, props->engine->class); in read_properties_unlocked()
4209 return -EINVAL; in read_properties_unlocked()
4213 ret = get_sseu_config(&props->sseu, props->engine, &user_sseu); in read_properties_unlocked()
4215 drm_dbg(&perf->i915->drm, in read_properties_unlocked()
4219 props->has_sseu = true; in read_properties_unlocked()
4226 * i915_perf_open_ioctl - DRM ioctl() for userspace to open a stream FD
4236 * i915-perf stream is expected to be a suitable interface for other forms of
4243 * i915_perf_open_ioctl_locked() after taking the >->perf.lock
4244 * mutex for serializing with any non-file-operation driver hooks.
4252 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_open_ioctl()
4259 if (!perf->i915) in i915_perf_open_ioctl()
4260 return -ENOTSUPP; in i915_perf_open_ioctl()
4265 if (param->flags & ~known_open_flags) { in i915_perf_open_ioctl()
4266 drm_dbg(&perf->i915->drm, in i915_perf_open_ioctl()
4268 return -EINVAL; in i915_perf_open_ioctl()
4272 u64_to_user_ptr(param->properties_ptr), in i915_perf_open_ioctl()
4273 param->num_properties, in i915_perf_open_ioctl()
4278 gt = props.engine->gt; in i915_perf_open_ioctl()
4280 mutex_lock(>->perf.lock); in i915_perf_open_ioctl()
4282 mutex_unlock(>->perf.lock); in i915_perf_open_ioctl()
4288 * i915_perf_register - exposes i915-perf to userspace
4293 * used to open an i915-perf stream.
4297 struct i915_perf *perf = &i915->perf; in i915_perf_register()
4300 if (!perf->i915) in i915_perf_register()
4307 mutex_lock(>->perf.lock); in i915_perf_register()
4309 perf->metrics_kobj = in i915_perf_register()
4311 &i915->drm.primary->kdev->kobj); in i915_perf_register()
4313 mutex_unlock(>->perf.lock); in i915_perf_register()
4317 * i915_perf_unregister - hide i915-perf from userspace
4320 * i915-perf state cleanup is split up into an 'unregister' and
4327 struct i915_perf *perf = &i915->perf; in i915_perf_unregister()
4329 if (!perf->metrics_kobj) in i915_perf_unregister()
4332 kobject_put(perf->metrics_kobj); in i915_perf_unregister()
4333 perf->metrics_kobj = NULL; in i915_perf_unregister()
4358 while (table->start || table->end) { in reg_in_range_table()
4359 if (addr >= table->start && addr <= table->end) in reg_in_range_table()
4372 { .start = 0x2710, .end = 0x272c }, /* OASTARTTRIG[1-8] */
4373 { .start = 0x2740, .end = 0x275c }, /* OAREPORTTRIG[1-8] */
4374 { .start = 0x2770, .end = 0x27ac }, /* OACEC[0-7][0-1] */
4380 { .start = 0xd900, .end = 0xd91c }, /* GEN12_OAG_OASTARTTRIG[1-8] */
4381 { .start = 0xd920, .end = 0xd93c }, /* GEN12_OAG_OAREPORTTRIG1[1-8] */
4382 { .start = 0xd940, .end = 0xd97c }, /* GEN12_OAG_CEC[0-7][0-1] */
4383 { .start = 0xdc00, .end = 0xdc3c }, /* GEN12_OAG_SCEC[0-7][0-1] */
4390 { .start = 0x393000, .end = 0x39301c }, /* GEN12_OAM_STARTTRIG1[1-8] */
4391 { .start = 0x393020, .end = 0x39303c }, /* GEN12_OAM_REPORTTRIG1[1-8] */
4392 { .start = 0x393040, .end = 0x39307c }, /* GEN12_OAM_CEC[0-7][0-1] */
4393 { .start = 0x393200, .end = 0x39323C }, /* MPES[0-7] */
4399 { .start = 0xdd00, .end = 0xdd48 }, /* OAG_LCE0_0 - OAA_LENABLE_REG */
4404 { .start = 0x91b8, .end = 0x91cc }, /* OA_PERFCNT[1-2], OA_PERFMATRIX */
4405 { .start = 0x9800, .end = 0x9888 }, /* MICRO_BP0_0 - NOA_WRITE */
4411 { .start = 0x09e80, .end = 0x09ea4 }, /* HSW_MBVID2_NOA[0-9] */
4423 { .start = 0x0d00, .end = 0x0d2c }, /* RPM_CONFIG[0-1], NOA_CONFIG[0-8] */
4429 { .start = 0x91c8, .end = 0x91dc }, /* OA_PERFCNT[3-4] */
4434 { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
4435 { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
4447 { .start = 0x0d00, .end = 0x0d04 }, /* RPM_CONFIG[0-1] */
4448 { .start = 0x0d0c, .end = 0x0d2c }, /* NOA_CONFIG[0-8] */
4492 if (HAS_OAM(perf->i915) && in mtl_is_valid_oam_b_counter_addr()
4493 GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in mtl_is_valid_oam_b_counter_addr()
4508 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in gen12_is_valid_mux_addr()
4548 return ERR_PTR(-EINVAL); in alloc_oa_regs()
4552 return ERR_PTR(-ENOMEM); in alloc_oa_regs()
4562 drm_dbg(&perf->i915->drm, in alloc_oa_regs()
4564 err = -EINVAL; in alloc_oa_regs()
4592 return sprintf(buf, "%d\n", oa_config->id); in show_dynamic_id()
4598 sysfs_attr_init(&oa_config->sysfs_metric_id.attr); in create_dynamic_oa_sysfs_entry()
4599 oa_config->sysfs_metric_id.attr.name = "id"; in create_dynamic_oa_sysfs_entry()
4600 oa_config->sysfs_metric_id.attr.mode = S_IRUGO; in create_dynamic_oa_sysfs_entry()
4601 oa_config->sysfs_metric_id.show = show_dynamic_id; in create_dynamic_oa_sysfs_entry()
4602 oa_config->sysfs_metric_id.store = NULL; in create_dynamic_oa_sysfs_entry()
4604 oa_config->attrs[0] = &oa_config->sysfs_metric_id.attr; in create_dynamic_oa_sysfs_entry()
4605 oa_config->attrs[1] = NULL; in create_dynamic_oa_sysfs_entry()
4607 oa_config->sysfs_metric.name = oa_config->uuid; in create_dynamic_oa_sysfs_entry()
4608 oa_config->sysfs_metric.attrs = oa_config->attrs; in create_dynamic_oa_sysfs_entry()
4610 return sysfs_create_group(perf->metrics_kobj, in create_dynamic_oa_sysfs_entry()
4611 &oa_config->sysfs_metric); in create_dynamic_oa_sysfs_entry()
4615 * i915_perf_add_config_ioctl - DRM ioctl() for userspace to add a new OA config
4630 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_add_config_ioctl()
4636 if (!perf->i915) in i915_perf_add_config_ioctl()
4637 return -ENOTSUPP; in i915_perf_add_config_ioctl()
4639 if (!perf->metrics_kobj) { in i915_perf_add_config_ioctl()
4640 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4642 return -EINVAL; in i915_perf_add_config_ioctl()
4646 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4648 return -EACCES; in i915_perf_add_config_ioctl()
4651 if ((!args->mux_regs_ptr || !args->n_mux_regs) && in i915_perf_add_config_ioctl()
4652 (!args->boolean_regs_ptr || !args->n_boolean_regs) && in i915_perf_add_config_ioctl()
4653 (!args->flex_regs_ptr || !args->n_flex_regs)) { in i915_perf_add_config_ioctl()
4654 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4656 return -EINVAL; in i915_perf_add_config_ioctl()
4661 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4663 return -ENOMEM; in i915_perf_add_config_ioctl()
4666 oa_config->perf = perf; in i915_perf_add_config_ioctl()
4667 kref_init(&oa_config->ref); in i915_perf_add_config_ioctl()
4669 if (!uuid_is_valid(args->uuid)) { in i915_perf_add_config_ioctl()
4670 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4672 err = -EINVAL; in i915_perf_add_config_ioctl()
4676 /* Last character in oa_config->uuid will be 0 because oa_config is in i915_perf_add_config_ioctl()
4679 memcpy(oa_config->uuid, args->uuid, sizeof(args->uuid)); in i915_perf_add_config_ioctl()
4681 oa_config->mux_regs_len = args->n_mux_regs; in i915_perf_add_config_ioctl()
4683 perf->ops.is_valid_mux_reg, in i915_perf_add_config_ioctl()
4684 u64_to_user_ptr(args->mux_regs_ptr), in i915_perf_add_config_ioctl()
4685 args->n_mux_regs); in i915_perf_add_config_ioctl()
4688 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4693 oa_config->mux_regs = regs; in i915_perf_add_config_ioctl()
4695 oa_config->b_counter_regs_len = args->n_boolean_regs; in i915_perf_add_config_ioctl()
4697 perf->ops.is_valid_b_counter_reg, in i915_perf_add_config_ioctl()
4698 u64_to_user_ptr(args->boolean_regs_ptr), in i915_perf_add_config_ioctl()
4699 args->n_boolean_regs); in i915_perf_add_config_ioctl()
4702 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4707 oa_config->b_counter_regs = regs; in i915_perf_add_config_ioctl()
4709 if (GRAPHICS_VER(perf->i915) < 8) { in i915_perf_add_config_ioctl()
4710 if (args->n_flex_regs != 0) { in i915_perf_add_config_ioctl()
4711 err = -EINVAL; in i915_perf_add_config_ioctl()
4715 oa_config->flex_regs_len = args->n_flex_regs; in i915_perf_add_config_ioctl()
4717 perf->ops.is_valid_flex_reg, in i915_perf_add_config_ioctl()
4718 u64_to_user_ptr(args->flex_regs_ptr), in i915_perf_add_config_ioctl()
4719 args->n_flex_regs); in i915_perf_add_config_ioctl()
4722 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4727 oa_config->flex_regs = regs; in i915_perf_add_config_ioctl()
4730 err = mutex_lock_interruptible(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4737 idr_for_each_entry(&perf->metrics_idr, tmp, id) { in i915_perf_add_config_ioctl()
4738 if (!strcmp(tmp->uuid, oa_config->uuid)) { in i915_perf_add_config_ioctl()
4739 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4741 err = -EADDRINUSE; in i915_perf_add_config_ioctl()
4748 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4754 oa_config->id = idr_alloc(&perf->metrics_idr, in i915_perf_add_config_ioctl()
4757 if (oa_config->id < 0) { in i915_perf_add_config_ioctl()
4758 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4760 err = oa_config->id; in i915_perf_add_config_ioctl()
4763 id = oa_config->id; in i915_perf_add_config_ioctl()
4765 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4766 "Added config %s id=%i\n", oa_config->uuid, oa_config->id); in i915_perf_add_config_ioctl()
4767 mutex_unlock(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4772 mutex_unlock(&perf->metrics_lock); in i915_perf_add_config_ioctl()
4775 drm_dbg(&perf->i915->drm, in i915_perf_add_config_ioctl()
4781 * i915_perf_remove_config_ioctl - DRM ioctl() for userspace to remove an OA config
4794 struct i915_perf *perf = &to_i915(dev)->perf; in i915_perf_remove_config_ioctl()
4799 if (!perf->i915) in i915_perf_remove_config_ioctl()
4800 return -ENOTSUPP; in i915_perf_remove_config_ioctl()
4803 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4805 return -EACCES; in i915_perf_remove_config_ioctl()
4808 ret = mutex_lock_interruptible(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4812 oa_config = idr_find(&perf->metrics_idr, *arg); in i915_perf_remove_config_ioctl()
4814 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4816 ret = -ENOENT; in i915_perf_remove_config_ioctl()
4820 GEM_BUG_ON(*arg != oa_config->id); in i915_perf_remove_config_ioctl()
4822 sysfs_remove_group(perf->metrics_kobj, &oa_config->sysfs_metric); in i915_perf_remove_config_ioctl()
4824 idr_remove(&perf->metrics_idr, *arg); in i915_perf_remove_config_ioctl()
4826 mutex_unlock(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4828 drm_dbg(&perf->i915->drm, in i915_perf_remove_config_ioctl()
4829 "Removed config %s id=%i\n", oa_config->uuid, oa_config->id); in i915_perf_remove_config_ioctl()
4836 mutex_unlock(&perf->metrics_lock); in i915_perf_remove_config_ioctl()
4868 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 70)) { in __oam_engine_group()
4873 drm_WARN_ON(&engine->i915->drm, in __oam_engine_group()
4874 engine->gt->type != GT_MEDIA); in __oam_engine_group()
4884 switch (engine->class) { in __oa_engine_group()
4929 int i, num_groups = gt->perf.num_perf_groups; in oa_init_groups()
4932 struct i915_perf_group *g = >->perf.group[i]; in oa_init_groups()
4935 if (g->num_engines == 0) in oa_init_groups()
4938 if (i == PERF_GROUP_OAG && gt->type != GT_MEDIA) { in oa_init_groups()
4939 g->regs = __oag_regs(); in oa_init_groups()
4940 g->type = TYPE_OAG; in oa_init_groups()
4941 } else if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in oa_init_groups()
4942 g->regs = __oam_regs(mtl_oa_base[i]); in oa_init_groups()
4943 g->type = TYPE_OAM; in oa_init_groups()
4957 return -ENOMEM; in oa_init_gt()
4962 engine->oa_group = NULL; in oa_init_gt()
4965 engine->oa_group = &g[index]; in oa_init_gt()
4969 gt->perf.num_perf_groups = num_groups; in oa_init_gt()
4970 gt->perf.group = g; in oa_init_gt()
4982 for_each_gt(gt, perf->i915, i) { in oa_init_engine_groups()
4993 struct drm_i915_private *i915 = perf->i915; in oa_init_supported_formats()
4994 enum intel_platform platform = INTEL_INFO(i915)->platform; in oa_init_supported_formats()
5049 struct i915_perf *perf = &i915->perf; in i915_perf_init_info()
5053 perf->ctx_oactxctrl_offset = 0x120; in i915_perf_init_info()
5054 perf->ctx_flexeu0_offset = 0x2ce; in i915_perf_init_info()
5055 perf->gen8_valid_ctx_bit = BIT(25); in i915_perf_init_info()
5058 perf->ctx_oactxctrl_offset = 0x128; in i915_perf_init_info()
5059 perf->ctx_flexeu0_offset = 0x3de; in i915_perf_init_info()
5060 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5063 perf->ctx_oactxctrl_offset = 0x124; in i915_perf_init_info()
5064 perf->ctx_flexeu0_offset = 0x78e; in i915_perf_init_info()
5065 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5068 perf->gen8_valid_ctx_bit = BIT(16); in i915_perf_init_info()
5071 * cache the value in perf->ctx_oactxctrl_offset. in i915_perf_init_info()
5080 * i915_perf_init - initialize i915-perf state on module bind
5083 * Initializes i915-perf state without exposing anything to userspace.
5085 * Note: i915-perf initialization is split into an 'init' and 'register'
5090 struct i915_perf *perf = &i915->perf; in i915_perf_init()
5092 perf->oa_formats = oa_formats; in i915_perf_init()
5094 perf->ops.is_valid_b_counter_reg = gen7_is_valid_b_counter_addr; in i915_perf_init()
5095 perf->ops.is_valid_mux_reg = hsw_is_valid_mux_addr; in i915_perf_init()
5096 perf->ops.is_valid_flex_reg = NULL; in i915_perf_init()
5097 perf->ops.enable_metric_set = hsw_enable_metric_set; in i915_perf_init()
5098 perf->ops.disable_metric_set = hsw_disable_metric_set; in i915_perf_init()
5099 perf->ops.oa_enable = gen7_oa_enable; in i915_perf_init()
5100 perf->ops.oa_disable = gen7_oa_disable; in i915_perf_init()
5101 perf->ops.read = gen7_oa_read; in i915_perf_init()
5102 perf->ops.oa_hw_tail_read = gen7_oa_hw_tail_read; in i915_perf_init()
5110 perf->ops.read = gen8_oa_read; in i915_perf_init()
5114 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5116 perf->ops.is_valid_mux_reg = in i915_perf_init()
5118 perf->ops.is_valid_flex_reg = in i915_perf_init()
5122 perf->ops.is_valid_mux_reg = in i915_perf_init()
5126 perf->ops.oa_enable = gen8_oa_enable; in i915_perf_init()
5127 perf->ops.oa_disable = gen8_oa_disable; in i915_perf_init()
5128 perf->ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
5129 perf->ops.disable_metric_set = gen8_disable_metric_set; in i915_perf_init()
5130 perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
5132 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5134 perf->ops.is_valid_mux_reg = in i915_perf_init()
5136 perf->ops.is_valid_flex_reg = in i915_perf_init()
5139 perf->ops.oa_enable = gen8_oa_enable; in i915_perf_init()
5140 perf->ops.oa_disable = gen8_oa_disable; in i915_perf_init()
5141 perf->ops.enable_metric_set = gen8_enable_metric_set; in i915_perf_init()
5142 perf->ops.disable_metric_set = gen11_disable_metric_set; in i915_perf_init()
5143 perf->ops.oa_hw_tail_read = gen8_oa_hw_tail_read; in i915_perf_init()
5145 perf->ops.is_valid_b_counter_reg = in i915_perf_init()
5149 perf->ops.is_valid_mux_reg = in i915_perf_init()
5151 perf->ops.is_valid_flex_reg = in i915_perf_init()
5154 perf->ops.oa_enable = gen12_oa_enable; in i915_perf_init()
5155 perf->ops.oa_disable = gen12_oa_disable; in i915_perf_init()
5156 perf->ops.enable_metric_set = gen12_enable_metric_set; in i915_perf_init()
5157 perf->ops.disable_metric_set = gen12_disable_metric_set; in i915_perf_init()
5158 perf->ops.oa_hw_tail_read = gen12_oa_hw_tail_read; in i915_perf_init()
5162 if (perf->ops.enable_metric_set) { in i915_perf_init()
5167 mutex_init(>->perf.lock); in i915_perf_init()
5170 oa_sample_rate_hard_limit = to_gt(i915)->clock_frequency / 2; in i915_perf_init()
5172 mutex_init(&perf->metrics_lock); in i915_perf_init()
5173 idr_init_base(&perf->metrics_idr, 1); in i915_perf_init()
5185 ratelimit_state_init(&perf->spurious_report_rs, 5 * HZ, 10); in i915_perf_init()
5190 ratelimit_set_flags(&perf->spurious_report_rs, in i915_perf_init()
5193 ratelimit_state_init(&perf->tail_pointer_race, in i915_perf_init()
5195 ratelimit_set_flags(&perf->tail_pointer_race, in i915_perf_init()
5198 atomic64_set(&perf->noa_programming_delay, in i915_perf_init()
5201 perf->i915 = i915; in i915_perf_init()
5205 drm_err(&i915->drm, in i915_perf_init()
5234 * i915_perf_fini - Counter part to i915_perf_init()
5239 struct i915_perf *perf = &i915->perf; in i915_perf_fini()
5243 if (!perf->i915) in i915_perf_fini()
5246 for_each_gt(gt, perf->i915, i) in i915_perf_fini()
5247 kfree(gt->perf.group); in i915_perf_fini()
5249 idr_for_each(&perf->metrics_idr, destroy_config, perf); in i915_perf_fini()
5250 idr_destroy(&perf->metrics_idr); in i915_perf_fini()
5252 memset(&perf->ops, 0, sizeof(perf->ops)); in i915_perf_fini()
5253 perf->i915 = NULL; in i915_perf_fini()
5257 * i915_perf_ioctl_version - Version of the i915-perf subsystem
5295 if (IS_MEDIA_GT_IP_STEP(i915->media_gt, IP_VER(13, 0), STEP_A0, STEP_C0) && in i915_perf_ioctl_version()
5296 intel_check_bios_c6_setup(&i915->media_gt->rc6)) in i915_perf_ioctl_version()