Lines Matching defs:drm_i915_private

195 struct drm_i915_private {  struct
196 	struct drm_device drm;
198 	struct intel_display display;
201 	bool do_release;
204 	struct i915_params params;
206 	const struct intel_device_info *__info; /* Use INTEL_INFO() to access. */
207 	struct intel_runtime_info __runtime; /* Use RUNTIME_INFO() to access. */
208 	struct intel_driver_caps caps;
210 	struct i915_dsm dsm;
212 	struct intel_uncore uncore;
213 	struct intel_uncore_mmio_debug mmio_debug;
215 	struct i915_virtual_gpu vgpu;
217 	struct intel_gvt *gvt;
219 	struct {
223 	} gmch;
236 	union {
241 	unsigned int engine_uabi_class_count[I915_LAST_UABI_ENGINE_CLASS + 1];
244 	spinlock_t irq_lock;
246 	bool display_irqs_enabled;
249 	struct mutex sb_lock;
250 	struct pm_qos_request sb_qos;
253 	union {
257 	u32 pipestat_irq_mask[I915_MAX_PIPES];
259 	bool preserve_bios_swizzle;
261 	unsigned int fsb_freq, mem_freq, is_ddr3;
262 	unsigned int skl_preferred_vco_freq;
264 	unsigned int max_dotclk_freq;
265 	unsigned int hpll_freq;
266 	unsigned int czclk_freq;
275 	struct workqueue_struct *wq;
285 	struct workqueue_struct *unordered_wq;
288 	const struct drm_i915_clock_gating_funcs *clock_gating_funcs;
291 	enum intel_pch pch_type;
292 	unsigned short pch_id;
294 	unsigned long gem_quirks;
296 	struct i915_gem_mm mm;
298 	struct intel_l3_parity l3_parity;
304 	u32 edram_size_mb;
306 	struct i915_gpu_error gpu_error;
308 	u32 suspend_count;
309 	struct i915_suspend_saved_registers regfile;
310 	struct vlv_s0ix_state *vlv_s0ix_state;
312 	struct dram_info {
327 	} dram_info;
329 	struct intel_runtime_pm runtime_pm;
331 	struct i915_perf perf;
333 	struct i915_hwmon *hwmon;
335 	struct intel_gt *gt[I915_MAX_GT];
337 	struct kobject *sysfs_gt;
340 	struct intel_gt *media_gt;
342 	struct {
379 static inline struct drm_i915_private *to_i915(const struct drm_device *dev)  in to_i915()  argument