gt/uc/intel_uc_fw.c

6 #include <linux/bitfield.h>
7 #include <linux/firmware.h>
8 #include <linux/highmem.h>
10 #include <drm/drm_cache.h>
11 #include <drm/drm_print.h>
13 #include "gem/i915_gem_lmem.h"
14 #include "gt/intel_gt.h"
15 #include "gt/intel_gt_print.h"
16 #include "intel_gsc_binary_headers.h"
17 #include "intel_gsc_fw.h"
18 #include "intel_uc_fw.h"
19 #include "intel_uc_fw_abi.h"
20 #include "i915_drv.h"
21 #include "i915_reg.h"
91 	fw_def(METEORLAKE,   0, guc_maj(mtl,  70, 12, 1)) \
92 	fw_def(DG2,          0, guc_maj(dg2,  70, 12, 1)) \
93 	fw_def(ALDERLAKE_P,  0, guc_maj(adlp, 70, 12, 1)) \
94 	fw_def(ALDERLAKE_P,  0, guc_mmp(adlp, 70, 1, 1)) \
96 	fw_def(ALDERLAKE_S,  0, guc_maj(tgl,  70, 12, 1)) \
97 	fw_def(ALDERLAKE_S,  0, guc_mmp(tgl,  70, 1, 1)) \
99 	fw_def(DG1,          0, guc_maj(dg1,  70, 5, 1)) \
100 	fw_def(ROCKETLAKE,   0, guc_mmp(tgl,  70, 1, 1)) \
101 	fw_def(TIGERLAKE,    0, guc_mmp(tgl,  70, 1, 1)) \
102 	fw_def(JASPERLAKE,   0, guc_mmp(ehl,  70, 1, 1)) \
103 	fw_def(ELKHARTLAKE,  0, guc_mmp(ehl,  70, 1, 1)) \
104 	fw_def(ICELAKE,      0, guc_mmp(icl,  70, 1, 1)) \
105 	fw_def(COMETLAKE,    5, guc_mmp(cml,  70, 1, 1)) \
106 	fw_def(COMETLAKE,    0, guc_mmp(kbl,  70, 1, 1)) \
107 	fw_def(COFFEELAKE,   0, guc_mmp(kbl,  70, 1, 1)) \
108 	fw_def(GEMINILAKE,   0, guc_mmp(glk,  70, 1, 1)) \
109 	fw_def(KABYLAKE,     0, guc_mmp(kbl,  70, 1, 1)) \
110 	fw_def(BROXTON,      0, guc_mmp(bxt,  70, 1, 1)) \
111 	fw_def(SKYLAKE,      0, guc_mmp(skl,  70, 1, 1))
135  * The GSC FW has multiple version (see intel_gsc_uc.h for details); since what
608 	if (uc_fw->file_selected.ver.major >= 70) {  in guc_read_css_info()
827 	new_guc = guc_ver->major > 70 ||  in check_mtl_huc_guc_compatibility()
828 		  (guc_ver->major == 70 && guc_ver->minor >= 7);  in check_mtl_huc_guc_compatibility()