Lines Matching +full:mode +full:- +full:xxx
88 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty()
89 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty()
98 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
110 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
126 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
135 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer()
137 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
150 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
166 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
173 if (msg->rx_len) { in intel_dsi_host_transfer()
180 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
187 /* ->rx_len is set only for reads */ in intel_dsi_host_transfer()
188 if (msg->rx_len) { in intel_dsi_host_transfer()
192 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
195 read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len); in intel_dsi_host_transfer()
198 /* XXX: fix for reads and writes */ in intel_dsi_host_transfer()
221 * send a video mode command
223 * XXX: commands with data in MIPI_DPI_DATA?
228 struct drm_encoder *encoder = &intel_dsi->base.base; in dpi_send_cmd()
229 struct drm_device *dev = encoder->dev; in dpi_send_cmd()
233 /* XXX: pipe, hs */ in dpi_send_cmd()
242 /* XXX: old code skips write if control unchanged */ in dpi_send_cmd()
244 drm_dbg_kms(&dev_priv->drm, in dpi_send_cmd()
251 drm_err(&dev_priv->drm, in dpi_send_cmd()
252 "Video mode command 0x%08x send failed.\n", cmd); in dpi_send_cmd()
275 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_compute_config()
278 struct intel_connector *intel_connector = intel_dsi->attached_connector; in intel_dsi_compute_config()
279 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_compute_config()
282 drm_dbg_kms(&dev_priv->drm, "\n"); in intel_dsi_compute_config()
283 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
284 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
294 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_dsi_compute_config()
295 return -EINVAL; in intel_dsi_compute_config()
297 /* DSI uses short packets for sync events, so clear mode flags for DSI */ in intel_dsi_compute_config()
298 adjusted_mode->flags = 0; in intel_dsi_compute_config()
300 if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888) in intel_dsi_compute_config()
301 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config()
303 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config()
307 pipe_config->mode_flags |= in intel_dsi_compute_config()
311 if (intel_dsi->ports == BIT(PORT_C)) in intel_dsi_compute_config()
312 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
314 pipe_config->cpu_transcoder = TRANSCODER_DSI_A; in intel_dsi_compute_config()
318 return -EINVAL; in intel_dsi_compute_config()
322 return -EINVAL; in intel_dsi_compute_config()
325 pipe_config->clock_set = true; in intel_dsi_compute_config()
332 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in glk_dsi_enable_io()
337 /* Set the MIPI mode in glk_dsi_enable_io()
341 for_each_dsi_port(port, intel_dsi->ports) in glk_dsi_enable_io()
348 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_enable_io()
355 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_enable_io()
358 drm_err(&dev_priv->drm, "MIPIO port is powergated\n"); in glk_dsi_enable_io()
362 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_enable_io()
372 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in glk_dsi_device_ready()
377 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_device_ready()
380 drm_err(&dev_priv->drm, "PHY is not ON\n"); in glk_dsi_device_ready()
387 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_device_ready()
400 drm_err(&dev_priv->drm, "ULPS not active\n"); in glk_dsi_device_ready()
406 /* Enter Normal Mode */ in glk_dsi_device_ready()
416 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_device_ready()
419 drm_err(&dev_priv->drm, in glk_dsi_device_ready()
424 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_device_ready()
427 drm_err(&dev_priv->drm, in glk_dsi_device_ready()
428 "D-PHY not entering LP-11 state\n"); in glk_dsi_device_ready()
434 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in bxt_dsi_device_ready()
439 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_device_ready()
442 for_each_dsi_port(port, intel_dsi->ports) { in bxt_dsi_device_ready()
448 for_each_dsi_port(port, intel_dsi->ports) { in bxt_dsi_device_ready()
460 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in vlv_dsi_device_ready()
464 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_device_ready()
475 for_each_dsi_port(port, intel_dsi->ports) { in vlv_dsi_device_ready()
500 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_device_ready()
512 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in glk_dsi_enter_low_power_mode()
517 for_each_dsi_port(port, intel_dsi->ports) in glk_dsi_enter_low_power_mode()
522 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_enter_low_power_mode()
525 drm_err(&dev_priv->drm, "PHY is not turning OFF\n"); in glk_dsi_enter_low_power_mode()
529 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_enter_low_power_mode()
532 drm_err(&dev_priv->drm, in glk_dsi_enter_low_power_mode()
539 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in glk_dsi_disable_mipi_io()
547 for_each_dsi_port(port, intel_dsi->ports) { in glk_dsi_disable_mipi_io()
550 drm_err(&dev_priv->drm, "PHY is not turning OFF\n"); in glk_dsi_disable_mipi_io()
553 /* Clear MIPI mode */ in glk_dsi_disable_mipi_io()
554 for_each_dsi_port(port, intel_dsi->ports) in glk_dsi_disable_mipi_io()
572 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in vlv_dsi_clear_device_ready()
576 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_clear_device_ready()
577 for_each_dsi_port(port, intel_dsi->ports) { in vlv_dsi_clear_device_ready()
595 * On VLV/CHV, wait till Clock lanes are in LP-00 state for MIPI in vlv_dsi_clear_device_ready()
601 drm_err(&dev_priv->drm, "DSI LP not going Low\n"); in vlv_dsi_clear_device_ready()
615 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_port_enable()
616 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsi_port_enable()
620 if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) { in intel_dsi_port_enable()
621 u32 temp = intel_dsi->pixel_overlap; in intel_dsi_port_enable()
624 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_port_enable()
635 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_port_enable()
644 if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) { in intel_dsi_port_enable()
645 temp |= (intel_dsi->dual_link - 1) in intel_dsi_port_enable()
650 temp |= crtc->pipe ? in intel_dsi_port_enable()
655 if (intel_dsi->pixel_format != MIPI_DSI_FMT_RGB888) in intel_dsi_port_enable()
666 struct drm_device *dev = encoder->base.dev; in intel_dsi_port_disable()
671 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_port_disable()
674 /* de-assert ip_tg_enable signal */ in intel_dsi_port_disable()
694 * v2 video mode seq v3 video mode seq command mode seq
695 * - power on - MIPIPanelPowerOn - power on
696 * - wait t1+t2 - wait t1+t2
697 * - MIPIDeassertResetPin - MIPIDeassertResetPin - MIPIDeassertResetPin
698 * - io lines to lp-11 - io lines to lp-11 - io lines to lp-11
699 * - MIPISendInitialDcsCmds - MIPISendInitialDcsCmds - MIPISendInitialDcsCmds
700 * - MIPITearOn
701 * - MIPIDisplayOn
702 * - turn on DPI - turn on DPI - set pipe to dsr mode
703 * - MIPIDisplayOn - MIPIDisplayOn
704 * - wait t5 - wait t5
705 * - backlight on - MIPIBacklightOn - backlight on
707 * - backlight off - MIPIBacklightOff - backlight off
708 * - wait t6 - wait t6
709 * - MIPIDisplayOff
710 * - turn off DPI - turn off DPI - disable pipe dsr mode
711 * - MIPITearOff
712 * - MIPIDisplayOff - MIPIDisplayOff
713 * - io lines to lp-00 - io lines to lp-00 - io lines to lp-00
714 * - MIPIAssertResetPin - MIPIAssertResetPin - MIPIAssertResetPin
715 * - wait t3 - wait t3
716 * - power off - MIPIPanelPowerOff - power off
717 * - wait t4 - wait t4
730 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dsi_pre_enable()
731 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_dsi_pre_enable()
732 enum pipe pipe = crtc->pipe; in intel_dsi_pre_enable()
736 drm_dbg_kms(&dev_priv->drm, "\n"); in intel_dsi_pre_enable()
772 /* Give the panel time to power-on and then deassert its reset */ in intel_dsi_pre_enable()
774 msleep(intel_dsi->panel_on_delay); in intel_dsi_pre_enable()
785 /* Put device in ready state (LP-11) */ in intel_dsi_pre_enable()
792 /* Send initialization commands in LP mode */ in intel_dsi_pre_enable()
796 * Enable port in pre-enable phase itself because as per hw team in intel_dsi_pre_enable()
800 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_pre_enable()
806 msleep(20); /* XXX */ in intel_dsi_pre_enable()
807 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_pre_enable()
837 struct drm_i915_private *i915 = to_i915(encoder->base.dev); in intel_dsi_disable()
841 drm_dbg_kms(&i915->drm, "\n"); in intel_dsi_disable()
852 /* Send Shutdown command to the panel in LP mode */ in intel_dsi_disable()
853 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_disable()
861 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_clear_device_ready()
874 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_post_disable()
878 drm_dbg_kms(&dev_priv->drm, "\n"); in intel_dsi_post_disable()
887 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_post_disable()
904 /* Transition to LP-00 */ in intel_dsi_post_disable()
929 msleep(intel_dsi->panel_off_delay); in intel_dsi_post_disable()
932 intel_dsi->panel_power_off_time = ktime_get_boottime(); in intel_dsi_post_disable()
938 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_get_hw_state()
944 drm_dbg_kms(&dev_priv->drm, "\n"); in intel_dsi_get_hw_state()
947 encoder->power_domain); in intel_dsi_get_hw_state()
960 /* XXX: this only works for one DSI output */ in intel_dsi_get_hw_state()
961 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_get_hw_state()
974 /* Try command mode if video mode not enabled */ in intel_dsi_get_hw_state()
992 if (drm_WARN_ON(&dev_priv->drm, tmp > PIPE_C)) in intel_dsi_get_hw_state()
1005 intel_display_power_put(dev_priv, encoder->power_domain, wakeref); in intel_dsi_get_hw_state()
1013 struct drm_device *dev = encoder->base.dev; in bxt_dsi_get_pipe_config()
1016 &pipe_config->hw.adjusted_mode; in bxt_dsi_get_pipe_config()
1018 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in bxt_dsi_get_pipe_config()
1020 unsigned int lane_count = intel_dsi->lane_count; in bxt_dsi_get_pipe_config()
1029 adjusted_mode_sw = &crtc->config->hw.adjusted_mode; in bxt_dsi_get_pipe_config()
1032 * Atleast one port is active as encoder->get_config called only if in bxt_dsi_get_pipe_config()
1033 * encoder->get_hw_state() returns true. in bxt_dsi_get_pipe_config()
1035 for_each_dsi_port(port, intel_dsi->ports) { in bxt_dsi_get_pipe_config()
1044 pipe_config->pipe_bpp = bdw_get_pipe_misc_bpp(crtc); in bxt_dsi_get_pipe_config()
1047 pipe_config->mode_flags |= in bxt_dsi_get_pipe_config()
1051 adjusted_mode->crtc_hdisplay = in bxt_dsi_get_pipe_config()
1054 adjusted_mode->crtc_vdisplay = in bxt_dsi_get_pipe_config()
1057 adjusted_mode->crtc_vtotal = in bxt_dsi_get_pipe_config()
1061 hactive = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1065 * Meaningful for video mode non-burst sync pulse mode only, in bxt_dsi_get_pipe_config()
1066 * can be zero for non-burst sync events and burst modes in bxt_dsi_get_pipe_config()
1073 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1075 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1077 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1079 if (intel_dsi->dual_link) { in bxt_dsi_get_pipe_config()
1089 adjusted_mode->crtc_htotal = hactive + hfp + hsync + hbp; in bxt_dsi_get_pipe_config()
1090 adjusted_mode->crtc_hsync_start = hfp + adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1091 adjusted_mode->crtc_hsync_end = hsync + adjusted_mode->crtc_hsync_start; in bxt_dsi_get_pipe_config()
1092 adjusted_mode->crtc_hblank_start = adjusted_mode->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1093 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_htotal; in bxt_dsi_get_pipe_config()
1095 adjusted_mode->crtc_vsync_start = vfp + adjusted_mode->crtc_vdisplay; in bxt_dsi_get_pipe_config()
1096 adjusted_mode->crtc_vsync_end = vsync + adjusted_mode->crtc_vsync_start; in bxt_dsi_get_pipe_config()
1097 adjusted_mode->crtc_vblank_start = adjusted_mode->crtc_vdisplay; in bxt_dsi_get_pipe_config()
1098 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal; in bxt_dsi_get_pipe_config()
1112 hfp_sw = adjusted_mode_sw->crtc_hsync_start - in bxt_dsi_get_pipe_config()
1113 adjusted_mode_sw->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1114 hsync_sw = adjusted_mode_sw->crtc_hsync_end - in bxt_dsi_get_pipe_config()
1115 adjusted_mode_sw->crtc_hsync_start; in bxt_dsi_get_pipe_config()
1116 hbp_sw = adjusted_mode_sw->crtc_htotal - in bxt_dsi_get_pipe_config()
1117 adjusted_mode_sw->crtc_hsync_end; in bxt_dsi_get_pipe_config()
1119 if (intel_dsi->dual_link) { in bxt_dsi_get_pipe_config()
1126 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1128 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1130 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1132 /* Reverse calculating the adjusted mode parameters from port reg vals*/ in bxt_dsi_get_pipe_config()
1134 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1136 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1138 intel_dsi->burst_mode_ratio); in bxt_dsi_get_pipe_config()
1140 if (intel_dsi->dual_link) { in bxt_dsi_get_pipe_config()
1146 crtc_htotal_sw = adjusted_mode_sw->crtc_hdisplay + hfp_sw + in bxt_dsi_get_pipe_config()
1148 crtc_hsync_start_sw = hfp_sw + adjusted_mode_sw->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1150 crtc_hblank_start_sw = adjusted_mode_sw->crtc_hdisplay; in bxt_dsi_get_pipe_config()
1153 if (adjusted_mode->crtc_htotal == crtc_htotal_sw) in bxt_dsi_get_pipe_config()
1154 adjusted_mode->crtc_htotal = adjusted_mode_sw->crtc_htotal; in bxt_dsi_get_pipe_config()
1156 if (adjusted_mode->crtc_hsync_start == crtc_hsync_start_sw) in bxt_dsi_get_pipe_config()
1157 adjusted_mode->crtc_hsync_start = in bxt_dsi_get_pipe_config()
1158 adjusted_mode_sw->crtc_hsync_start; in bxt_dsi_get_pipe_config()
1160 if (adjusted_mode->crtc_hsync_end == crtc_hsync_end_sw) in bxt_dsi_get_pipe_config()
1161 adjusted_mode->crtc_hsync_end = in bxt_dsi_get_pipe_config()
1162 adjusted_mode_sw->crtc_hsync_end; in bxt_dsi_get_pipe_config()
1164 if (adjusted_mode->crtc_hblank_start == crtc_hblank_start_sw) in bxt_dsi_get_pipe_config()
1165 adjusted_mode->crtc_hblank_start = in bxt_dsi_get_pipe_config()
1166 adjusted_mode_sw->crtc_hblank_start; in bxt_dsi_get_pipe_config()
1168 if (adjusted_mode->crtc_hblank_end == crtc_hblank_end_sw) in bxt_dsi_get_pipe_config()
1169 adjusted_mode->crtc_hblank_end = in bxt_dsi_get_pipe_config()
1170 adjusted_mode_sw->crtc_hblank_end; in bxt_dsi_get_pipe_config()
1176 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_get_config()
1180 drm_dbg_kms(&dev_priv->drm, "\n"); in intel_dsi_get_config()
1182 pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); in intel_dsi_get_config()
1191 pipe_config->port_clock = pclk; in intel_dsi_get_config()
1193 /* FIXME definitely not right for burst/cmd mode/pixel overlap */ in intel_dsi_get_config()
1194 pipe_config->hw.adjusted_mode.crtc_clock = pclk; in intel_dsi_get_config()
1195 if (intel_dsi->dual_link) in intel_dsi_get_config()
1196 pipe_config->hw.adjusted_mode.crtc_clock *= 2; in intel_dsi_get_config()
1216 struct drm_device *dev = encoder->dev; in set_dsi_timings()
1220 unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); in set_dsi_timings()
1221 unsigned int lane_count = intel_dsi->lane_count; in set_dsi_timings()
1225 hactive = adjusted_mode->crtc_hdisplay; in set_dsi_timings()
1226 hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay; in set_dsi_timings()
1227 hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; in set_dsi_timings()
1228 hbp = adjusted_mode->crtc_htotal - adjusted_mode->crtc_hsync_end; in set_dsi_timings()
1230 if (intel_dsi->dual_link) { in set_dsi_timings()
1232 if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) in set_dsi_timings()
1233 hactive += intel_dsi->pixel_overlap; in set_dsi_timings()
1239 vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay; in set_dsi_timings()
1240 vsync = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; in set_dsi_timings()
1241 vbp = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_end; in set_dsi_timings()
1245 intel_dsi->burst_mode_ratio); in set_dsi_timings()
1246 hfp = txbyteclkhs(hfp, bpp, lane_count, intel_dsi->burst_mode_ratio); in set_dsi_timings()
1248 intel_dsi->burst_mode_ratio); in set_dsi_timings()
1249 hbp = txbyteclkhs(hbp, bpp, lane_count, intel_dsi->burst_mode_ratio); in set_dsi_timings()
1251 for_each_dsi_port(port, intel_dsi->ports) { in set_dsi_timings()
1260 adjusted_mode->crtc_hdisplay); in set_dsi_timings()
1262 adjusted_mode->crtc_vdisplay); in set_dsi_timings()
1264 adjusted_mode->crtc_vtotal); in set_dsi_timings()
1271 /* meaningful for video mode non-burst sync pulse mode only, in set_dsi_timings()
1272 * can be zero for non-burst sync events and burst modes */ in set_dsi_timings()
1305 struct drm_encoder *encoder = &intel_encoder->base; in intel_dsi_prepare()
1306 struct drm_device *dev = encoder->dev; in intel_dsi_prepare()
1308 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dsi_prepare()
1310 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_prepare()
1312 unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); in intel_dsi_prepare()
1316 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(crtc->pipe)); in intel_dsi_prepare()
1318 mode_hdisplay = adjusted_mode->crtc_hdisplay; in intel_dsi_prepare()
1320 if (intel_dsi->dual_link) { in intel_dsi_prepare()
1322 if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) in intel_dsi_prepare()
1323 mode_hdisplay += intel_dsi->pixel_overlap; in intel_dsi_prepare()
1326 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_prepare()
1343 enum pipe pipe = crtc->pipe; in intel_dsi_prepare()
1349 /* XXX: why here, why like this? handling in irq handler?! */ in intel_dsi_prepare()
1354 intel_dsi->dphy_reg); in intel_dsi_prepare()
1357 …adjusted_mode->crtc_vdisplay << VERTICAL_ADDRESS_SHIFT | mode_hdisplay << HORIZONTAL_ADDRESS_SHIFT… in intel_dsi_prepare()
1362 val = intel_dsi->lane_count << DATA_LANES_PRG_REG_SHIFT; in intel_dsi_prepare()
1364 val |= intel_dsi->channel << CMD_MODE_CHANNEL_NUMBER_SHIFT; in intel_dsi_prepare()
1365 val |= CMD_MODE_DATA_WIDTH_8_BIT; /* XXX */ in intel_dsi_prepare()
1367 val |= intel_dsi->channel << VID_MODE_CHANNEL_NUMBER_SHIFT; in intel_dsi_prepare()
1368 val |= pixel_format_to_reg(intel_dsi->pixel_format); in intel_dsi_prepare()
1372 if (intel_dsi->eotp_pkt == 0) in intel_dsi_prepare()
1374 if (intel_dsi->clock_stop) in intel_dsi_prepare()
1383 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_prepare()
1390 * In burst mode, value greater than one DPI line Time in byte in intel_dsi_prepare()
1394 * In non-burst mode, Value greater than one DPI frame time in in intel_dsi_prepare()
1398 * In DBI only mode, value greater than one DBI frame time in in intel_dsi_prepare()
1404 intel_dsi->video_mode == BURST_MODE) { in intel_dsi_prepare()
1406 …txbyteclkhs(adjusted_mode->crtc_htotal, bpp, intel_dsi->lane_count, intel_dsi->burst_mode_ratio) +… in intel_dsi_prepare()
1409 …txbyteclkhs(adjusted_mode->crtc_vtotal * adjusted_mode->crtc_htotal, bpp, intel_dsi->lane_count, i… in intel_dsi_prepare()
1412 intel_dsi->lp_rx_timeout); in intel_dsi_prepare()
1414 intel_dsi->turn_arnd_val); in intel_dsi_prepare()
1416 intel_dsi->rst_timer_val); in intel_dsi_prepare()
1422 txclkesc(intel_dsi->escape_clk_div, 100)); in intel_dsi_prepare()
1425 !intel_dsi->dual_link) { in intel_dsi_prepare()
1430 * if not in dual link mode. in intel_dsi_prepare()
1434 intel_dsi->init_count); in intel_dsi_prepare()
1442 intel_dsi->init_count); in intel_dsi_prepare()
1447 * XXX: write MIPI_STOP_STATE_STALL? in intel_dsi_prepare()
1450 intel_dsi->hs_to_lp_count); in intel_dsi_prepare()
1452 /* XXX: low power clock equivalence in terms of byte clock. in intel_dsi_prepare()
1459 intel_dsi->lp_byte_clk); in intel_dsi_prepare()
1463 intel_dsi->lp_byte_clk); in intel_dsi_prepare()
1466 intel_dsi->dphy_reg); in intel_dsi_prepare()
1475 intel_dsi->bw_timer); in intel_dsi_prepare()
1478 …intel_dsi->clk_lp_to_hs_count << LP_HS_SSW_CNT_SHIFT | intel_dsi->clk_hs_to_lp_count << HS_LP_PWR_… in intel_dsi_prepare()
1481 u32 fmt = intel_dsi->video_frmt_cfg_bits | IP_TG_CONFIG; in intel_dsi_prepare()
1490 switch (intel_dsi->video_mode) { in intel_dsi_prepare()
1492 MISSING_CASE(intel_dsi->video_mode); in intel_dsi_prepare()
1512 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_dsi_unprepare()
1519 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_unprepare()
1540 struct drm_display_mode *mode) in vlv_dsi_mode_valid() argument
1542 struct drm_i915_private *i915 = to_i915(connector->dev); in vlv_dsi_mode_valid()
1547 status = intel_cpu_transcoder_mode_valid(i915, mode); in vlv_dsi_mode_valid()
1552 return intel_dsi_mode_valid(connector, mode); in vlv_dsi_mode_valid()
1578 intel_attach_scaling_mode_property(&connector->base); in vlv_dsi_add_properties()
1580 drm_connector_set_panel_orientation_with_quirk(&connector->base, in vlv_dsi_add_properties()
1582 fixed_mode->hdisplay, in vlv_dsi_add_properties()
1583 fixed_mode->vdisplay); in vlv_dsi_add_properties()
1595 struct drm_device *dev = intel_dsi->base.base.dev; in vlv_dphy_param_init()
1597 struct intel_connector *connector = intel_dsi->attached_connector; in vlv_dphy_param_init()
1598 struct mipi_config *mipi_config = connector->panel.vbt.dsi.config; in vlv_dphy_param_init()
1609 switch (intel_dsi->lane_count) { in vlv_dphy_param_init()
1627 tclk_prepare_clkzero = mipi_config->tclk_prepare_clkzero; in vlv_dphy_param_init()
1628 ths_prepare_hszero = mipi_config->ths_prepare_hszero; in vlv_dphy_param_init()
1634 intel_dsi->lp_byte_clk = DIV_ROUND_UP(tlpx_ns * ui_den, 8 * ui_num); in vlv_dphy_param_init()
1646 ths_prepare_ns = max(mipi_config->ths_prepare, in vlv_dphy_param_init()
1647 mipi_config->tclk_prepare); in vlv_dphy_param_init()
1653 drm_dbg_kms(&dev_priv->drm, "prepare count too high %u\n", in vlv_dphy_param_init()
1660 (ths_prepare_hszero - ths_prepare_ns) * ui_den, in vlv_dphy_param_init()
1674 drm_dbg_kms(&dev_priv->drm, "exit zero count too high %u\n", in vlv_dphy_param_init()
1681 (tclk_prepare_clkzero - ths_prepare_ns) in vlv_dphy_param_init()
1685 drm_dbg_kms(&dev_priv->drm, "clock zero count too high %u\n", in vlv_dphy_param_init()
1691 tclk_trail_ns = max(mipi_config->tclk_trail, mipi_config->ths_trail); in vlv_dphy_param_init()
1695 drm_dbg_kms(&dev_priv->drm, "trail count too high %u\n", in vlv_dphy_param_init()
1701 intel_dsi->dphy_reg = exit_zero_cnt << 24 | trail_cnt << 16 | in vlv_dphy_param_init()
1708 * HS to LP switch count = THS-TRAIL + 2TLPX + Extra Byte Count in vlv_dphy_param_init()
1722 hs_to_lp_switch = DIV_ROUND_UP(mipi_config->ths_trail + 2 * tlpx_ui, 8); in vlv_dphy_param_init()
1724 intel_dsi->hs_to_lp_count = max(lp_to_hs_switch, hs_to_lp_switch); in vlv_dphy_param_init()
1725 intel_dsi->hs_to_lp_count += extra_byte_count; in vlv_dphy_param_init()
1728 /* LP -> HS for clock lanes in vlv_dphy_param_init()
1736 intel_dsi->clk_lp_to_hs_count = in vlv_dphy_param_init()
1742 intel_dsi->clk_lp_to_hs_count += extra_byte_count; in vlv_dphy_param_init()
1744 /* HS->LP for Clock Lanes in vlv_dphy_param_init()
1751 intel_dsi->clk_hs_to_lp_count = in vlv_dphy_param_init()
1754 intel_dsi->clk_hs_to_lp_count += extra_byte_count; in vlv_dphy_param_init()
1766 * Original mode: "1280x800": 60 67700 1280 1312 1328 1376 800 808 812 820 0x8 0xa
1767 * Fixed mode: "1280x800": 60 67700 1280 1312 1328 1376 800 808 812 816 0x8 0xa
1769 * https://gitlab.freedesktop.org/drm/intel/-/issues/9381
1773 /* Cast away the const as we want to fixup the mode */ in vlv_dsi_asus_tf103c_mode_fixup()
1775 intel_panel_preferred_fixed_mode(intel_dsi->attached_connector); in vlv_dsi_asus_tf103c_mode_fixup()
1777 if (fixed_mode->vtotal == 820) in vlv_dsi_asus_tf103c_mode_fixup()
1778 fixed_mode->vtotal -= 4; in vlv_dsi_asus_tf103c_mode_fixup()
1783 * 1. The I2C MIPI sequence elements reference bus 3. ACPI has I2C1 - I2C7
1784 * which under Linux become bus 0 - 6. And the MIPI sequence reference
1789 * devices the I2C bus-numbers used in the MIPI sequences do
1796 * https://gitlab.freedesktop.org/drm/intel/-/issues/9379
1801 intel_panel_preferred_fixed_mode(intel_dsi->attached_connector); in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1802 struct drm_display_info *info = &intel_dsi->attached_connector->base.display_info; in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1804 intel_dsi->i2c_bus_num = 2; in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1810 if (fixed_mode->hdisplay == 1920) { in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1811 info->width_mm = 216; in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1812 info->height_mm = 135; in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1814 info->width_mm = 107; in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1815 info->height_mm = 171; in vlv_dsi_lenovo_yoga_tab2_size_fixup()
1820 * On the Lenovo Yoga Tab 3 Pro YT3-X90F there are 2 problems:
1826 * https://gitlab.freedesktop.org/drm/intel/-/issues/9380
1831 /* Header Seq-id 7, length after header 11 bytes */ in vlv_dsi_lenovo_yoga_tab3_backlight_fixup()
1833 /* MIPI_SEQ_ELEM_I2C bus 0 addr 0x2c reg 0x00 data-len 1 data 0x00 */ in vlv_dsi_lenovo_yoga_tab3_backlight_fixup()
1838 struct intel_connector *connector = intel_dsi->attached_connector; in vlv_dsi_lenovo_yoga_tab3_backlight_fixup()
1840 intel_dsi->i2c_bus_num = 0; in vlv_dsi_lenovo_yoga_tab3_backlight_fixup()
1841 connector->panel.vbt.dsi.sequence[MIPI_SEQ_BACKLIGHT_OFF] = backlight_off_sequence; in vlv_dsi_lenovo_yoga_tab3_backlight_fixup()
1861 DMI_MATCH(DMI_BOARD_NAME, "BYT-T FFD8"),
1868 /* Lenovo Yoga Tab 3 Pro YT3-X90F */
1872 DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"),
1891 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_init()
1898 dev_priv->display.dsi.mmio_base = BXT_MIPI_BASE; in vlv_dsi_init()
1900 dev_priv->display.dsi.mmio_base = VLV_MIPI_BASE; in vlv_dsi_init()
1912 intel_encoder = &intel_dsi->base; in vlv_dsi_init()
1913 encoder = &intel_encoder->base; in vlv_dsi_init()
1914 intel_dsi->attached_connector = intel_connector; in vlv_dsi_init()
1916 connector = &intel_connector->base; in vlv_dsi_init()
1918 drm_encoder_init(&dev_priv->drm, encoder, &intel_dsi_funcs, DRM_MODE_ENCODER_DSI, in vlv_dsi_init()
1921 intel_encoder->compute_config = intel_dsi_compute_config; in vlv_dsi_init()
1922 intel_encoder->pre_enable = intel_dsi_pre_enable; in vlv_dsi_init()
1924 intel_encoder->enable = bxt_dsi_enable; in vlv_dsi_init()
1925 intel_encoder->disable = intel_dsi_disable; in vlv_dsi_init()
1926 intel_encoder->post_disable = intel_dsi_post_disable; in vlv_dsi_init()
1927 intel_encoder->get_hw_state = intel_dsi_get_hw_state; in vlv_dsi_init()
1928 intel_encoder->get_config = intel_dsi_get_config; in vlv_dsi_init()
1929 intel_encoder->update_pipe = intel_backlight_update; in vlv_dsi_init()
1930 intel_encoder->shutdown = intel_dsi_shutdown; in vlv_dsi_init()
1932 intel_connector->get_hw_state = intel_connector_get_hw_state; in vlv_dsi_init()
1934 intel_encoder->port = port; in vlv_dsi_init()
1935 intel_encoder->type = INTEL_OUTPUT_DSI; in vlv_dsi_init()
1936 intel_encoder->power_domain = POWER_DOMAIN_PORT_DSI; in vlv_dsi_init()
1937 intel_encoder->cloneable = 0; in vlv_dsi_init()
1944 intel_encoder->pipe_mask = ~0; in vlv_dsi_init()
1946 intel_encoder->pipe_mask = BIT(PIPE_A); in vlv_dsi_init()
1948 intel_encoder->pipe_mask = BIT(PIPE_B); in vlv_dsi_init()
1950 intel_dsi->panel_power_off_time = ktime_get_boottime(); in vlv_dsi_init()
1952 intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL, NULL); in vlv_dsi_init()
1954 if (intel_connector->panel.vbt.dsi.config->dual_link) in vlv_dsi_init()
1955 intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C); in vlv_dsi_init()
1957 intel_dsi->ports = BIT(port); in vlv_dsi_init()
1959 if (drm_WARN_ON(&dev_priv->drm, intel_connector->panel.vbt.dsi.bl_ports & ~intel_dsi->ports)) in vlv_dsi_init()
1960 intel_connector->panel.vbt.dsi.bl_ports &= intel_dsi->ports; in vlv_dsi_init()
1962 if (drm_WARN_ON(&dev_priv->drm, intel_connector->panel.vbt.dsi.cabc_ports & ~intel_dsi->ports)) in vlv_dsi_init()
1963 intel_connector->panel.vbt.dsi.cabc_ports &= intel_dsi->ports; in vlv_dsi_init()
1966 for_each_dsi_port(port, intel_dsi->ports) { in vlv_dsi_init()
1974 intel_dsi->dsi_hosts[port] = host; in vlv_dsi_init()
1978 drm_dbg_kms(&dev_priv->drm, "no device found\n"); in vlv_dsi_init()
1982 /* Use clock read-back from current hw-state for fastboot */ in vlv_dsi_init()
1985 drm_dbg_kms(&dev_priv->drm, "Calculated pclk %d GOP %d\n", in vlv_dsi_init()
1986 intel_dsi->pclk, current_mode->clock); in vlv_dsi_init()
1987 if (intel_fuzzy_clock_check(intel_dsi->pclk, in vlv_dsi_init()
1988 current_mode->clock)) { in vlv_dsi_init()
1989 drm_dbg_kms(&dev_priv->drm, "Using GOP pclk\n"); in vlv_dsi_init()
1990 intel_dsi->pclk = current_mode->clock; in vlv_dsi_init()
2001 drm_connector_init(&dev_priv->drm, connector, &intel_dsi_connector_funcs, in vlv_dsi_init()
2006 connector->display_info.subpixel_order = SubPixelHorizontalRGB; /*XXX*/ in vlv_dsi_init()
2010 mutex_lock(&dev_priv->drm.mode_config.mutex); in vlv_dsi_init()
2012 mutex_unlock(&dev_priv->drm.mode_config.mutex); in vlv_dsi_init()
2015 drm_dbg_kms(&dev_priv->drm, "no fixed mode\n"); in vlv_dsi_init()
2022 (vlv_dsi_dmi_quirk_func)dmi_id->driver_data; in vlv_dsi_init()
2036 drm_connector_cleanup(&intel_connector->base); in vlv_dsi_init()
2038 drm_encoder_cleanup(&intel_encoder->base); in vlv_dsi_init()