Lines Matching +full:y +full:- +full:offset
1 // SPDX-License-Identifier: MIT
276 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_ratio()
278 if (fb->format->cpp[0] == 8) { in glk_plane_ratio()
303 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ratio()
305 if (fb->format->cpp[0] == 8) { in skl_plane_ratio()
329 int cpp = fb->format->cpp[color_plane]; in skl_plane_max_width()
331 switch (fb->modifier) { in skl_plane_max_width()
337 * - Ytile (already limited to 4k) in skl_plane_max_width()
338 * - FP16 (already limited to 4k) in skl_plane_max_width()
339 * - render compression (already limited to 4k) in skl_plane_max_width()
340 * - KVMR sprite and cursor (don't care) in skl_plane_max_width()
341 * - horizontal panning (TODO verify this) in skl_plane_max_width()
342 * - pipe and plane scaling (TODO verify this) in skl_plane_max_width()
359 MISSING_CASE(fb->modifier); in skl_plane_max_width()
368 int cpp = fb->format->cpp[color_plane]; in glk_plane_max_width()
370 switch (fb->modifier) { in glk_plane_max_width()
387 MISSING_CASE(fb->modifier); in glk_plane_max_width()
397 switch (fb->format->format) { in icl_plane_min_width()
436 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) in icl_hdr_plane_max_width()
468 struct drm_i915_private *i915 = to_i915(plane->base.dev); in skl_plane_max_stride()
470 int cpp = info->cpp[0]; in skl_plane_max_stride()
513 * in full-range YCbCr.
520 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in icl_program_input_csc()
521 enum pipe pipe = plane->pipe; in icl_program_input_csc()
522 enum plane_id plane_id = plane->id; in icl_program_input_csc()
526 * BT.601 full range YCbCr -> full range RGB in icl_program_input_csc()
529 * 1.000, -0.336, -0.698, in icl_program_input_csc()
538 * BT.709 full range YCbCr -> full range RGB in icl_program_input_csc()
541 * 1.000, -0.187, -0.468, in icl_program_input_csc()
550 * BT.2020 full range YCbCr -> full range RGB in icl_program_input_csc()
553 * 1.000, -0.1645, -0.5713, in icl_program_input_csc()
562 const u16 *csc = input_csc_matrix[plane_state->hw.color_encoding]; in icl_program_input_csc()
609 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_stride()
610 unsigned int rotation = plane_state->hw.rotation; in skl_plane_stride()
611 u32 stride = plane_state->view.color_plane[color_plane].scanout_stride; in skl_plane_stride()
613 if (color_plane >= fb->format->num_planes) in skl_plane_stride()
623 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_disable_arm()
624 enum plane_id plane_id = plane->id; in skl_plane_disable_arm()
625 enum pipe pipe = plane->pipe; in skl_plane_disable_arm()
636 struct drm_i915_private *i915 = to_i915(plane->base.dev); in icl_plane_disable_sel_fetch_arm()
637 enum pipe pipe = plane->pipe; in icl_plane_disable_sel_fetch_arm()
639 if (!crtc_state->enable_psr2_sel_fetch) in icl_plane_disable_sel_fetch_arm()
642 intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id), 0); in icl_plane_disable_sel_fetch_arm()
649 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in icl_plane_disable_arm()
650 enum plane_id plane_id = plane->id; in icl_plane_disable_arm()
651 enum pipe pipe = plane->pipe; in icl_plane_disable_arm()
667 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_get_hw_state()
669 enum plane_id plane_id = plane->id; in skl_plane_get_hw_state()
673 power_domain = POWER_DOMAIN_PIPE(plane->pipe); in skl_plane_get_hw_state()
678 ret = intel_de_read(dev_priv, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE; in skl_plane_get_hw_state()
680 *pipe = plane->pipe; in skl_plane_get_hw_state()
751 if (!plane_state->hw.fb->format->has_alpha) in skl_plane_ctl_alpha()
754 switch (plane_state->hw.pixel_blend_mode) { in skl_plane_ctl_alpha()
762 MISSING_CASE(plane_state->hw.pixel_blend_mode); in skl_plane_ctl_alpha()
769 if (!plane_state->hw.fb->format->has_alpha) in glk_plane_color_ctl_alpha()
772 switch (plane_state->hw.pixel_blend_mode) { in glk_plane_color_ctl_alpha()
780 MISSING_CASE(plane_state->hw.pixel_blend_mode); in glk_plane_color_ctl_alpha()
873 const struct drm_framebuffer *fb = plane_state->hw.fb; in adlp_plane_ctl_arb_slots()
875 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { in adlp_plane_ctl_arb_slots()
876 switch (fb->format->cpp[0]) { in adlp_plane_ctl_arb_slots()
883 switch (fb->format->cpp[0]) { in adlp_plane_ctl_arb_slots()
896 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in skl_plane_ctl_crtc()
902 if (crtc_state->gamma_enable) in skl_plane_ctl_crtc()
905 if (crtc_state->csc_enable) in skl_plane_ctl_crtc()
915 to_i915(plane_state->uapi.plane->dev); in skl_plane_ctl()
916 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ctl()
917 unsigned int rotation = plane_state->hw.rotation; in skl_plane_ctl()
918 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_ctl()
927 if (plane_state->hw.color_encoding == DRM_COLOR_YCBCR_BT709) in skl_plane_ctl()
930 if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE) in skl_plane_ctl()
934 plane_ctl |= skl_plane_ctl_format(fb->format->format); in skl_plane_ctl()
935 plane_ctl |= skl_plane_ctl_tiling(fb->modifier); in skl_plane_ctl()
942 if (key->flags & I915_SET_COLORKEY_DESTINATION) in skl_plane_ctl()
944 else if (key->flags & I915_SET_COLORKEY_SOURCE) in skl_plane_ctl()
947 /* Wa_22012358565:adl-p */ in skl_plane_ctl()
956 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in glk_plane_color_ctl_crtc()
962 if (crtc_state->gamma_enable) in glk_plane_color_ctl_crtc()
965 if (crtc_state->csc_enable) in glk_plane_color_ctl_crtc()
975 to_i915(plane_state->uapi.plane->dev); in glk_plane_color_ctl()
976 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_color_ctl()
977 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in glk_plane_color_ctl()
983 if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) { in glk_plane_color_ctl()
984 switch (plane_state->hw.color_encoding) { in glk_plane_color_ctl()
996 if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE) in glk_plane_color_ctl()
998 } else if (fb->format->is_yuv) { in glk_plane_color_ctl()
1000 if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE) in glk_plane_color_ctl()
1004 if (plane_state->force_black) in glk_plane_color_ctl()
1013 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in skl_surf_address()
1014 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_surf_address()
1015 u32 offset = plane_state->view.color_plane[color_plane].offset; in skl_surf_address() local
1019 * The DPT object contains only one vma, so the VMA's offset in skl_surf_address()
1022 drm_WARN_ON(&i915->drm, plane_state->dpt_vma && in skl_surf_address()
1023 plane_state->dpt_vma->node.start); in skl_surf_address()
1024 drm_WARN_ON(&i915->drm, offset & 0x1fffff); in skl_surf_address()
1025 return offset >> 9; in skl_surf_address()
1027 drm_WARN_ON(&i915->drm, offset & 0xfff); in skl_surf_address()
1028 return offset; in skl_surf_address()
1040 if (plane_state->decrypt) in skl_plane_surf()
1049 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in skl_plane_aux_dist()
1050 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_aux_dist()
1057 aux_dist = skl_surf_address(plane_state, aux_plane) - in skl_plane_aux_dist()
1068 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_keyval()
1070 return key->min_value; in skl_plane_keyval()
1075 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_keymax()
1076 u8 alpha = plane_state->hw.alpha >> 8; in skl_plane_keymax()
1078 return (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha); in skl_plane_keymax()
1083 const struct drm_intel_sprite_colorkey *key = &plane_state->ckey; in skl_plane_keymsk()
1084 u8 alpha = plane_state->hw.alpha >> 8; in skl_plane_keymsk()
1087 keymsk = key->channel_mask & 0x7ffffff; in skl_plane_keymsk()
1096 struct drm_i915_private *i915 = to_i915(plane->base.dev); in icl_plane_csc_load_black()
1097 enum plane_id plane_id = plane->id; in icl_plane_csc_load_black()
1098 enum pipe pipe = plane->pipe; in icl_plane_csc_load_black()
1121 if (plane_state->planar_linked_plane && !plane_state->planar_slave) in icl_plane_color_plane()
1132 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_update_noarm()
1133 enum plane_id plane_id = plane->id; in skl_plane_update_noarm()
1134 enum pipe pipe = plane->pipe; in skl_plane_update_noarm()
1136 int crtc_x = plane_state->uapi.dst.x1; in skl_plane_update_noarm()
1137 int crtc_y = plane_state->uapi.dst.y1; in skl_plane_update_noarm()
1138 u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_plane_update_noarm()
1139 u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16; in skl_plane_update_noarm()
1142 if (plane_state->scaler_id >= 0) { in skl_plane_update_noarm()
1152 PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1)); in skl_plane_update_noarm()
1162 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_update_arm()
1163 enum plane_id plane_id = plane->id; in skl_plane_update_arm()
1164 enum pipe pipe = plane->pipe; in skl_plane_update_arm()
1165 u32 x = plane_state->view.color_plane[0].x; in skl_plane_update_arm()
1166 u32 y = plane_state->view.color_plane[0].y; in skl_plane_update_arm() local
1169 plane_ctl = plane_state->ctl | in skl_plane_update_arm()
1173 plane_color_ctl = plane_state->color_ctl | in skl_plane_update_arm()
1181 PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x)); in skl_plane_update_arm()
1187 PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) | in skl_plane_update_arm()
1188 PLANE_OFFSET_X(plane_state->view.color_plane[1].x)); in skl_plane_update_arm()
1200 if (plane_state->scaler_id >= 0) in skl_plane_update_arm()
1204 * The control register self-arms if the plane was previously in skl_plane_update_arm()
1218 struct drm_i915_private *i915 = to_i915(plane->base.dev); in icl_plane_update_sel_fetch_noarm()
1219 enum pipe pipe = plane->pipe; in icl_plane_update_sel_fetch_noarm()
1222 int x, y; in icl_plane_update_sel_fetch_noarm() local
1224 if (!crtc_state->enable_psr2_sel_fetch) in icl_plane_update_sel_fetch_noarm()
1227 clip = &plane_state->psr2_sel_fetch_area; in icl_plane_update_sel_fetch_noarm()
1229 val = (clip->y1 + plane_state->uapi.dst.y1) << 16; in icl_plane_update_sel_fetch_noarm()
1230 val |= plane_state->uapi.dst.x1; in icl_plane_update_sel_fetch_noarm()
1231 intel_de_write_fw(i915, PLANE_SEL_FETCH_POS(pipe, plane->id), val); in icl_plane_update_sel_fetch_noarm()
1233 x = plane_state->view.color_plane[color_plane].x; in icl_plane_update_sel_fetch_noarm()
1236 * From Bspec: UV surface Start Y Position = half of Y plane Y in icl_plane_update_sel_fetch_noarm()
1240 y = plane_state->view.color_plane[color_plane].y + clip->y1; in icl_plane_update_sel_fetch_noarm()
1242 y = plane_state->view.color_plane[color_plane].y + clip->y1 / 2; in icl_plane_update_sel_fetch_noarm()
1244 val = y << 16 | x; in icl_plane_update_sel_fetch_noarm()
1246 intel_de_write_fw(i915, PLANE_SEL_FETCH_OFFSET(pipe, plane->id), in icl_plane_update_sel_fetch_noarm()
1250 val = (drm_rect_height(clip) - 1) << 16; in icl_plane_update_sel_fetch_noarm()
1251 val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1; in icl_plane_update_sel_fetch_noarm()
1252 intel_de_write_fw(i915, PLANE_SEL_FETCH_SIZE(pipe, plane->id), val); in icl_plane_update_sel_fetch_noarm()
1260 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in icl_plane_update_noarm()
1261 enum plane_id plane_id = plane->id; in icl_plane_update_noarm()
1262 enum pipe pipe = plane->pipe; in icl_plane_update_noarm()
1265 const struct drm_framebuffer *fb = plane_state->hw.fb; in icl_plane_update_noarm()
1266 int crtc_x = plane_state->uapi.dst.x1; in icl_plane_update_noarm()
1267 int crtc_y = plane_state->uapi.dst.y1; in icl_plane_update_noarm()
1268 int x = plane_state->view.color_plane[color_plane].x; in icl_plane_update_noarm()
1269 int y = plane_state->view.color_plane[color_plane].y; in icl_plane_update_noarm() local
1270 int src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in icl_plane_update_noarm()
1271 int src_h = drm_rect_height(&plane_state->uapi.src) >> 16; in icl_plane_update_noarm()
1274 plane_color_ctl = plane_state->color_ctl | in icl_plane_update_noarm()
1278 if (plane_state->scaler_id >= 0) { in icl_plane_update_noarm()
1288 PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1)); in icl_plane_update_noarm()
1295 PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x)); in icl_plane_update_noarm()
1297 if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier)) { in icl_plane_update_noarm()
1299 lower_32_bits(plane_state->ccval)); in icl_plane_update_noarm()
1301 upper_32_bits(plane_state->ccval)); in icl_plane_update_noarm()
1311 plane_state->cus_ctl); in icl_plane_update_noarm()
1315 if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id)) in icl_plane_update_noarm()
1324 if (plane_state->force_black) in icl_plane_update_noarm()
1334 struct drm_i915_private *i915 = to_i915(plane->base.dev); in icl_plane_update_sel_fetch_arm()
1335 enum pipe pipe = plane->pipe; in icl_plane_update_sel_fetch_arm()
1337 if (!crtc_state->enable_psr2_sel_fetch) in icl_plane_update_sel_fetch_arm()
1340 if (drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0) in icl_plane_update_sel_fetch_arm()
1341 intel_de_write_fw(i915, PLANE_SEL_FETCH_CTL(pipe, plane->id), in icl_plane_update_sel_fetch_arm()
1352 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in icl_plane_update_arm()
1353 enum plane_id plane_id = plane->id; in icl_plane_update_arm()
1354 enum pipe pipe = plane->pipe; in icl_plane_update_arm()
1358 plane_ctl = plane_state->ctl | in icl_plane_update_arm()
1368 if (plane_state->scaler_id >= 0) in icl_plane_update_arm()
1374 * The control register self-arms if the plane was previously in icl_plane_update_arm()
1389 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_async_flip()
1390 enum plane_id plane_id = plane->id; in skl_plane_async_flip()
1391 enum pipe pipe = plane->pipe; in skl_plane_async_flip()
1392 u32 plane_ctl = plane_state->ctl; in skl_plane_async_flip()
1419 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_plane_check_fb()
1420 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_check_fb()
1421 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_check_fb()
1422 unsigned int rotation = plane_state->hw.rotation; in skl_plane_check_fb()
1428 intel_fb_is_ccs_modifier(fb->modifier)) { in skl_plane_check_fb()
1429 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_fb()
1432 return -EINVAL; in skl_plane_check_fb()
1436 fb->modifier == DRM_FORMAT_MOD_LINEAR) { in skl_plane_check_fb()
1437 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_fb()
1439 return -EINVAL; in skl_plane_check_fb()
1444 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_fb()
1445 "Y/Yf tiling required for 90/270!\n"); in skl_plane_check_fb()
1446 return -EINVAL; in skl_plane_check_fb()
1451 * Indexed 8-bit. RGB 16-bit 5:6:5 is allowed gen11 onwards. in skl_plane_check_fb()
1453 switch (fb->format->format) { in skl_plane_check_fb()
1468 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_fb()
1470 &fb->format->format); in skl_plane_check_fb()
1471 return -EINVAL; in skl_plane_check_fb()
1477 /* Y-tiling is not supported in IF-ID Interlace mode */ in skl_plane_check_fb()
1478 if (crtc_state->hw.enable && in skl_plane_check_fb()
1479 crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE && in skl_plane_check_fb()
1480 fb->modifier != DRM_FORMAT_MOD_LINEAR && in skl_plane_check_fb()
1481 fb->modifier != I915_FORMAT_MOD_X_TILED) { in skl_plane_check_fb()
1482 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_fb()
1483 "Y/Yf tiling not supported in IF-ID mode\n"); in skl_plane_check_fb()
1484 return -EINVAL; in skl_plane_check_fb()
1487 /* Wa_1606054188:tgl,adl-s */ in skl_plane_check_fb()
1489 plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE && in skl_plane_check_fb()
1490 intel_format_is_p01x(fb->format->format)) { in skl_plane_check_fb()
1491 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_fb()
1493 return -EINVAL; in skl_plane_check_fb()
1503 to_i915(plane_state->uapi.plane->dev); in skl_plane_check_dst_coordinates()
1504 int crtc_x = plane_state->uapi.dst.x1; in skl_plane_check_dst_coordinates()
1505 int crtc_w = drm_rect_width(&plane_state->uapi.dst); in skl_plane_check_dst_coordinates()
1506 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in skl_plane_check_dst_coordinates()
1518 (crtc_x + crtc_w < 4 || crtc_x > pipe_src_w - 4)) { in skl_plane_check_dst_coordinates()
1519 drm_dbg_kms(&dev_priv->drm, in skl_plane_check_dst_coordinates()
1520 "requested plane X %s position %d invalid (valid range %d-%d)\n", in skl_plane_check_dst_coordinates()
1523 4, pipe_src_w - 4); in skl_plane_check_dst_coordinates()
1524 return -ERANGE; in skl_plane_check_dst_coordinates()
1532 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in skl_plane_check_nv12_rotation()
1533 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_check_nv12_rotation()
1534 unsigned int rotation = plane_state->hw.rotation; in skl_plane_check_nv12_rotation()
1535 int src_w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_plane_check_nv12_rotation()
1538 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) && in skl_plane_check_nv12_rotation()
1542 drm_dbg_kms(&i915->drm, "src width must be multiple of 4 for rotated planar YUV\n"); in skl_plane_check_nv12_rotation()
1543 return -EINVAL; in skl_plane_check_nv12_rotation()
1559 !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) in skl_plane_max_scale()
1560 return 0x30000 - 1; in skl_plane_max_scale()
1562 return 0x20000 - 1; in skl_plane_max_scale()
1570 if (plane->min_width) in intel_plane_min_width()
1571 return plane->min_width(fb, color_plane, rotation); in intel_plane_min_width()
1581 if (plane->max_width) in intel_plane_max_width()
1582 return plane->max_width(fb, color_plane, rotation); in intel_plane_max_width()
1592 if (plane->max_height) in intel_plane_max_height()
1593 return plane->max_height(fb, color_plane, rotation); in intel_plane_max_height()
1603 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_main_ccs_coordinates()
1604 int aux_x = plane_state->view.color_plane[ccs_plane].x; in skl_check_main_ccs_coordinates()
1605 int aux_y = plane_state->view.color_plane[ccs_plane].y; in skl_check_main_ccs_coordinates()
1606 u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset; in skl_check_main_ccs_coordinates()
1613 int x, y; in skl_check_main_ccs_coordinates() local
1622 y = aux_y / vsub; in skl_check_main_ccs_coordinates()
1623 aux_offset = intel_plane_adjust_aligned_offset(&x, &y, in skl_check_main_ccs_coordinates()
1627 aux_offset - in skl_check_main_ccs_coordinates()
1630 aux_y = y * vsub + aux_y % vsub; in skl_check_main_ccs_coordinates()
1636 plane_state->view.color_plane[ccs_plane].offset = aux_offset; in skl_check_main_ccs_coordinates()
1637 plane_state->view.color_plane[ccs_plane].x = aux_x; in skl_check_main_ccs_coordinates()
1638 plane_state->view.color_plane[ccs_plane].y = aux_y; in skl_check_main_ccs_coordinates()
1645 int *x, int *y, u32 *offset) in skl_calc_main_surface_offset() argument
1647 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_calc_main_surface_offset()
1648 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_calc_main_surface_offset()
1649 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_calc_main_surface_offset()
1651 const u32 aux_offset = plane_state->view.color_plane[aux_plane].offset; in skl_calc_main_surface_offset()
1653 const int w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_calc_main_surface_offset()
1655 intel_add_fb_offsets(x, y, plane_state, 0); in skl_calc_main_surface_offset()
1656 *offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0); in skl_calc_main_surface_offset()
1657 if (drm_WARN_ON(&dev_priv->drm, alignment && !is_power_of_2(alignment))) in skl_calc_main_surface_offset()
1658 return -EINVAL; in skl_calc_main_surface_offset()
1661 * AUX surface offset is specified as the distance from the in skl_calc_main_surface_offset()
1662 * main surface offset, and it must be non-negative. Make in skl_calc_main_surface_offset()
1665 if (aux_plane && *offset > aux_offset) in skl_calc_main_surface_offset()
1666 *offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0, in skl_calc_main_surface_offset()
1667 *offset, in skl_calc_main_surface_offset()
1668 aux_offset & ~(alignment - 1)); in skl_calc_main_surface_offset()
1671 * When using an X-tiled surface, the plane blows up in skl_calc_main_surface_offset()
1672 * if the x offset + width exceed the stride. in skl_calc_main_surface_offset()
1674 * TODO: linear and Y-tiled seem fine, Yf untested, in skl_calc_main_surface_offset()
1676 if (fb->modifier == I915_FORMAT_MOD_X_TILED) { in skl_calc_main_surface_offset()
1677 int cpp = fb->format->cpp[0]; in skl_calc_main_surface_offset()
1679 while ((*x + w) * cpp > plane_state->view.color_plane[0].mapping_stride) { in skl_calc_main_surface_offset()
1680 if (*offset == 0) { in skl_calc_main_surface_offset()
1681 drm_dbg_kms(&dev_priv->drm, in skl_calc_main_surface_offset()
1682 "Unable to find suitable display surface offset due to X-tiling\n"); in skl_calc_main_surface_offset()
1683 return -EINVAL; in skl_calc_main_surface_offset()
1686 *offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0, in skl_calc_main_surface_offset()
1687 *offset, in skl_calc_main_surface_offset()
1688 *offset - alignment); in skl_calc_main_surface_offset()
1697 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_check_main_surface()
1698 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_check_main_surface()
1699 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_main_surface()
1700 const unsigned int rotation = plane_state->hw.rotation; in skl_check_main_surface()
1701 int x = plane_state->uapi.src.x1 >> 16; in skl_check_main_surface()
1702 int y = plane_state->uapi.src.y1 >> 16; in skl_check_main_surface() local
1703 const int w = drm_rect_width(&plane_state->uapi.src) >> 16; in skl_check_main_surface()
1704 const int h = drm_rect_height(&plane_state->uapi.src) >> 16; in skl_check_main_surface()
1710 u32 offset; in skl_check_main_surface() local
1714 drm_dbg_kms(&dev_priv->drm, in skl_check_main_surface()
1715 "requested Y/RGB source size %dx%d outside limits (min: %dx1 max: %dx%d)\n", in skl_check_main_surface()
1717 return -EINVAL; in skl_check_main_surface()
1720 ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset); in skl_check_main_surface()
1725 * CCS AUX surface doesn't have its own x/y offsets, we must make sure in skl_check_main_surface()
1726 * they match with the main surface x/y offsets. On DG2 in skl_check_main_surface()
1729 if (intel_fb_is_ccs_modifier(fb->modifier) && aux_plane) { in skl_check_main_surface()
1730 while (!skl_check_main_ccs_coordinates(plane_state, x, y, in skl_check_main_surface()
1731 offset, aux_plane)) { in skl_check_main_surface()
1732 if (offset == 0) in skl_check_main_surface()
1735 offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0, in skl_check_main_surface()
1736 offset, offset - alignment); in skl_check_main_surface()
1739 if (x != plane_state->view.color_plane[aux_plane].x || in skl_check_main_surface()
1740 y != plane_state->view.color_plane[aux_plane].y) { in skl_check_main_surface()
1741 drm_dbg_kms(&dev_priv->drm, in skl_check_main_surface()
1742 "Unable to find suitable display surface offset due to CCS\n"); in skl_check_main_surface()
1743 return -EINVAL; in skl_check_main_surface()
1748 drm_WARN_ON(&dev_priv->drm, x > 65535 || y > 65535); in skl_check_main_surface()
1750 drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191); in skl_check_main_surface()
1752 plane_state->view.color_plane[0].offset = offset; in skl_check_main_surface()
1753 plane_state->view.color_plane[0].x = x; in skl_check_main_surface()
1754 plane_state->view.color_plane[0].y = y; in skl_check_main_surface()
1760 drm_rect_translate_to(&plane_state->uapi.src, in skl_check_main_surface()
1761 x << 16, y << 16); in skl_check_main_surface()
1768 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_check_nv12_aux_surface()
1769 struct drm_i915_private *i915 = to_i915(plane->base.dev); in skl_check_nv12_aux_surface()
1770 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_nv12_aux_surface()
1771 unsigned int rotation = plane_state->hw.rotation; in skl_check_nv12_aux_surface()
1773 int ccs_plane = intel_fb_is_ccs_modifier(fb->modifier) ? in skl_check_nv12_aux_surface()
1777 int x = plane_state->uapi.src.x1 >> 17; in skl_check_nv12_aux_surface()
1778 int y = plane_state->uapi.src.y1 >> 17; in skl_check_nv12_aux_surface() local
1779 int w = drm_rect_width(&plane_state->uapi.src) >> 17; in skl_check_nv12_aux_surface()
1780 int h = drm_rect_height(&plane_state->uapi.src) >> 17; in skl_check_nv12_aux_surface()
1781 u32 offset; in skl_check_nv12_aux_surface() local
1785 drm_dbg_kms(&i915->drm, in skl_check_nv12_aux_surface()
1788 return -EINVAL; in skl_check_nv12_aux_surface()
1791 intel_add_fb_offsets(&x, &y, plane_state, uv_plane); in skl_check_nv12_aux_surface()
1792 offset = intel_plane_compute_aligned_offset(&x, &y, in skl_check_nv12_aux_surface()
1796 u32 aux_offset = plane_state->view.color_plane[ccs_plane].offset; in skl_check_nv12_aux_surface()
1799 if (offset > aux_offset) in skl_check_nv12_aux_surface()
1800 offset = intel_plane_adjust_aligned_offset(&x, &y, in skl_check_nv12_aux_surface()
1803 offset, in skl_check_nv12_aux_surface()
1804 aux_offset & ~(alignment - 1)); in skl_check_nv12_aux_surface()
1806 while (!skl_check_main_ccs_coordinates(plane_state, x, y, in skl_check_nv12_aux_surface()
1807 offset, ccs_plane)) { in skl_check_nv12_aux_surface()
1808 if (offset == 0) in skl_check_nv12_aux_surface()
1811 offset = intel_plane_adjust_aligned_offset(&x, &y, in skl_check_nv12_aux_surface()
1814 offset, offset - alignment); in skl_check_nv12_aux_surface()
1817 if (x != plane_state->view.color_plane[ccs_plane].x || in skl_check_nv12_aux_surface()
1818 y != plane_state->view.color_plane[ccs_plane].y) { in skl_check_nv12_aux_surface()
1819 drm_dbg_kms(&i915->drm, in skl_check_nv12_aux_surface()
1820 "Unable to find suitable display surface offset due to CCS\n"); in skl_check_nv12_aux_surface()
1821 return -EINVAL; in skl_check_nv12_aux_surface()
1826 drm_WARN_ON(&i915->drm, x > 65535 || y > 65535); in skl_check_nv12_aux_surface()
1828 drm_WARN_ON(&i915->drm, x > 8191 || y > 8191); in skl_check_nv12_aux_surface()
1830 plane_state->view.color_plane[uv_plane].offset = offset; in skl_check_nv12_aux_surface()
1831 plane_state->view.color_plane[uv_plane].x = x; in skl_check_nv12_aux_surface()
1832 plane_state->view.color_plane[uv_plane].y = y; in skl_check_nv12_aux_surface()
1839 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_ccs_aux_surface()
1840 int src_x = plane_state->uapi.src.x1 >> 16; in skl_check_ccs_aux_surface()
1841 int src_y = plane_state->uapi.src.y1 >> 16; in skl_check_ccs_aux_surface()
1842 u32 offset; in skl_check_ccs_aux_surface() local
1845 for (ccs_plane = 0; ccs_plane < fb->format->num_planes; ccs_plane++) { in skl_check_ccs_aux_surface()
1848 int x, y; in skl_check_ccs_aux_surface() local
1860 y = src_y / vsub; in skl_check_ccs_aux_surface()
1862 intel_add_fb_offsets(&x, &y, plane_state, ccs_plane); in skl_check_ccs_aux_surface()
1864 offset = intel_plane_compute_aligned_offset(&x, &y, in skl_check_ccs_aux_surface()
1868 plane_state->view.color_plane[ccs_plane].offset = offset; in skl_check_ccs_aux_surface()
1869 plane_state->view.color_plane[ccs_plane].x = (x * hsub + src_x % hsub) / main_hsub; in skl_check_ccs_aux_surface()
1870 plane_state->view.color_plane[ccs_plane].y = (y * vsub + src_y % vsub) / main_vsub; in skl_check_ccs_aux_surface()
1878 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_check_plane_surface()
1885 if (!plane_state->uapi.visible) in skl_check_plane_surface()
1892 if (intel_fb_is_ccs_modifier(fb->modifier)) { in skl_check_plane_surface()
1898 if (intel_format_info_is_yuv_semiplanar(fb->format, in skl_check_plane_surface()
1899 fb->modifier)) { in skl_check_plane_surface()
1917 switch (fb->format->format) { in skl_fb_scalable()
1924 return DISPLAY_VER(to_i915(fb->dev)) >= 11; in skl_fb_scalable()
1932 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in check_protection()
1933 struct drm_i915_private *i915 = to_i915(plane->base.dev); in check_protection()
1934 const struct drm_framebuffer *fb = plane_state->hw.fb; in check_protection()
1940 plane_state->decrypt = intel_pxp_key_check(i915->pxp, obj, false) == 0; in check_protection()
1941 plane_state->force_black = i915_gem_object_is_protected(obj) && in check_protection()
1942 !plane_state->decrypt; in check_protection()
1948 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in skl_plane_check()
1949 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in skl_plane_check()
1950 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_check()
1960 if (!plane_state->ckey.flags && skl_fb_scalable(fb)) { in skl_plane_check()
1974 if (!plane_state->uapi.visible) in skl_plane_check()
1992 if (!(plane_state->hw.alpha >> 8)) in skl_plane_check()
1993 plane_state->uapi.visible = false; in skl_plane_check()
1995 plane_state->ctl = skl_plane_ctl(crtc_state, plane_state); in skl_plane_check()
1998 plane_state->color_ctl = glk_plane_color_ctl(crtc_state, in skl_plane_check()
2001 if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) && in skl_plane_check()
2002 icl_is_hdr_plane(dev_priv, plane->id)) in skl_plane_check()
2003 /* Enable and use MPEG-2 chroma siting */ in skl_plane_check()
2004 plane_state->cus_ctl = PLANE_CUS_ENABLE | in skl_plane_check()
2008 plane_state->cus_ctl = 0; in skl_plane_check()
2015 return pipe - PIPE_A + INTEL_FBC_A; in skl_fbc_id_for_pipe()
2021 if ((DISPLAY_RUNTIME_INFO(i915)->fbc_mask & BIT(fbc_id)) == 0) in skl_plane_has_fbc()
2036 return dev_priv->display.fbc[fbc_id]; in skl_plane_fbc()
2226 struct drm_i915_private *i915 = to_i915(plane->base.dev); in skl_plane_enable_flip_done()
2227 enum pipe pipe = plane->pipe; in skl_plane_enable_flip_done()
2229 spin_lock_irq(&i915->irq_lock); in skl_plane_enable_flip_done()
2230 bdw_enable_pipe_irq(i915, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id)); in skl_plane_enable_flip_done()
2231 spin_unlock_irq(&i915->irq_lock); in skl_plane_enable_flip_done()
2237 struct drm_i915_private *i915 = to_i915(plane->base.dev); in skl_plane_disable_flip_done()
2238 enum pipe pipe = plane->pipe; in skl_plane_disable_flip_done()
2240 spin_lock_irq(&i915->irq_lock); in skl_plane_disable_flip_done()
2241 bdw_disable_pipe_irq(i915, pipe, GEN9_PIPE_PLANE_FLIP_DONE(plane->id)); in skl_plane_disable_flip_done()
2242 spin_unlock_irq(&i915->irq_lock); in skl_plane_disable_flip_done()
2323 plane->pipe = pipe; in skl_universal_plane_create()
2324 plane->id = plane_id; in skl_universal_plane_create()
2325 plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id); in skl_universal_plane_create()
2330 plane->min_width = icl_plane_min_width; in skl_universal_plane_create()
2332 plane->max_width = icl_hdr_plane_max_width; in skl_universal_plane_create()
2334 plane->max_width = icl_sdr_plane_max_width; in skl_universal_plane_create()
2335 plane->max_height = icl_plane_max_height; in skl_universal_plane_create()
2336 plane->min_cdclk = icl_plane_min_cdclk; in skl_universal_plane_create()
2338 plane->max_width = glk_plane_max_width; in skl_universal_plane_create()
2339 plane->max_height = skl_plane_max_height; in skl_universal_plane_create()
2340 plane->min_cdclk = glk_plane_min_cdclk; in skl_universal_plane_create()
2342 plane->max_width = skl_plane_max_width; in skl_universal_plane_create()
2343 plane->max_height = skl_plane_max_height; in skl_universal_plane_create()
2344 plane->min_cdclk = skl_plane_min_cdclk; in skl_universal_plane_create()
2347 plane->max_stride = skl_plane_max_stride; in skl_universal_plane_create()
2349 plane->update_noarm = icl_plane_update_noarm; in skl_universal_plane_create()
2350 plane->update_arm = icl_plane_update_arm; in skl_universal_plane_create()
2351 plane->disable_arm = icl_plane_disable_arm; in skl_universal_plane_create()
2353 plane->update_noarm = skl_plane_update_noarm; in skl_universal_plane_create()
2354 plane->update_arm = skl_plane_update_arm; in skl_universal_plane_create()
2355 plane->disable_arm = skl_plane_disable_arm; in skl_universal_plane_create()
2357 plane->get_hw_state = skl_plane_get_hw_state; in skl_universal_plane_create()
2358 plane->check_plane = skl_plane_check; in skl_universal_plane_create()
2361 plane->need_async_flip_disable_wa = IS_DISPLAY_VER(dev_priv, in skl_universal_plane_create()
2363 plane->async_flip = skl_plane_async_flip; in skl_universal_plane_create()
2364 plane->enable_flip_done = skl_plane_enable_flip_done; in skl_universal_plane_create()
2365 plane->disable_flip_done = skl_plane_disable_flip_done; in skl_universal_plane_create()
2391 ret = drm_universal_plane_init(&dev_priv->drm, &plane->base, in skl_universal_plane_create()
2413 drm_plane_create_rotation_property(&plane->base, in skl_universal_plane_create()
2422 drm_plane_create_color_properties(&plane->base, in skl_universal_plane_create()
2429 drm_plane_create_alpha_property(&plane->base); in skl_universal_plane_create()
2430 drm_plane_create_blend_mode_property(&plane->base, in skl_universal_plane_create()
2435 drm_plane_create_zpos_immutable_property(&plane->base, plane_id); in skl_universal_plane_create()
2438 drm_plane_enable_fb_damage_clips(&plane->base); in skl_universal_plane_create()
2441 drm_plane_create_scaling_filter_property(&plane->base, in skl_universal_plane_create()
2459 struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); in skl_get_initial_plane_config()
2460 struct drm_device *dev = crtc->base.dev; in skl_get_initial_plane_config()
2462 struct intel_plane *plane = to_intel_plane(crtc->base.primary); in skl_get_initial_plane_config()
2463 enum plane_id plane_id = plane->id; in skl_get_initial_plane_config()
2465 u32 val, base, offset, stride_mult, tiling, alpha; in skl_get_initial_plane_config() local
2472 if (!plane->get_hw_state(plane, &pipe)) in skl_get_initial_plane_config()
2475 drm_WARN_ON(dev, pipe != crtc->pipe); in skl_get_initial_plane_config()
2477 if (crtc_state->bigjoiner_pipes) { in skl_get_initial_plane_config()
2478 drm_dbg_kms(&dev_priv->drm, in skl_get_initial_plane_config()
2485 drm_dbg_kms(&dev_priv->drm, "failed to alloc fb\n"); in skl_get_initial_plane_config()
2489 fb = &intel_fb->base; in skl_get_initial_plane_config()
2491 fb->dev = dev; in skl_get_initial_plane_config()
2511 fb->format = drm_format_info(fourcc); in skl_get_initial_plane_config()
2516 fb->modifier = DRM_FORMAT_MOD_LINEAR; in skl_get_initial_plane_config()
2519 plane_config->tiling = I915_TILING_X; in skl_get_initial_plane_config()
2520 fb->modifier = I915_FORMAT_MOD_X_TILED; in skl_get_initial_plane_config()
2523 plane_config->tiling = I915_TILING_Y; in skl_get_initial_plane_config()
2526 fb->modifier = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS; in skl_get_initial_plane_config()
2528 fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS; in skl_get_initial_plane_config()
2530 fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS; in skl_get_initial_plane_config()
2533 fb->modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS; in skl_get_initial_plane_config()
2535 fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS; in skl_get_initial_plane_config()
2537 fb->modifier = I915_FORMAT_MOD_Y_TILED; in skl_get_initial_plane_config()
2545 fb->modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS; in skl_get_initial_plane_config()
2547 fb->modifier = I915_FORMAT_MOD_4_TILED_DG2_MC_CCS; in skl_get_initial_plane_config()
2549 fb->modifier = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC; in skl_get_initial_plane_config()
2551 fb->modifier = I915_FORMAT_MOD_4_TILED; in skl_get_initial_plane_config()
2554 fb->modifier = I915_FORMAT_MOD_Yf_TILED_CCS; in skl_get_initial_plane_config()
2556 fb->modifier = I915_FORMAT_MOD_Yf_TILED; in skl_get_initial_plane_config()
2564 if (!dev_priv->display.params.enable_dpt && in skl_get_initial_plane_config()
2565 intel_fb_modifier_uses_dpt(dev_priv, fb->modifier)) { in skl_get_initial_plane_config()
2566 drm_dbg_kms(&dev_priv->drm, "DPT disabled, skipping initial FB\n"); in skl_get_initial_plane_config()
2576 plane_config->rotation = DRM_MODE_ROTATE_0; in skl_get_initial_plane_config()
2579 plane_config->rotation = DRM_MODE_ROTATE_270; in skl_get_initial_plane_config()
2582 plane_config->rotation = DRM_MODE_ROTATE_180; in skl_get_initial_plane_config()
2585 plane_config->rotation = DRM_MODE_ROTATE_90; in skl_get_initial_plane_config()
2590 plane_config->rotation |= DRM_MODE_REFLECT_X; in skl_get_initial_plane_config()
2593 if (drm_rotation_90_or_270(plane_config->rotation)) in skl_get_initial_plane_config()
2597 plane_config->base = base; in skl_get_initial_plane_config()
2599 offset = intel_de_read(dev_priv, PLANE_OFFSET(pipe, plane_id)); in skl_get_initial_plane_config()
2600 drm_WARN_ON(&dev_priv->drm, offset != 0); in skl_get_initial_plane_config()
2603 fb->height = REG_FIELD_GET(PLANE_HEIGHT_MASK, val) + 1; in skl_get_initial_plane_config()
2604 fb->width = REG_FIELD_GET(PLANE_WIDTH_MASK, val) + 1; in skl_get_initial_plane_config()
2609 fb->pitches[0] = REG_FIELD_GET(PLANE_STRIDE__MASK, val) * stride_mult; in skl_get_initial_plane_config()
2611 aligned_height = intel_fb_align_height(fb, 0, fb->height); in skl_get_initial_plane_config()
2613 plane_config->size = fb->pitches[0] * aligned_height; in skl_get_initial_plane_config()
2615 drm_dbg_kms(&dev_priv->drm, in skl_get_initial_plane_config()
2616 "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", in skl_get_initial_plane_config()
2617 crtc->base.name, plane->base.name, fb->width, fb->height, in skl_get_initial_plane_config()
2618 fb->format->cpp[0] * 8, base, fb->pitches[0], in skl_get_initial_plane_config()
2619 plane_config->size); in skl_get_initial_plane_config()
2621 plane_config->fb = intel_fb; in skl_get_initial_plane_config()