26  * New plane/sprite handling.
28  * The older chips had a separate interface for programming plane related
29  * registers; newer ones are much simpler and we can use the new DRM plane
69 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in chv_sprite_update_csc()  local
70 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in chv_sprite_update_csc()
72 	enum plane_id plane_id = plane->id;  in chv_sprite_update_csc()
141 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in vlv_sprite_update_clrc()  local
142 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_clrc()
144 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_clrc()
145 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_clrc()
344 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in vlv_sprite_update_gamma()  local
345 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_gamma()
347 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_gamma()
348 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_gamma()
366 vlv_sprite_update_noarm(struct intel_plane *plane,  in vlv_sprite_update_noarm()  argument
370 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_noarm()
371 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_noarm()
372 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_noarm()
387 vlv_sprite_update_arm(struct intel_plane *plane,  in vlv_sprite_update_arm()  argument
391 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_update_arm()
392 	enum pipe pipe = plane->pipe;  in vlv_sprite_update_arm()
393 	enum plane_id plane_id = plane->id;  in vlv_sprite_update_arm()
423 	 * The control register self-arms if the plane was previously  in vlv_sprite_update_arm()
424 	 * disabled. Try to make the plane enable atomic by writing  in vlv_sprite_update_arm()
436 vlv_sprite_disable_arm(struct intel_plane *plane,  in vlv_sprite_disable_arm()  argument
439 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_disable_arm()
440 	enum pipe pipe = plane->pipe;  in vlv_sprite_disable_arm()
441 	enum plane_id plane_id = plane->id;  in vlv_sprite_disable_arm()
448 vlv_sprite_get_hw_state(struct intel_plane *plane,  in vlv_sprite_get_hw_state()  argument
451 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in vlv_sprite_get_hw_state()
453 	enum plane_id plane_id = plane->id;  in vlv_sprite_get_hw_state()
457 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);  in vlv_sprite_get_hw_state()
462 	ret = intel_de_read(dev_priv, SPCNTR(plane->pipe, plane_id)) & SP_ENABLE;  in vlv_sprite_get_hw_state()
464 	*pipe = plane->pipe;  in vlv_sprite_get_hw_state()
645 		to_i915(plane_state->uapi.plane->dev);  in ivb_need_sprite_gamma()
656 		to_i915(plane_state->uapi.plane->dev);  in ivb_sprite_ctl()
753 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in ivb_sprite_update_gamma()  local
754 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_update_gamma()
755 	enum pipe pipe = plane->pipe;  in ivb_sprite_update_gamma()
781 ivb_sprite_update_noarm(struct intel_plane *plane,  in ivb_sprite_update_noarm()  argument
785 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_update_noarm()
786 	enum pipe pipe = plane->pipe;  in ivb_sprite_update_noarm()
811 ivb_sprite_update_arm(struct intel_plane *plane,  in ivb_sprite_update_arm()  argument
815 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_update_arm()
816 	enum pipe pipe = plane->pipe;  in ivb_sprite_update_arm()
846 	 * The control register self-arms if the plane was previously  in ivb_sprite_update_arm()
847 	 * disabled. Try to make the plane enable atomic by writing  in ivb_sprite_update_arm()
858 ivb_sprite_disable_arm(struct intel_plane *plane,  in ivb_sprite_disable_arm()  argument
861 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_disable_arm()
862 	enum pipe pipe = plane->pipe;  in ivb_sprite_disable_arm()
872 ivb_sprite_get_hw_state(struct intel_plane *plane,  in ivb_sprite_get_hw_state()  argument
875 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ivb_sprite_get_hw_state()
880 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);  in ivb_sprite_get_hw_state()
885 	ret =  intel_de_read(dev_priv, SPRCTL(plane->pipe)) & SPRITE_ENABLE;  in ivb_sprite_get_hw_state()
887 	*pipe = plane->pipe;  in ivb_sprite_get_hw_state()
941 g4x_sprite_max_stride(struct intel_plane *plane,  in g4x_sprite_max_stride()  argument
956 hsw_sprite_max_stride(struct intel_plane *plane,  in hsw_sprite_max_stride()  argument
984 		to_i915(plane_state->uapi.plane->dev);  in g4x_sprite_ctl()
1053 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in g4x_sprite_update_gamma()  local
1054 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_update_gamma()
1056 	enum pipe pipe = plane->pipe;  in g4x_sprite_update_gamma()
1083 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in ilk_sprite_update_gamma()  local
1084 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in ilk_sprite_update_gamma()
1086 	enum pipe pipe = plane->pipe;  in ilk_sprite_update_gamma()
1108 g4x_sprite_update_noarm(struct intel_plane *plane,  in g4x_sprite_update_noarm()  argument
1112 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_update_noarm()
1113 	enum pipe pipe = plane->pipe;  in g4x_sprite_update_noarm()
1137 g4x_sprite_update_arm(struct intel_plane *plane,  in g4x_sprite_update_arm()  argument
1141 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_update_arm()
1142 	enum pipe pipe = plane->pipe;  in g4x_sprite_update_arm()
1165 	 * The control register self-arms if the plane was previously  in g4x_sprite_update_arm()
1166 	 * disabled. Try to make the plane enable atomic by writing  in g4x_sprite_update_arm()
1180 g4x_sprite_disable_arm(struct intel_plane *plane,  in g4x_sprite_disable_arm()  argument
1183 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_disable_arm()
1184 	enum pipe pipe = plane->pipe;  in g4x_sprite_disable_arm()
1193 g4x_sprite_get_hw_state(struct intel_plane *plane,  in g4x_sprite_get_hw_state()  argument
1196 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_get_hw_state()
1201 	power_domain = POWER_DOMAIN_PIPE(plane->pipe);  in g4x_sprite_get_hw_state()
1206 	ret = intel_de_read(dev_priv, DVSCNTR(plane->pipe)) & DVS_ENABLE;  in g4x_sprite_get_hw_state()
1208 	*pipe = plane->pipe;  in g4x_sprite_get_hw_state()
1236 	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);  in g4x_sprite_check_scaling()
1298 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in g4x_sprite_check()  local
1299 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in g4x_sprite_check()
1344 	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);  in chv_plane_check_rotation()  local
1345 	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);  in chv_plane_check_rotation()
1554 	struct intel_plane *plane;  in intel_sprite_plane_create()  local
1562 	plane = intel_plane_alloc();  in intel_sprite_plane_create()
1563 	if (IS_ERR(plane))  in intel_sprite_plane_create()
1564 		return plane;  in intel_sprite_plane_create()
1567 		plane->update_noarm = vlv_sprite_update_noarm;  in intel_sprite_plane_create()
1568 		plane->update_arm = vlv_sprite_update_arm;  in intel_sprite_plane_create()
1569 		plane->disable_arm = vlv_sprite_disable_arm;  in intel_sprite_plane_create()
1570 		plane->get_hw_state = vlv_sprite_get_hw_state;  in intel_sprite_plane_create()
1571 		plane->check_plane = vlv_sprite_check;  in intel_sprite_plane_create()
1572 		plane->max_stride = i965_plane_max_stride;  in intel_sprite_plane_create()
1573 		plane->min_cdclk = vlv_plane_min_cdclk;  in intel_sprite_plane_create()
1585 		plane->update_noarm = ivb_sprite_update_noarm;  in intel_sprite_plane_create()
1586 		plane->update_arm = ivb_sprite_update_arm;  in intel_sprite_plane_create()
1587 		plane->disable_arm = ivb_sprite_disable_arm;  in intel_sprite_plane_create()
1588 		plane->get_hw_state = ivb_sprite_get_hw_state;  in intel_sprite_plane_create()
1589 		plane->check_plane = g4x_sprite_check;  in intel_sprite_plane_create()
1592 			plane->max_stride = hsw_sprite_max_stride;  in intel_sprite_plane_create()
1593 			plane->min_cdclk = hsw_plane_min_cdclk;  in intel_sprite_plane_create()
1595 			plane->max_stride = g4x_sprite_max_stride;  in intel_sprite_plane_create()
1596 			plane->min_cdclk = ivb_sprite_min_cdclk;  in intel_sprite_plane_create()
1604 		plane->update_noarm = g4x_sprite_update_noarm;  in intel_sprite_plane_create()
1605 		plane->update_arm = g4x_sprite_update_arm;  in intel_sprite_plane_create()
1606 		plane->disable_arm = g4x_sprite_disable_arm;  in intel_sprite_plane_create()
1607 		plane->get_hw_state = g4x_sprite_get_hw_state;  in intel_sprite_plane_create()
1608 		plane->check_plane = g4x_sprite_check;  in intel_sprite_plane_create()
1609 		plane->max_stride = g4x_sprite_max_stride;  in intel_sprite_plane_create()
1610 		plane->min_cdclk = g4x_sprite_min_cdclk;  in intel_sprite_plane_create()
1634 	plane->pipe = pipe;  in intel_sprite_plane_create()
1635 	plane->id = PLANE_SPRITE0 + sprite;  in intel_sprite_plane_create()
1636 	plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);  in intel_sprite_plane_create()
1640 	ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,  in intel_sprite_plane_create()
1650 	drm_plane_create_rotation_property(&plane->base,  in intel_sprite_plane_create()
1654 	drm_plane_create_color_properties(&plane->base,  in intel_sprite_plane_create()
1663 	drm_plane_create_zpos_immutable_property(&plane->base, zpos);  in intel_sprite_plane_create()
1665 	intel_plane_helper_add(plane);  in intel_sprite_plane_create()
1667 	return plane;  in intel_sprite_plane_create()
1670 	intel_plane_free(plane);  in intel_sprite_plane_create()