Lines Matching refs:cpu_transcoder

250 			      enum transcoder cpu_transcoder)  in psr_ctl_reg()  argument
253 return EDP_PSR_CTL(cpu_transcoder); in psr_ctl_reg()
259 enum transcoder cpu_transcoder) in psr_debug_reg() argument
262 return EDP_PSR_DEBUG(cpu_transcoder); in psr_debug_reg()
268 enum transcoder cpu_transcoder) in psr_perf_cnt_reg() argument
271 return EDP_PSR_PERF_CNT(cpu_transcoder); in psr_perf_cnt_reg()
277 enum transcoder cpu_transcoder) in psr_status_reg() argument
280 return EDP_PSR_STATUS(cpu_transcoder); in psr_status_reg()
286 enum transcoder cpu_transcoder) in psr_imr_reg() argument
289 return TRANS_PSR_IMR(cpu_transcoder); in psr_imr_reg()
295 enum transcoder cpu_transcoder) in psr_iir_reg() argument
298 return TRANS_PSR_IIR(cpu_transcoder); in psr_iir_reg()
304 enum transcoder cpu_transcoder) in psr_aux_ctl_reg() argument
307 return EDP_PSR_AUX_CTL(cpu_transcoder); in psr_aux_ctl_reg()
313 enum transcoder cpu_transcoder, int i) in psr_aux_data_reg() argument
316 return EDP_PSR_AUX_DATA(cpu_transcoder, i); in psr_aux_data_reg()
324 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_irq_control() local
332 intel_de_rmw(dev_priv, psr_imr_reg(dev_priv, cpu_transcoder), in psr_irq_control()
377 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_irq_handler() local
384 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
391 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
396 val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder), 0, 0); in intel_psr_irq_handler()
404 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
416 intel_de_rmw(dev_priv, psr_imr_reg(dev_priv, cpu_transcoder), in intel_psr_irq_handler()
573 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in hsw_psr_setup_aux() local
588 psr_aux_data_reg(dev_priv, cpu_transcoder, i >> 2), in hsw_psr_setup_aux()
603 intel_de_write(dev_priv, psr_aux_ctl_reg(dev_priv, cpu_transcoder), in hsw_psr_setup_aux()
714 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in hsw_activate_psr1() local
737 intel_de_rmw(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder), in hsw_activate_psr1()
803 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in hsw_activate_psr2() local
866 tmp = intel_de_read(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder)); in hsw_activate_psr2()
869 intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder), 0); in hsw_activate_psr2()
876 intel_de_write(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder), psr_val); in hsw_activate_psr2()
878 intel_de_write(dev_priv, EDP_PSR2_CTL(cpu_transcoder), val); in hsw_activate_psr2()
882 transcoder_has_psr2(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder) in transcoder_has_psr2() argument
885 return cpu_transcoder == TRANSCODER_A || cpu_transcoder == TRANSCODER_B; in transcoder_has_psr2()
887 return cpu_transcoder == TRANSCODER_A; in transcoder_has_psr2()
889 return cpu_transcoder == TRANSCODER_EDP; in transcoder_has_psr2()
907 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr2_program_idle_frames() local
909 intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder), in psr2_program_idle_frames()
1206 if (!transcoder_has_psr2(dev_priv, crtc_state->cpu_transcoder)) { in intel_psr2_config_valid()
1209 transcoder_name(crtc_state->cpu_transcoder)); in intel_psr2_config_valid()
1391 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_psr_get_config() local
1423 val = intel_de_read(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder)); in intel_psr_get_config()
1429 val = intel_de_read(dev_priv, TRANS_EXITLINE(cpu_transcoder)); in intel_psr_get_config()
1439 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_activate() local
1442 transcoder_has_psr2(dev_priv, cpu_transcoder) && in intel_psr_activate()
1443 intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder)) & EDP_PSR2_ENABLE); in intel_psr_activate()
1446 intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder)) & EDP_PSR_ENABLE); in intel_psr_activate()
1511 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_enable_source() local
1555 intel_de_write(dev_priv, psr_debug_reg(dev_priv, cpu_transcoder), mask); in intel_psr_enable_source()
1564 intel_de_rmw(dev_priv, TRANS_EXITLINE(cpu_transcoder), EXITLINE_MASK, in intel_psr_enable_source()
1580 intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0, in intel_psr_enable_source()
1591 intel_de_rmw(dev_priv, hsw_chicken_trans_reg(dev_priv, cpu_transcoder), in intel_psr_enable_source()
1597 MTL_CLKGATE_DIS_TRANS(cpu_transcoder), 0, in intel_psr_enable_source()
1608 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_interrupt_error_check() local
1619 val = intel_de_read(dev_priv, psr_iir_reg(dev_priv, cpu_transcoder)); in psr_interrupt_error_check()
1646 intel_dp->psr.transcoder = crtc_state->cpu_transcoder; in intel_psr_enable_locked()
1678 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_exit() local
1682 if (transcoder_has_psr2(dev_priv, cpu_transcoder)) { in intel_psr_exit()
1683 val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder)); in intel_psr_exit()
1687 val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder)); in intel_psr_exit()
1699 val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder), in intel_psr_exit()
1704 val = intel_de_rmw(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder), in intel_psr_exit()
1715 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_wait_exit_locked() local
1720 psr_status = EDP_PSR2_STATUS(cpu_transcoder); in intel_psr_wait_exit_locked()
1723 psr_status = psr_status_reg(dev_priv, cpu_transcoder); in intel_psr_wait_exit_locked()
1736 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_disable_locked() local
1766 MTL_CLKGATE_DIS_TRANS(cpu_transcoder), in intel_psr_disable_locked()
1904 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_force_hw_tracking_exit() local
1908 PSR2_MAN_TRK_CTL(cpu_transcoder), in psr_force_hw_tracking_exit()
1933 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_psr2_program_trans_man_trk_ctl() local
1949 intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder), in intel_psr2_program_trans_man_trk_ctl()
2333 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in _psr2_ready_for_pipe_update_locked() local
2341 EDP_PSR2_STATUS(cpu_transcoder), in _psr2_ready_for_pipe_update_locked()
2348 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in _psr1_ready_for_pipe_update_locked() local
2357 psr_status_reg(dev_priv, cpu_transcoder), in _psr1_ready_for_pipe_update_locked()
2399 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in __psr_wait_for_idle_locked() local
2408 reg = EDP_PSR2_STATUS(cpu_transcoder); in __psr_wait_for_idle_locked()
2411 reg = psr_status_reg(dev_priv, cpu_transcoder); in __psr_wait_for_idle_locked()
2573 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in _psr_invalidate_handle() local
2587 intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder), val); in _psr_invalidate_handle()
2668 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in _psr_flush_handle() local
2685 intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(cpu_transcoder), in _psr_flush_handle()
3008 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_source_status() local
3026 val = intel_de_read(dev_priv, EDP_PSR2_STATUS(cpu_transcoder)); in psr_source_status()
3041 val = intel_de_read(dev_priv, psr_status_reg(dev_priv, cpu_transcoder)); in psr_source_status()
3053 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_status() local
3089 val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder)); in intel_psr_status()
3092 val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder)); in intel_psr_status()
3095 val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder)); in intel_psr_status()
3107 val = intel_de_read(dev_priv, psr_perf_cnt_reg(dev_priv, cpu_transcoder)); in intel_psr_status()
3126 val = intel_de_read(dev_priv, PSR2_SU_STATUS(cpu_transcoder, frame)); in intel_psr_status()