51 	struct drm_i915_private *i915;  member
152 static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915,  in get_gmbus_pin()  argument
158 	if (INTEL_PCH_TYPE(i915) >= PCH_LNL) {  in get_gmbus_pin()
161 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG2) {  in get_gmbus_pin()
164 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {  in get_gmbus_pin()
167 	} else if (INTEL_PCH_TYPE(i915) >= PCH_MTP) {  in get_gmbus_pin()
170 	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {  in get_gmbus_pin()
173 	} else if (HAS_PCH_CNP(i915)) {  in get_gmbus_pin()
176 	} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {  in get_gmbus_pin()
179 	} else if (DISPLAY_VER(i915) == 9) {  in get_gmbus_pin()
182 	} else if (IS_BROADWELL(i915)) {  in get_gmbus_pin()
196 bool intel_gmbus_is_valid_pin(struct drm_i915_private *i915, unsigned int pin)  in intel_gmbus_is_valid_pin()  argument
198 	return get_gmbus_pin(i915, pin);  in intel_gmbus_is_valid_pin()
212 intel_gmbus_reset(struct drm_i915_private *i915)  in intel_gmbus_reset()  argument
214 	intel_de_write(i915, GMBUS0(i915), 0);  in intel_gmbus_reset()
215 	intel_de_write(i915, GMBUS4(i915), 0);  in intel_gmbus_reset()
218 static void pnv_gmbus_clock_gating(struct drm_i915_private *i915,  in pnv_gmbus_clock_gating()  argument
222 	intel_de_rmw(i915, DSPCLK_GATE_D(i915), PNV_GMBUSUNIT_CLOCK_GATE_DISABLE,  in pnv_gmbus_clock_gating()
226 static void pch_gmbus_clock_gating(struct drm_i915_private *i915,  in pch_gmbus_clock_gating()  argument
229 	intel_de_rmw(i915, SOUTH_DSPCLK_GATE_D, PCH_GMBUSUNIT_CLOCK_GATE_DISABLE,  in pch_gmbus_clock_gating()
233 static void bxt_gmbus_clock_gating(struct drm_i915_private *i915,  in bxt_gmbus_clock_gating()  argument
236 	intel_de_rmw(i915, GEN9_CLKGATE_DIS_4, BXT_GMBUS_GATING_DIS,  in bxt_gmbus_clock_gating()
242 	struct drm_i915_private *i915 = bus->i915;  in get_reserved()  local
246 	if (!IS_I830(i915) && !IS_I845G(i915))  in get_reserved()
247 		reserved = intel_de_read_notrace(i915, bus->gpio_reg) &  in get_reserved()
256 	struct drm_i915_private *i915 = bus->i915;  in get_clock()  local
259 	intel_de_write_notrace(i915, bus->gpio_reg, reserved | GPIO_CLOCK_DIR_MASK);  in get_clock()
260 	intel_de_write_notrace(i915, bus->gpio_reg, reserved);  in get_clock()
262 	return (intel_de_read_notrace(i915, bus->gpio_reg) & GPIO_CLOCK_VAL_IN) != 0;  in get_clock()
268 	struct drm_i915_private *i915 = bus->i915;  in get_data()  local
271 	intel_de_write_notrace(i915, bus->gpio_reg, reserved | GPIO_DATA_DIR_MASK);  in get_data()
272 	intel_de_write_notrace(i915, bus->gpio_reg, reserved);  in get_data()
274 	return (intel_de_read_notrace(i915, bus->gpio_reg) & GPIO_DATA_VAL_IN) != 0;  in get_data()
280 	struct drm_i915_private *i915 = bus->i915;  in set_clock()  local
290 	intel_de_write_notrace(i915, bus->gpio_reg, reserved | clock_bits);  in set_clock()
291 	intel_de_posting_read(i915, bus->gpio_reg);  in set_clock()
297 	struct drm_i915_private *i915 = bus->i915;  in set_data()  local
307 	intel_de_write_notrace(i915, bus->gpio_reg, reserved | data_bits);  in set_data()
308 	intel_de_posting_read(i915, bus->gpio_reg);  in set_data()
315 	struct drm_i915_private *i915 = bus->i915;  in intel_gpio_pre_xfer()  local
317 	intel_gmbus_reset(i915);  in intel_gpio_pre_xfer()
319 	if (IS_PINEVIEW(i915))  in intel_gpio_pre_xfer()
320 		pnv_gmbus_clock_gating(i915, false);  in intel_gpio_pre_xfer()
332 	struct drm_i915_private *i915 = bus->i915;  in intel_gpio_post_xfer()  local
337 	if (IS_PINEVIEW(i915))  in intel_gpio_post_xfer()
338 		pnv_gmbus_clock_gating(i915, true);  in intel_gpio_post_xfer()
361 static bool has_gmbus_irq(struct drm_i915_private *i915)  in has_gmbus_irq()  argument
367 	return HAS_GMBUS_IRQ(i915) && intel_irqs_enabled(i915);  in has_gmbus_irq()
370 static int gmbus_wait(struct drm_i915_private *i915, u32 status, u32 irq_en)  in gmbus_wait()  argument
380 	if (!has_gmbus_irq(i915))  in gmbus_wait()
383 	add_wait_queue(&i915->display.gmbus.wait_queue, &wait);  in gmbus_wait()
384 	intel_de_write_fw(i915, GMBUS4(i915), irq_en);  in gmbus_wait()
387 	ret = wait_for_us((gmbus2 = intel_de_read_fw(i915, GMBUS2(i915))) & status,  in gmbus_wait()
390 		ret = wait_for((gmbus2 = intel_de_read_fw(i915, GMBUS2(i915))) & status,  in gmbus_wait()
393 	intel_de_write_fw(i915, GMBUS4(i915), 0);  in gmbus_wait()
394 	remove_wait_queue(&i915->display.gmbus.wait_queue, &wait);  in gmbus_wait()
403 gmbus_wait_idle(struct drm_i915_private *i915)  in gmbus_wait_idle()  argument
411 	if (has_gmbus_irq(i915))  in gmbus_wait_idle()
414 	add_wait_queue(&i915->display.gmbus.wait_queue, &wait);  in gmbus_wait_idle()
415 	intel_de_write_fw(i915, GMBUS4(i915), irq_enable);  in gmbus_wait_idle()
417 	ret = intel_de_wait_for_register_fw(i915, GMBUS2(i915), GMBUS_ACTIVE, 0, 10);  in gmbus_wait_idle()
419 	intel_de_write_fw(i915, GMBUS4(i915), 0);  in gmbus_wait_idle()
420 	remove_wait_queue(&i915->display.gmbus.wait_queue, &wait);  in gmbus_wait_idle()
425 static unsigned int gmbus_max_xfer_size(struct drm_i915_private *i915)  in gmbus_max_xfer_size()  argument
427 	return DISPLAY_VER(i915) >= 9 ? GEN9_GMBUS_BYTE_COUNT_MAX :  in gmbus_max_xfer_size()
432 gmbus_xfer_read_chunk(struct drm_i915_private *i915,  in gmbus_xfer_read_chunk()  argument
437 	bool burst_read = len > gmbus_max_xfer_size(i915);  in gmbus_xfer_read_chunk()
450 		intel_de_write_fw(i915, GMBUS0(i915),  in gmbus_xfer_read_chunk()
454 	intel_de_write_fw(i915, GMBUS1(i915),  in gmbus_xfer_read_chunk()
460 		ret = gmbus_wait(i915, GMBUS_HW_RDY, GMBUS_HW_RDY_EN);  in gmbus_xfer_read_chunk()
464 		val = intel_de_read_fw(i915, GMBUS3(i915));  in gmbus_xfer_read_chunk()
475 			intel_de_write_fw(i915, GMBUS0(i915), gmbus0_reg);  in gmbus_xfer_read_chunk()
492 gmbus_xfer_read(struct drm_i915_private *i915, struct i2c_msg *msg,  in gmbus_xfer_read()  argument
501 		if (HAS_GMBUS_BURST_READ(i915))  in gmbus_xfer_read()
504 			len = min(rx_size, gmbus_max_xfer_size(i915));  in gmbus_xfer_read()
506 		ret = gmbus_xfer_read_chunk(i915, msg->addr, buf, len,  in gmbus_xfer_read()
519 gmbus_xfer_write_chunk(struct drm_i915_private *i915,  in gmbus_xfer_write_chunk()  argument
532 	intel_de_write_fw(i915, GMBUS3(i915), val);  in gmbus_xfer_write_chunk()
533 	intel_de_write_fw(i915, GMBUS1(i915),  in gmbus_xfer_write_chunk()
543 		intel_de_write_fw(i915, GMBUS3(i915), val);  in gmbus_xfer_write_chunk()
545 		ret = gmbus_wait(i915, GMBUS_HW_RDY, GMBUS_HW_RDY_EN);  in gmbus_xfer_write_chunk()
554 gmbus_xfer_write(struct drm_i915_private *i915, struct i2c_msg *msg,  in gmbus_xfer_write()  argument
563 		len = min(tx_size, gmbus_max_xfer_size(i915));  in gmbus_xfer_write()
565 		ret = gmbus_xfer_write_chunk(i915, msg->addr, buf, len,  in gmbus_xfer_write()
592 gmbus_index_xfer(struct drm_i915_private *i915, struct i2c_msg *msgs,  in gmbus_index_xfer()  argument
608 		intel_de_write_fw(i915, GMBUS5(i915), gmbus5);  in gmbus_index_xfer()
611 		ret = gmbus_xfer_read(i915, &msgs[1], gmbus0_reg,  in gmbus_index_xfer()
614 		ret = gmbus_xfer_write(i915, &msgs[1], gmbus1_index);  in gmbus_index_xfer()
618 		intel_de_write_fw(i915, GMBUS5(i915), 0);  in gmbus_index_xfer()
628 	struct drm_i915_private *i915 = bus->i915;  in do_gmbus_xfer()  local
633 	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))  in do_gmbus_xfer()
634 		bxt_gmbus_clock_gating(i915, false);  in do_gmbus_xfer()
635 	else if (HAS_PCH_SPT(i915) || HAS_PCH_CNP(i915))  in do_gmbus_xfer()
636 		pch_gmbus_clock_gating(i915, false);  in do_gmbus_xfer()
639 	intel_de_write_fw(i915, GMBUS0(i915), gmbus0_source | bus->reg0);  in do_gmbus_xfer()
644 			ret = gmbus_index_xfer(i915, &msgs[i],  in do_gmbus_xfer()
648 			ret = gmbus_xfer_read(i915, &msgs[i],  in do_gmbus_xfer()
651 			ret = gmbus_xfer_write(i915, &msgs[i], 0);  in do_gmbus_xfer()
655 			ret = gmbus_wait(i915,  in do_gmbus_xfer()
667 	intel_de_write_fw(i915, GMBUS1(i915), GMBUS_CYCLE_STOP | GMBUS_SW_RDY);  in do_gmbus_xfer()
673 	if (gmbus_wait_idle(i915)) {  in do_gmbus_xfer()
674 		drm_dbg_kms(&i915->drm,  in do_gmbus_xfer()
679 	intel_de_write_fw(i915, GMBUS0(i915), 0);  in do_gmbus_xfer()
698 	if (gmbus_wait_idle(i915)) {  in do_gmbus_xfer()
699 		drm_dbg_kms(&i915->drm,  in do_gmbus_xfer()
709 	intel_de_write_fw(i915, GMBUS1(i915), GMBUS_SW_CLR_INT);  in do_gmbus_xfer()
710 	intel_de_write_fw(i915, GMBUS1(i915), 0);  in do_gmbus_xfer()
711 	intel_de_write_fw(i915, GMBUS0(i915), 0);  in do_gmbus_xfer()
713 	drm_dbg_kms(&i915->drm, "GMBUS [%s] NAK for addr: %04x %c(%d)\n",  in do_gmbus_xfer()
724 		drm_dbg_kms(&i915->drm,  in do_gmbus_xfer()
733 	drm_dbg_kms(&i915->drm,  in do_gmbus_xfer()
736 	intel_de_write_fw(i915, GMBUS0(i915), 0);  in do_gmbus_xfer()
746 	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))  in do_gmbus_xfer()
747 		bxt_gmbus_clock_gating(i915, true);  in do_gmbus_xfer()
748 	else if (HAS_PCH_SPT(i915) || HAS_PCH_CNP(i915))  in do_gmbus_xfer()
749 		pch_gmbus_clock_gating(i915, true);  in do_gmbus_xfer()
758 	struct drm_i915_private *i915 = bus->i915;  in gmbus_xfer()  local
762 	wakeref = intel_display_power_get(i915, POWER_DOMAIN_GMBUS);  in gmbus_xfer()
774 	intel_display_power_put(i915, POWER_DOMAIN_GMBUS, wakeref);  in gmbus_xfer()
782 	struct drm_i915_private *i915 = bus->i915;  in intel_gmbus_output_aksv()  local
802 	wakeref = intel_display_power_get(i915, POWER_DOMAIN_GMBUS);  in intel_gmbus_output_aksv()
803 	mutex_lock(&i915->display.gmbus.mutex);  in intel_gmbus_output_aksv()
812 	mutex_unlock(&i915->display.gmbus.mutex);  in intel_gmbus_output_aksv()
813 	intel_display_power_put(i915, POWER_DOMAIN_GMBUS, wakeref);  in intel_gmbus_output_aksv()
836 	struct drm_i915_private *i915 = bus->i915;  in gmbus_lock_bus()  local
838 	mutex_lock(&i915->display.gmbus.mutex);  in gmbus_lock_bus()
845 	struct drm_i915_private *i915 = bus->i915;  in gmbus_trylock_bus()  local
847 	return mutex_trylock(&i915->display.gmbus.mutex);  in gmbus_trylock_bus()
854 	struct drm_i915_private *i915 = bus->i915;  in gmbus_unlock_bus()  local
856 	mutex_unlock(&i915->display.gmbus.mutex);  in gmbus_unlock_bus()
867  * @i915: i915 device private
869 int intel_gmbus_setup(struct drm_i915_private *i915)  in intel_gmbus_setup()  argument
871 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);  in intel_gmbus_setup()
875 	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))  in intel_gmbus_setup()
876 		i915->display.gmbus.mmio_base = VLV_DISPLAY_BASE;  in intel_gmbus_setup()
877 	else if (!HAS_GMCH(i915))  in intel_gmbus_setup()
882 		i915->display.gmbus.mmio_base = PCH_DISPLAY_BASE;  in intel_gmbus_setup()
884 	mutex_init(&i915->display.gmbus.mutex);  in intel_gmbus_setup()
885 	init_waitqueue_head(&i915->display.gmbus.wait_queue);  in intel_gmbus_setup()
887 	for (pin = 0; pin < ARRAY_SIZE(i915->display.gmbus.bus); pin++) {  in intel_gmbus_setup()
891 		gmbus_pin = get_gmbus_pin(i915, pin);  in intel_gmbus_setup()
904 			 "i915 gmbus %s", gmbus_pin->name);  in intel_gmbus_setup()
907 		bus->i915 = i915;  in intel_gmbus_setup()
922 		if (IS_I830(i915))  in intel_gmbus_setup()
925 		intel_gpio_setup(bus, GPIO(i915, gmbus_pin->gpio));  in intel_gmbus_setup()
933 		i915->display.gmbus.bus[pin] = bus;  in intel_gmbus_setup()
936 	intel_gmbus_reset(i915);  in intel_gmbus_setup()
941 	intel_gmbus_teardown(i915);  in intel_gmbus_setup()
946 struct i2c_adapter *intel_gmbus_get_adapter(struct drm_i915_private *i915,  in intel_gmbus_get_adapter()  argument
949 	if (drm_WARN_ON(&i915->drm, pin >= ARRAY_SIZE(i915->display.gmbus.bus) ||  in intel_gmbus_get_adapter()
950 			!i915->display.gmbus.bus[pin]))  in intel_gmbus_get_adapter()
953 	return &i915->display.gmbus.bus[pin]->adapter;  in intel_gmbus_get_adapter()
959 	struct drm_i915_private *i915 = bus->i915;  in intel_gmbus_force_bit()  local
961 	mutex_lock(&i915->display.gmbus.mutex);  in intel_gmbus_force_bit()
964 	drm_dbg_kms(&i915->drm,  in intel_gmbus_force_bit()
969 	mutex_unlock(&i915->display.gmbus.mutex);  in intel_gmbus_force_bit()
979 void intel_gmbus_teardown(struct drm_i915_private *i915)  in intel_gmbus_teardown()  argument
983 	for (pin = 0; pin < ARRAY_SIZE(i915->display.gmbus.bus); pin++) {  in intel_gmbus_teardown()
986 		bus = i915->display.gmbus.bus[pin];  in intel_gmbus_teardown()
993 		i915->display.gmbus.bus[pin] = NULL;  in intel_gmbus_teardown()
997 void intel_gmbus_irq_handler(struct drm_i915_private *i915)  in intel_gmbus_irq_handler()  argument
999 	wake_up_all(&i915->display.gmbus.wait_queue);  in intel_gmbus_irq_handler()