76 	int lane;  in intel_cx0_program_msgbus_timer()  local
118 					    enum port port, int lane)  in intel_clear_response_ready_flag()
124 static void intel_cx0_bus_reset(struct drm_i915_private *i915, enum port port, int lane)  in intel_cx0_bus_reset()
142 				  int command, int lane, u32 *val)  in intel_cx0_wait_for_ack()
183 				 int lane, u16 addr)  in __intel_cx0_read_once()
220 			   int lane, u16 addr)  in __intel_cx0_read()
244 	int lane = lane_mask_to_lane(lane_mask);  in intel_cx0_read()  local
250 				  int lane, u16 addr, u8 data, bool committed)  in __intel_cx0_write_once()
306 			      int lane, u16 addr, u8 data, bool committed)  in __intel_cx0_write()
328 	int lane;  in intel_cx0_write()  local
335 				 int lane, u16 addr, u16 data)  in intel_c20_sram_write()
347 			       int lane, u16 addr)  in intel_c20_sram_read()
364 			    int lane, u16 addr, u8 clear, u8 set, bool committed)  in __intel_cx0_rmw()
378 	u8 lane;  in intel_cx0_rmw()  local
451 		int lane = ln / 2;  in intel_cx0_phy_set_signal_levels()  local
1860 	u8 lane = INTEL_CX0_LANE0;  in intel_c10pll_readout_hw_state()  local
2289 	int lane = crtc_state->lane_count > 2 ? INTEL_CX0_BOTH_LANES : INTEL_CX0_LANE0;  in intel_c20_pll_program()  local
2493 	int lane = 0;  in intel_cx0_get_powerdown_update()  local
2504 	int lane = 0;  in intel_cx0_get_powerdown_state()  local
2517 	int lane;  in intel_cx0_powerdown_change_sequence()  local
2561 	int lane = 0;  in intel_cx0_get_pclk_refclk_request()  local
2572 	int lane = 0;  in intel_cx0_get_pclk_refclk_ack()  local
2684 	int lane = 0;  in intel_cx0_get_pclk_pll_request()  local
2695 	int lane = 0;  in intel_cx0_get_pclk_pll_ack()  local