Lines Matching full:edp

1302 		 * to mean "eDP". The VBT spec doesn't agree with that  in parse_driver_features()
1396 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); in parse_power_conservation_features()
1407 const struct bdb_edp *edp; in parse_edp() local
1412 edp = bdb_find_section(i915, BDB_EDP); in parse_edp()
1413 if (!edp) in parse_edp()
1416 switch (panel_bits(edp->color_depth, panel_type, 2)) { in parse_edp()
1418 panel->vbt.edp.bpp = 18; in parse_edp()
1421 panel->vbt.edp.bpp = 24; in parse_edp()
1424 panel->vbt.edp.bpp = 30; in parse_edp()
1428 /* Get the eDP sequencing and link info */ in parse_edp()
1429 edp_pps = &edp->power_seqs[panel_type]; in parse_edp()
1430 edp_link_params = &edp->fast_link_params[panel_type]; in parse_edp()
1432 panel->vbt.edp.pps = *edp_pps; in parse_edp()
1435 panel->vbt.edp.rate = in parse_edp()
1436 edp->edp_fast_link_training_rate[panel_type] * 20; in parse_edp()
1440 panel->vbt.edp.rate = 162000; in parse_edp()
1443 panel->vbt.edp.rate = 270000; in parse_edp()
1446 panel->vbt.edp.rate = 540000; in parse_edp()
1450 "VBT has unknown eDP link rate value %u\n", in parse_edp()
1458 panel->vbt.edp.lanes = 1; in parse_edp()
1461 panel->vbt.edp.lanes = 2; in parse_edp()
1464 panel->vbt.edp.lanes = 4; in parse_edp()
1468 "VBT has unknown eDP lane count value %u\n", in parse_edp()
1475 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; in parse_edp()
1478 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; in parse_edp()
1481 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; in parse_edp()
1484 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; in parse_edp()
1488 "VBT has unknown eDP pre-emphasis value %u\n", in parse_edp()
1495 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; in parse_edp()
1498 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; in parse_edp()
1501 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; in parse_edp()
1504 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; in parse_edp()
1508 "VBT has unknown eDP voltage swing value %u\n", in parse_edp()
1518 panel->vbt.edp.low_vswing = in parse_edp()
1521 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; in parse_edp()
1522 panel->vbt.edp.low_vswing = vswing == 0; in parse_edp()
1526 panel->vbt.edp.drrs_msa_timing_delay = in parse_edp()
1527 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); in parse_edp()
1530 panel->vbt.edp.max_link_rate = in parse_edp()
1531 edp->edp_max_port_link_rate[panel_type] * 20; in parse_edp()
2612 …"Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%… in print_ddi_port()