Lines Matching +full:display +full:- +full:height +full:- +full:chars
3 * Copyright (c) 2007-2008 Intel Corporation
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
81 /* Force reduced-blanking timings for detailed modes */
91 /* Non desktop display (i.e. HMD) */
132 /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
138 /* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
148 /* Envision Peripherals, Inc. EN-7100e */
166 /* LG Philips LCD LP154W01-A5 */
172 /* Samsung SyncMaster 22[5-6]BW */
176 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
188 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
191 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
247 /* 0x01 - 640x350@85Hz */
251 /* 0x02 - 640x400@85Hz */
255 /* 0x03 - 720x400@85Hz */
259 /* 0x04 - 640x480@60Hz */
263 /* 0x05 - 640x480@72Hz */
267 /* 0x06 - 640x480@75Hz */
271 /* 0x07 - 640x480@85Hz */
275 /* 0x08 - 800x600@56Hz */
279 /* 0x09 - 800x600@60Hz */
283 /* 0x0a - 800x600@72Hz */
287 /* 0x0b - 800x600@75Hz */
291 /* 0x0c - 800x600@85Hz */
295 /* 0x0d - 800x600@120Hz RB */
299 /* 0x0e - 848x480@60Hz */
303 /* 0x0f - 1024x768@43Hz, interlace */
308 /* 0x10 - 1024x768@60Hz */
312 /* 0x11 - 1024x768@70Hz */
316 /* 0x12 - 1024x768@75Hz */
320 /* 0x13 - 1024x768@85Hz */
324 /* 0x14 - 1024x768@120Hz RB */
328 /* 0x15 - 1152x864@75Hz */
332 /* 0x55 - 1280x720@60Hz */
336 /* 0x16 - 1280x768@60Hz RB */
340 /* 0x17 - 1280x768@60Hz */
344 /* 0x18 - 1280x768@75Hz */
348 /* 0x19 - 1280x768@85Hz */
352 /* 0x1a - 1280x768@120Hz RB */
356 /* 0x1b - 1280x800@60Hz RB */
360 /* 0x1c - 1280x800@60Hz */
364 /* 0x1d - 1280x800@75Hz */
368 /* 0x1e - 1280x800@85Hz */
372 /* 0x1f - 1280x800@120Hz RB */
376 /* 0x20 - 1280x960@60Hz */
380 /* 0x21 - 1280x960@85Hz */
384 /* 0x22 - 1280x960@120Hz RB */
388 /* 0x23 - 1280x1024@60Hz */
392 /* 0x24 - 1280x1024@75Hz */
396 /* 0x25 - 1280x1024@85Hz */
400 /* 0x26 - 1280x1024@120Hz RB */
404 /* 0x27 - 1360x768@60Hz */
408 /* 0x28 - 1360x768@120Hz RB */
412 /* 0x51 - 1366x768@60Hz */
416 /* 0x56 - 1366x768@60Hz */
420 /* 0x29 - 1400x1050@60Hz RB */
424 /* 0x2a - 1400x1050@60Hz */
428 /* 0x2b - 1400x1050@75Hz */
432 /* 0x2c - 1400x1050@85Hz */
436 /* 0x2d - 1400x1050@120Hz RB */
440 /* 0x2e - 1440x900@60Hz RB */
444 /* 0x2f - 1440x900@60Hz */
448 /* 0x30 - 1440x900@75Hz */
452 /* 0x31 - 1440x900@85Hz */
456 /* 0x32 - 1440x900@120Hz RB */
460 /* 0x53 - 1600x900@60Hz */
464 /* 0x33 - 1600x1200@60Hz */
468 /* 0x34 - 1600x1200@65Hz */
472 /* 0x35 - 1600x1200@70Hz */
476 /* 0x36 - 1600x1200@75Hz */
480 /* 0x37 - 1600x1200@85Hz */
484 /* 0x38 - 1600x1200@120Hz RB */
488 /* 0x39 - 1680x1050@60Hz RB */
492 /* 0x3a - 1680x1050@60Hz */
496 /* 0x3b - 1680x1050@75Hz */
500 /* 0x3c - 1680x1050@85Hz */
504 /* 0x3d - 1680x1050@120Hz RB */
508 /* 0x3e - 1792x1344@60Hz */
512 /* 0x3f - 1792x1344@75Hz */
516 /* 0x40 - 1792x1344@120Hz RB */
520 /* 0x41 - 1856x1392@60Hz */
524 /* 0x42 - 1856x1392@75Hz */
528 /* 0x43 - 1856x1392@120Hz RB */
532 /* 0x52 - 1920x1080@60Hz */
536 /* 0x44 - 1920x1200@60Hz RB */
540 /* 0x45 - 1920x1200@60Hz */
544 /* 0x46 - 1920x1200@75Hz */
548 /* 0x47 - 1920x1200@85Hz */
552 /* 0x48 - 1920x1200@120Hz RB */
556 /* 0x49 - 1920x1440@60Hz */
560 /* 0x4a - 1920x1440@75Hz */
564 /* 0x4b - 1920x1440@120Hz RB */
568 /* 0x54 - 2048x1152@60Hz */
572 /* 0x4c - 2560x1600@60Hz RB */
576 /* 0x4d - 2560x1600@60Hz */
580 /* 0x4e - 2560x1600@75Hz */
584 /* 0x4f - 2560x1600@85Hz */
588 /* 0x50 - 2560x1600@120Hz RB */
592 /* 0x57 - 4096x2160@60Hz RB */
596 /* 0x58 - 4096x2160@59.94Hz RB */
605 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
609 * The DMT modes have been fact-checked; the rest are mild guesses.
736 * From CEA/CTA-861 spec.
741 /* 1 - 640x480@60Hz 4:3 */
746 /* 2 - 720x480@60Hz 4:3 */
751 /* 3 - 720x480@60Hz 16:9 */
756 /* 4 - 1280x720@60Hz 16:9 */
761 /* 5 - 1920x1080i@60Hz 16:9 */
767 /* 6 - 720(1440)x480i@60Hz 4:3 */
773 /* 7 - 720(1440)x480i@60Hz 16:9 */
779 /* 8 - 720(1440)x240@60Hz 4:3 */
785 /* 9 - 720(1440)x240@60Hz 16:9 */
791 /* 10 - 2880x480i@60Hz 4:3 */
797 /* 11 - 2880x480i@60Hz 16:9 */
803 /* 12 - 2880x240@60Hz 4:3 */
808 /* 13 - 2880x240@60Hz 16:9 */
813 /* 14 - 1440x480@60Hz 4:3 */
818 /* 15 - 1440x480@60Hz 16:9 */
823 /* 16 - 1920x1080@60Hz 16:9 */
828 /* 17 - 720x576@50Hz 4:3 */
833 /* 18 - 720x576@50Hz 16:9 */
838 /* 19 - 1280x720@50Hz 16:9 */
843 /* 20 - 1920x1080i@50Hz 16:9 */
849 /* 21 - 720(1440)x576i@50Hz 4:3 */
855 /* 22 - 720(1440)x576i@50Hz 16:9 */
861 /* 23 - 720(1440)x288@50Hz 4:3 */
867 /* 24 - 720(1440)x288@50Hz 16:9 */
873 /* 25 - 2880x576i@50Hz 4:3 */
879 /* 26 - 2880x576i@50Hz 16:9 */
885 /* 27 - 2880x288@50Hz 4:3 */
890 /* 28 - 2880x288@50Hz 16:9 */
895 /* 29 - 1440x576@50Hz 4:3 */
900 /* 30 - 1440x576@50Hz 16:9 */
905 /* 31 - 1920x1080@50Hz 16:9 */
910 /* 32 - 1920x1080@24Hz 16:9 */
915 /* 33 - 1920x1080@25Hz 16:9 */
920 /* 34 - 1920x1080@30Hz 16:9 */
925 /* 35 - 2880x480@60Hz 4:3 */
930 /* 36 - 2880x480@60Hz 16:9 */
935 /* 37 - 2880x576@50Hz 4:3 */
940 /* 38 - 2880x576@50Hz 16:9 */
945 /* 39 - 1920x1080i@50Hz 16:9 */
951 /* 40 - 1920x1080i@100Hz 16:9 */
957 /* 41 - 1280x720@100Hz 16:9 */
962 /* 42 - 720x576@100Hz 4:3 */
967 /* 43 - 720x576@100Hz 16:9 */
972 /* 44 - 720(1440)x576i@100Hz 4:3 */
978 /* 45 - 720(1440)x576i@100Hz 16:9 */
984 /* 46 - 1920x1080i@120Hz 16:9 */
990 /* 47 - 1280x720@120Hz 16:9 */
995 /* 48 - 720x480@120Hz 4:3 */
1000 /* 49 - 720x480@120Hz 16:9 */
1005 /* 50 - 720(1440)x480i@120Hz 4:3 */
1011 /* 51 - 720(1440)x480i@120Hz 16:9 */
1017 /* 52 - 720x576@200Hz 4:3 */
1022 /* 53 - 720x576@200Hz 16:9 */
1027 /* 54 - 720(1440)x576i@200Hz 4:3 */
1033 /* 55 - 720(1440)x576i@200Hz 16:9 */
1039 /* 56 - 720x480@240Hz 4:3 */
1044 /* 57 - 720x480@240Hz 16:9 */
1049 /* 58 - 720(1440)x480i@240Hz 4:3 */
1055 /* 59 - 720(1440)x480i@240Hz 16:9 */
1061 /* 60 - 1280x720@24Hz 16:9 */
1066 /* 61 - 1280x720@25Hz 16:9 */
1071 /* 62 - 1280x720@30Hz 16:9 */
1076 /* 63 - 1920x1080@120Hz 16:9 */
1081 /* 64 - 1920x1080@100Hz 16:9 */
1086 /* 65 - 1280x720@24Hz 64:27 */
1091 /* 66 - 1280x720@25Hz 64:27 */
1096 /* 67 - 1280x720@30Hz 64:27 */
1101 /* 68 - 1280x720@50Hz 64:27 */
1106 /* 69 - 1280x720@60Hz 64:27 */
1111 /* 70 - 1280x720@100Hz 64:27 */
1116 /* 71 - 1280x720@120Hz 64:27 */
1121 /* 72 - 1920x1080@24Hz 64:27 */
1126 /* 73 - 1920x1080@25Hz 64:27 */
1131 /* 74 - 1920x1080@30Hz 64:27 */
1136 /* 75 - 1920x1080@50Hz 64:27 */
1141 /* 76 - 1920x1080@60Hz 64:27 */
1146 /* 77 - 1920x1080@100Hz 64:27 */
1151 /* 78 - 1920x1080@120Hz 64:27 */
1156 /* 79 - 1680x720@24Hz 64:27 */
1161 /* 80 - 1680x720@25Hz 64:27 */
1166 /* 81 - 1680x720@30Hz 64:27 */
1171 /* 82 - 1680x720@50Hz 64:27 */
1176 /* 83 - 1680x720@60Hz 64:27 */
1181 /* 84 - 1680x720@100Hz 64:27 */
1186 /* 85 - 1680x720@120Hz 64:27 */
1191 /* 86 - 2560x1080@24Hz 64:27 */
1196 /* 87 - 2560x1080@25Hz 64:27 */
1201 /* 88 - 2560x1080@30Hz 64:27 */
1206 /* 89 - 2560x1080@50Hz 64:27 */
1211 /* 90 - 2560x1080@60Hz 64:27 */
1216 /* 91 - 2560x1080@100Hz 64:27 */
1221 /* 92 - 2560x1080@120Hz 64:27 */
1226 /* 93 - 3840x2160@24Hz 16:9 */
1231 /* 94 - 3840x2160@25Hz 16:9 */
1236 /* 95 - 3840x2160@30Hz 16:9 */
1241 /* 96 - 3840x2160@50Hz 16:9 */
1246 /* 97 - 3840x2160@60Hz 16:9 */
1251 /* 98 - 4096x2160@24Hz 256:135 */
1256 /* 99 - 4096x2160@25Hz 256:135 */
1261 /* 100 - 4096x2160@30Hz 256:135 */
1266 /* 101 - 4096x2160@50Hz 256:135 */
1271 /* 102 - 4096x2160@60Hz 256:135 */
1276 /* 103 - 3840x2160@24Hz 64:27 */
1281 /* 104 - 3840x2160@25Hz 64:27 */
1286 /* 105 - 3840x2160@30Hz 64:27 */
1291 /* 106 - 3840x2160@50Hz 64:27 */
1296 /* 107 - 3840x2160@60Hz 64:27 */
1301 /* 108 - 1280x720@48Hz 16:9 */
1306 /* 109 - 1280x720@48Hz 64:27 */
1311 /* 110 - 1680x720@48Hz 64:27 */
1316 /* 111 - 1920x1080@48Hz 16:9 */
1321 /* 112 - 1920x1080@48Hz 64:27 */
1326 /* 113 - 2560x1080@48Hz 64:27 */
1331 /* 114 - 3840x2160@48Hz 16:9 */
1336 /* 115 - 4096x2160@48Hz 256:135 */
1341 /* 116 - 3840x2160@48Hz 64:27 */
1346 /* 117 - 3840x2160@100Hz 16:9 */
1351 /* 118 - 3840x2160@120Hz 16:9 */
1356 /* 119 - 3840x2160@100Hz 64:27 */
1361 /* 120 - 3840x2160@120Hz 64:27 */
1366 /* 121 - 5120x2160@24Hz 64:27 */
1371 /* 122 - 5120x2160@25Hz 64:27 */
1376 /* 123 - 5120x2160@30Hz 64:27 */
1381 /* 124 - 5120x2160@48Hz 64:27 */
1386 /* 125 - 5120x2160@50Hz 64:27 */
1391 /* 126 - 5120x2160@60Hz 64:27 */
1396 /* 127 - 5120x2160@100Hz 64:27 */
1404 * From CEA/CTA-861 spec.
1409 /* 193 - 5120x2160@120Hz 64:27 */
1414 /* 194 - 7680x4320@24Hz 16:9 */
1419 /* 195 - 7680x4320@25Hz 16:9 */
1424 /* 196 - 7680x4320@30Hz 16:9 */
1429 /* 197 - 7680x4320@48Hz 16:9 */
1434 /* 198 - 7680x4320@50Hz 16:9 */
1439 /* 199 - 7680x4320@60Hz 16:9 */
1444 /* 200 - 7680x4320@100Hz 16:9 */
1449 /* 201 - 7680x4320@120Hz 16:9 */
1454 /* 202 - 7680x4320@24Hz 64:27 */
1459 /* 203 - 7680x4320@25Hz 64:27 */
1464 /* 204 - 7680x4320@30Hz 64:27 */
1469 /* 205 - 7680x4320@48Hz 64:27 */
1474 /* 206 - 7680x4320@50Hz 64:27 */
1479 /* 207 - 7680x4320@60Hz 64:27 */
1484 /* 208 - 7680x4320@100Hz 64:27 */
1489 /* 209 - 7680x4320@120Hz 64:27 */
1494 /* 210 - 10240x4320@24Hz 64:27 */
1499 /* 211 - 10240x4320@25Hz 64:27 */
1504 /* 212 - 10240x4320@30Hz 64:27 */
1509 /* 213 - 10240x4320@48Hz 64:27 */
1514 /* 214 - 10240x4320@50Hz 64:27 */
1519 /* 215 - 10240x4320@60Hz 64:27 */
1524 /* 216 - 10240x4320@100Hz 64:27 */
1529 /* 217 - 10240x4320@120Hz 64:27 */
1534 /* 218 - 4096x2160@100Hz 256:135 */
1539 /* 219 - 4096x2160@120Hz 256:135 */
1550 /* 0 - dummy, VICs start at 1 */
1552 /* 1 - 3840x2160@30Hz */
1558 /* 2 - 3840x2160@25Hz */
1564 /* 3 - 3840x2160@24Hz */
1570 /* 4 - 4096x2160@24Hz (SMPTE) */
1600 return edid->extensions; in edid_extension_block_count()
1636 num_blocks = edid_block_count(drm_edid->edid); in __drm_edid_block_count()
1638 /* HF-EEODB override */ in __drm_edid_block_count()
1639 if (drm_edid->size >= edid_size_by_blocks(2)) { in __drm_edid_block_count()
1643 * Note: HF-EEODB may specify a smaller extension count than the in __drm_edid_block_count()
1646 eeodb = edid_hfeeodb_block_count(drm_edid->edid); in __drm_edid_block_count()
1659 (int)drm_edid->size / EDID_LENGTH); in drm_edid_block_count()
1665 return drm_edid_block_count(drm_edid) - 1; in drm_edid_extension_block_count()
1670 return edid_block_data(drm_edid->edid, index); in drm_edid_block_data()
1676 return edid_extension_block_data(drm_edid->edid, index); in drm_edid_extension_block_data()
1691 drm_edid->edid = edid; in drm_edid_legacy_init()
1692 drm_edid->size = edid_size(edid); in drm_edid_legacy_init()
1721 iter->drm_edid = drm_edid; in drm_edid_iter_begin()
1728 if (!iter->drm_edid) in __drm_edid_iter_next()
1731 if (iter->index < drm_edid_block_count(iter->drm_edid)) in __drm_edid_iter_next()
1732 block = drm_edid_block_data(iter->drm_edid, iter->index++); in __drm_edid_iter_next()
1755 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1768 if (edid->header[i] == edid_header[i]) in drm_edid_header_is_valid()
1779 "Minimum number of valid EDID header bytes (0-8, default 6)");
1787 for (i = 0; i < EDID_LENGTH - 1; i++) in edid_block_compute_checksum()
1790 crc = 0x100 - csum; in edid_block_compute_checksum()
1799 return block->checksum; in edid_block_get_checksum()
1815 * drm_edid_are_equal - compare two edid blobs.
1887 if (block->version != 1) in edid_block_check()
1945 block->version); in edid_block_status_print()
1972 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
2032 * drm_edid_is_valid - sanity check EDID data
2035 * Sanity-check an entire EDID record (including extensions)
2058 * drm_edid_valid - sanity check EDID data
2073 if (edid_size_by_blocks(__drm_edid_block_count(drm_edid)) != drm_edid->size) in drm_edid_valid()
2094 * Note: If the EDID uses HF-EEODB, but has invalid blocks, we'll revert in edid_filter_invalid_blocks()
2096 * modifying the HF-EEODB extension too. in edid_filter_invalid_blocks()
2115 edid->extensions = valid_blocks - 1; in edid_filter_invalid_blocks()
2116 edid->checksum = edid_block_compute_checksum(edid); in edid_filter_invalid_blocks()
2129 * drm_do_probe_ddc_edid() - get EDID information via I2C
2137 * Return: 0 on success or -1 on failure.
2150 * adapter reports EAGAIN. However, we find that bit-banging transfers in drm_do_probe_ddc_edid()
2176 * Avoid sending the segment addr to not upset non-compliant in drm_do_probe_ddc_edid()
2179 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); in drm_do_probe_ddc_edid()
2181 if (ret == -ENXIO) { in drm_do_probe_ddc_edid()
2182 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", in drm_do_probe_ddc_edid()
2183 adapter->name); in drm_do_probe_ddc_edid()
2186 } while (ret != xfers && --retries); in drm_do_probe_ddc_edid()
2188 return ret == xfers ? 0 : -1; in drm_do_probe_ddc_edid()
2203 last_block = edid->extensions; in connector_bad_edid()
2207 connector->real_edid_checksum = in connector_bad_edid()
2210 if (connector->bad_edid_counter++ && !drm_debug_enabled(DRM_UT_KMS)) in connector_bad_edid()
2213 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] EDID is invalid:\n", in connector_bad_edid()
2214 connector->base.id, connector->name); in connector_bad_edid()
2224 mutex_lock(&connector->edid_override_mutex); in drm_edid_override_get()
2226 if (connector->edid_override) in drm_edid_override_get()
2227 override = drm_edid_dup(connector->edid_override); in drm_edid_override_get()
2229 mutex_unlock(&connector->edid_override_mutex); in drm_edid_override_get()
2242 mutex_lock(&connector->edid_override_mutex); in drm_edid_override_show()
2244 drm_edid = connector->edid_override; in drm_edid_override_show()
2246 seq_write(m, drm_edid->edid, drm_edid->size); in drm_edid_override_show()
2248 mutex_unlock(&connector->edid_override_mutex); in drm_edid_override_show()
2261 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] EDID override invalid\n", in drm_edid_override_set()
2262 connector->base.id, connector->name); in drm_edid_override_set()
2264 return -EINVAL; in drm_edid_override_set()
2267 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] EDID override set\n", in drm_edid_override_set()
2268 connector->base.id, connector->name); in drm_edid_override_set()
2270 mutex_lock(&connector->edid_override_mutex); in drm_edid_override_set()
2272 drm_edid_free(connector->edid_override); in drm_edid_override_set()
2273 connector->edid_override = drm_edid; in drm_edid_override_set()
2275 mutex_unlock(&connector->edid_override_mutex); in drm_edid_override_set()
2283 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] EDID override reset\n", in drm_edid_override_reset()
2284 connector->base.id, connector->name); in drm_edid_override_reset()
2286 mutex_lock(&connector->edid_override_mutex); in drm_edid_override_reset()
2288 drm_edid_free(connector->edid_override); in drm_edid_override_reset()
2289 connector->edid_override = NULL; in drm_edid_override_reset()
2291 mutex_unlock(&connector->edid_override_mutex); in drm_edid_override_reset()
2297 * drm_edid_override_connector_update - add modes from override/firmware EDID
2319 drm_dbg_kms(connector->dev, in drm_edid_override_connector_update()
2321 connector->base.id, connector->name, num_modes); in drm_edid_override_connector_update()
2375 alloc_size = override->size; in _drm_do_get_edid()
2376 edid = kmemdup(override->edid, alloc_size, GFP_KERNEL); in _drm_do_get_edid()
2396 connector->edid_corrupt = false; in _drm_do_get_edid()
2398 connector->edid_corrupt = true; in _drm_do_get_edid()
2402 connector->null_edid_counter++; in _drm_do_get_edid()
2432 * the first Data Block is HF-EEODB, override the in _drm_do_get_edid()
2435 * Note: HF-EEODB could specify a smaller extension in _drm_do_get_edid()
2470 * drm_do_get_edid - get EDID data using a custom EDID block read function
2498 * drm_edid_raw - Get a pointer to the raw EDID data.
2509 if (!drm_edid || !drm_edid->size) in drm_edid_raw()
2516 if (WARN_ON(edid_size(drm_edid->edid) > drm_edid->size)) in drm_edid_raw()
2519 return drm_edid->edid; in drm_edid_raw()
2533 drm_edid->edid = edid; in _drm_edid_alloc()
2534 drm_edid->size = size; in _drm_edid_alloc()
2541 * drm_edid_alloc - Allocate a new drm_edid container
2574 * drm_edid_dup - Duplicate a drm_edid container
2586 return drm_edid_alloc(drm_edid->edid, drm_edid->size); in drm_edid_dup()
2591 * drm_edid_free - Free the drm_edid container
2599 kfree(drm_edid->edid); in drm_edid_free()
2605 * drm_probe_ddc() - probe DDC presence
2620 * drm_get_edid - get EDID data, if available
2634 if (connector->force == DRM_FORCE_OFF) in drm_get_edid()
2637 if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter)) in drm_get_edid()
2647 * drm_edid_read_custom - Read EDID data using given EDID block read function
2682 drm_WARN_ON(connector->dev, !size); in drm_edid_read_custom()
2693 * drm_edid_read_ddc - Read EDID data using given I2C adapter
2703 * Prefer initializing connector->ddc with drm_connector_init_with_ddc() and
2715 if (connector->force == DRM_FORCE_OFF) in drm_edid_read_ddc()
2718 if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter)) in drm_edid_read_ddc()
2730 * drm_edid_read - Read EDID data using connector's I2C adapter
2745 if (drm_WARN_ON(connector->dev, !connector->ddc)) in drm_edid_read()
2748 return drm_edid_read_ddc(connector, connector->ddc); in drm_edid_read()
2755 * We represent the ID as a 32-bit number so it can easily be compared in edid_extract_panel_id()
2767 return (u32)edid->mfg_id[0] << 24 | in edid_extract_panel_id()
2768 (u32)edid->mfg_id[1] << 16 | in edid_extract_panel_id()
2773 * drm_edid_get_panel_id - Get a panel's ID through DDC
2777 * that the EDID is valid) extracts the ID out of it. The ID is a 32-bit value
2778 * (16 bits of manufacturer ID and 16 bits of per-manufacturer ID) that's
2790 * Return: A 32-bit ID that should be different for each make/model of panel.
2827 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
2840 struct drm_device *dev = connector->dev; in drm_get_edid_switcheroo()
2841 struct pci_dev *pdev = to_pci_dev(dev->dev); in drm_get_edid_switcheroo()
2844 if (drm_WARN_ON_ONCE(dev, !dev_is_pci(dev->dev))) in drm_get_edid_switcheroo()
2856 * drm_edid_read_switcheroo - get EDID data for a vga_switcheroo output
2869 struct drm_device *dev = connector->dev; in drm_edid_read_switcheroo()
2870 struct pci_dev *pdev = to_pci_dev(dev->dev); in drm_edid_read_switcheroo()
2873 if (drm_WARN_ON_ONCE(dev, !dev_is_pci(dev->dev))) in drm_edid_read_switcheroo()
2885 * drm_edid_duplicate - duplicate an EDID and the extensions
2902 * edid_get_quirks - return quirk flags for a given EDID
2909 u32 panel_id = edid_extract_panel_id(drm_edid->edid); in edid_get_quirks()
2915 if (quirk->panel_id == panel_id) in edid_get_quirks()
2916 return quirk->quirks; in edid_get_quirks()
2922 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
2923 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
2931 const struct drm_display_info *info = &connector->display_info; in edid_fixup_preferred()
2936 if (list_empty(&connector->probed_modes)) in edid_fixup_preferred()
2939 if (info->quirks & EDID_QUIRK_PREFER_LARGE_60) in edid_fixup_preferred()
2941 if (info->quirks & EDID_QUIRK_PREFER_LARGE_75) in edid_fixup_preferred()
2944 preferred_mode = list_first_entry(&connector->probed_modes, in edid_fixup_preferred()
2947 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { in edid_fixup_preferred()
2948 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; in edid_fixup_preferred()
2967 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; in edid_fixup_preferred()
2973 return (mode->htotal - mode->hdisplay == 160) && in mode_is_rb()
2974 (mode->hsync_end - mode->hdisplay == 80) && in mode_is_rb()
2975 (mode->hsync_end - mode->hsync_start == 32) && in mode_is_rb()
2976 (mode->vsync_start - mode->vdisplay == 3); in mode_is_rb()
2980 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
2983 * @vsize: Mode height
2985 * @rb: Mode reduced-blanking-ness
3000 if (hsize != ptr->hdisplay) in drm_mode_find_dmt()
3002 if (vsize != ptr->vdisplay) in drm_mode_find_dmt()
3022 return descriptor->pixel_clock == 0 && in is_display_descriptor()
3023 descriptor->data.other_data.pad1 == 0 && in is_display_descriptor()
3024 descriptor->data.other_data.type == type; in is_display_descriptor()
3031 return descriptor->pixel_clock != 0; in is_detailed_timing_descriptor()
3046 n = (127 - d) / 18; in cea_for_each_detailed_block()
3075 cb(&drm_edid->edid->detailed_timings[i], closure); in drm_for_each_detailed_block()
3104 if (descriptor->data.other_data.data.range.flags == DRM_EDID_CVT_SUPPORT_FLAG && in is_rb()
3105 descriptor->data.other_data.data.range.formula.cvt.flags & DRM_EDID_CVT_FLAGS_REDUCED_BLANKING) in is_rb()
3113 if (drm_edid->edid->revision >= 4) { in drm_monitor_supports_rb()
3133 if (descriptor->data.other_data.data.range.flags == DRM_EDID_SECONDARY_GTF_SUPPORT_FLAG) in find_gtf2()
3147 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.hfreq_start_khz * 2 : 0; in drm_gtf2_hbreak()
3159 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.c : 0; in drm_gtf2_2c()
3171 return descriptor ? le16_to_cpu(descriptor->data.other_data.data.range.formula.gtf2.m) : 0; in drm_gtf2_m()
3183 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.k : 0; in drm_gtf2_k()
3195 return descriptor ? descriptor->data.other_data.data.range.formula.gtf2.j : 0; in drm_gtf2_2j()
3208 switch (descriptor->data.other_data.data.range.flags) { in get_timing_level()
3226 const struct edid *edid = drm_edid->edid; in standard_timing_level()
3228 if (edid->revision >= 4) { in standard_timing_level()
3238 } else if (edid->revision >= 3 && drm_gtf2_hbreak(drm_edid)) { in standard_timing_level()
3240 } else if (edid->revision >= 2) { in standard_timing_level()
3261 if (mode->htotal <= 0) in drm_mode_hsync()
3264 return DIV_ROUND_CLOSEST(mode->clock, mode->htotal); in drm_mode_hsync()
3304 struct drm_device *dev = connector->dev; in drm_mode_std()
3308 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) in drm_mode_std()
3310 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) in drm_mode_std()
3314 if (bad_std_timing(t->hsize, t->vfreq_aspect)) in drm_mode_std()
3318 hsize = t->hsize * 8 + 248; in drm_mode_std()
3323 if (drm_edid->edid->revision < 3) in drm_mode_std()
3348 list_for_each_entry(m, &connector->probed_modes, head) in drm_mode_std()
3349 if (m->hdisplay == hsize && m->vdisplay == vsize && in drm_mode_std()
3359 mode->hdisplay = 1366; in drm_mode_std()
3360 mode->hsync_start = mode->hsync_start - 1; in drm_mode_std()
3361 mode->hsync_end = mode->hsync_end - 1; in drm_mode_std()
3396 * encoded. Our internal representation is of frame height, but some
3397 * HDTV detailed timings are encoded as field height.
3419 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) in drm_mode_do_interlace_quirk()
3423 if ((mode->hdisplay == cea_interlaced[i].w) && in drm_mode_do_interlace_quirk()
3424 (mode->vdisplay == cea_interlaced[i].h / 2)) { in drm_mode_do_interlace_quirk()
3425 mode->vdisplay *= 2; in drm_mode_do_interlace_quirk()
3426 mode->vsync_start *= 2; in drm_mode_do_interlace_quirk()
3427 mode->vsync_end *= 2; in drm_mode_do_interlace_quirk()
3428 mode->vtotal *= 2; in drm_mode_do_interlace_quirk()
3429 mode->vtotal |= 1; in drm_mode_do_interlace_quirk()
3433 mode->flags |= DRM_MODE_FLAG_INTERLACE; in drm_mode_do_interlace_quirk()
3445 const struct drm_display_info *info = &connector->display_info; in drm_mode_detailed()
3446 struct drm_device *dev = connector->dev; in drm_mode_detailed()
3448 const struct detailed_pixel_timing *pt = &timing->data.pixel_data; in drm_mode_detailed()
3449 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; in drm_mode_detailed()
3450 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; in drm_mode_detailed()
3451 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; in drm_mode_detailed()
3452 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; in drm_mode_detailed()
3453 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; in drm_mode_detailed()
3454 …unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse… in drm_mode_detailed()
3455 …unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_puls… in drm_mode_detailed()
3456 …unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offse… in drm_mode_detailed()
3462 if (pt->misc & DRM_EDID_PT_STEREO) { in drm_mode_detailed()
3464 connector->base.id, connector->name); in drm_mode_detailed()
3467 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { in drm_mode_detailed()
3469 connector->base.id, connector->name); in drm_mode_detailed()
3475 connector->base.id, connector->name); in drm_mode_detailed()
3479 if (info->quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { in drm_mode_detailed()
3491 if (info->quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) in drm_mode_detailed()
3492 mode->clock = 1088 * 10; in drm_mode_detailed()
3494 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; in drm_mode_detailed()
3496 mode->hdisplay = hactive; in drm_mode_detailed()
3497 mode->hsync_start = mode->hdisplay + hsync_offset; in drm_mode_detailed()
3498 mode->hsync_end = mode->hsync_start + hsync_pulse_width; in drm_mode_detailed()
3499 mode->htotal = mode->hdisplay + hblank; in drm_mode_detailed()
3501 mode->vdisplay = vactive; in drm_mode_detailed()
3502 mode->vsync_start = mode->vdisplay + vsync_offset; in drm_mode_detailed()
3503 mode->vsync_end = mode->vsync_start + vsync_pulse_width; in drm_mode_detailed()
3504 mode->vtotal = mode->vdisplay + vblank; in drm_mode_detailed()
3507 if (mode->hsync_end > mode->htotal) { in drm_mode_detailed()
3508 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] reducing hsync_end %d->%d\n", in drm_mode_detailed()
3509 connector->base.id, connector->name, in drm_mode_detailed()
3510 mode->hsync_end, mode->htotal); in drm_mode_detailed()
3511 mode->hsync_end = mode->htotal; in drm_mode_detailed()
3513 if (mode->vsync_end > mode->vtotal) { in drm_mode_detailed()
3514 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] reducing vsync_end %d->%d\n", in drm_mode_detailed()
3515 connector->base.id, connector->name, in drm_mode_detailed()
3516 mode->vsync_end, mode->vtotal); in drm_mode_detailed()
3517 mode->vsync_end = mode->vtotal; in drm_mode_detailed()
3522 if (info->quirks & EDID_QUIRK_DETAILED_SYNC_PP) { in drm_mode_detailed()
3523 mode->flags |= DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC; in drm_mode_detailed()
3525 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? in drm_mode_detailed()
3527 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? in drm_mode_detailed()
3532 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; in drm_mode_detailed()
3533 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; in drm_mode_detailed()
3535 if (info->quirks & EDID_QUIRK_DETAILED_IN_CM) { in drm_mode_detailed()
3536 mode->width_mm *= 10; in drm_mode_detailed()
3537 mode->height_mm *= 10; in drm_mode_detailed()
3540 if (info->quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { in drm_mode_detailed()
3541 mode->width_mm = drm_edid->edid->width_cm * 10; in drm_mode_detailed()
3542 mode->height_mm = drm_edid->edid->height_cm * 10; in drm_mode_detailed()
3545 mode->type = DRM_MODE_TYPE_DRIVER; in drm_mode_detailed()
3558 if (edid->revision >= 4) in mode_in_hsync_range()
3561 if (edid->revision >= 4) in mode_in_hsync_range()
3575 if (edid->revision >= 4) in mode_in_vsync_range()
3578 if (edid->revision >= 4) in mode_in_vsync_range()
3593 if (edid->revision >= 4 && t[10] == DRM_EDID_CVT_SUPPORT_FLAG) in range_pixel_clock()
3594 return (t[9] * 10000) - ((t[12] >> 2) * 250); in range_pixel_clock()
3604 const struct edid *edid = drm_edid->edid; in mode_in_range()
3615 if (mode->clock > max_clock) in mode_in_range()
3619 if (edid->revision >= 4 && t[10] == DRM_EDID_CVT_SUPPORT_FLAG) in mode_in_range()
3620 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) in mode_in_range()
3635 list_for_each_entry(m, &connector->probed_modes, head) { in valid_inferred_mode()
3636 if (mode->hdisplay == m->hdisplay && in valid_inferred_mode()
3637 mode->vdisplay == m->vdisplay && in valid_inferred_mode()
3640 if (mode->hdisplay <= m->hdisplay && in valid_inferred_mode()
3641 mode->vdisplay <= m->vdisplay) in valid_inferred_mode()
3653 struct drm_device *dev = connector->dev; in drm_dmt_modes_for_range()
3674 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { in drm_mode_fixup_1366x768()
3675 mode->hdisplay = 1366; in drm_mode_fixup_1366x768()
3676 mode->hsync_start--; in drm_mode_fixup_1366x768()
3677 mode->hsync_end--; in drm_mode_fixup_1366x768()
3688 struct drm_device *dev = connector->dev; in drm_gtf_modes_for_range()
3693 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); in drm_gtf_modes_for_range()
3717 struct drm_device *dev = connector->dev; in drm_gtf2_modes_for_range()
3722 newmode = drm_gtf2_mode(dev, drm_edid, m->w, m->h, m->r); in drm_gtf2_modes_for_range()
3746 struct drm_device *dev = connector->dev; in drm_cvt_modes_for_range()
3752 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); in drm_cvt_modes_for_range()
3774 const struct detailed_non_pixel *data = &timing->data.other_data; in do_inferred_modes()
3775 const struct detailed_data_monitor_range *range = &data->data.range; in do_inferred_modes()
3780 closure->modes += drm_dmt_modes_for_range(closure->connector, in do_inferred_modes()
3781 closure->drm_edid, in do_inferred_modes()
3784 if (closure->drm_edid->edid->revision < 2) in do_inferred_modes()
3787 switch (range->flags) { in do_inferred_modes()
3789 closure->modes += drm_gtf2_modes_for_range(closure->connector, in do_inferred_modes()
3790 closure->drm_edid, in do_inferred_modes()
3794 closure->modes += drm_gtf_modes_for_range(closure->connector, in do_inferred_modes()
3795 closure->drm_edid, in do_inferred_modes()
3799 if (closure->drm_edid->edid->revision < 4) in do_inferred_modes()
3802 closure->modes += drm_cvt_modes_for_range(closure->connector, in do_inferred_modes()
3803 closure->drm_edid, in do_inferred_modes()
3820 if (drm_edid->edid->revision >= 1) in add_inferred_modes()
3834 for (j = 7; j >= 0; j--) { in drm_est3_modes()
3835 m = (i * 8) + (7 - j); in drm_est3_modes()
3839 mode = drm_mode_find_dmt(connector->dev, in drm_est3_modes()
3863 closure->modes += drm_est3_modes(closure->connector, timing); in do_established_modes()
3874 struct drm_device *dev = connector->dev; in add_established_modes()
3875 const struct edid *edid = drm_edid->edid; in add_established_modes()
3876 unsigned long est_bits = edid->established_timings.t1 | in add_established_modes()
3877 (edid->established_timings.t2 << 8) | in add_established_modes()
3878 ((edid->established_timings.mfg_rsvd & 0x80) << 9); in add_established_modes()
3897 if (edid->revision >= 1) in add_established_modes()
3908 const struct detailed_non_pixel *data = &timing->data.other_data; in do_standard_modes()
3909 struct drm_connector *connector = closure->connector; in do_standard_modes()
3916 const struct std_timing *std = &data->data.timings[i]; in do_standard_modes()
3919 newmode = drm_mode_std(connector, closure->drm_edid, std); in do_standard_modes()
3922 closure->modes++; in do_standard_modes()
3945 &drm_edid->edid->standard_timings[i]); in add_standard_modes()
3952 if (drm_edid->edid->revision >= 1) in add_standard_modes()
3966 struct drm_device *dev = connector->dev; in drm_cvt_modes()
3972 int width, height; in drm_cvt_modes() local
3974 cvt = &(timing->data.other_data.data.cvt[i]); in drm_cvt_modes()
3976 if (!memcmp(cvt->code, empty, 3)) in drm_cvt_modes()
3979 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; in drm_cvt_modes()
3980 switch (cvt->code[1] & 0x0c) { in drm_cvt_modes()
3981 /* default - because compiler doesn't see that we've enumerated all cases */ in drm_cvt_modes()
3984 width = height * 4 / 3; in drm_cvt_modes()
3987 width = height * 16 / 9; in drm_cvt_modes()
3990 width = height * 16 / 10; in drm_cvt_modes()
3993 width = height * 15 / 9; in drm_cvt_modes()
3998 if (cvt->code[2] & (1 << j)) { in drm_cvt_modes()
3999 newmode = drm_cvt_mode(dev, width, height, in drm_cvt_modes()
4021 closure->modes += drm_cvt_modes(closure->connector, timing); in do_cvt_mode()
4032 if (drm_edid->edid->revision >= 3) in add_cvt_modes()
4052 newmode = drm_mode_detailed(closure->connector, in do_detailed_mode()
4053 closure->drm_edid, timing); in do_detailed_mode()
4057 if (closure->preferred) in do_detailed_mode()
4058 newmode->type |= DRM_MODE_TYPE_PREFERRED; in do_detailed_mode()
4065 fixup_detailed_cea_mode_clock(closure->connector, newmode); in do_detailed_mode()
4067 drm_mode_probed_add(closure->connector, newmode); in do_detailed_mode()
4068 closure->modes++; in do_detailed_mode()
4069 closure->preferred = false; in do_detailed_mode()
4073 * add_detailed_modes - Add modes from detailed timings
4085 if (drm_edid->edid->revision >= 4) in add_detailed_modes()
4089 drm_edid->edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING; in add_detailed_modes()
4096 /* CTA-861-H Table 60 - CTA Tag Codes */
4103 /* CTA-861-H Table 62 - CTA Extended Tag Codes */
4162 if (block->tag == DATA_BLOCK_CTA) { in drm_edid_has_cta_extension()
4174 BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127); in cea_mode_for_vic()
4175 BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219); in cea_mode_for_vic()
4178 return &edid_cea_modes_1[vic - 1]; in cea_mode_for_vic()
4180 return &edid_cea_modes_193[vic - 193]; in cea_mode_for_vic()
4203 unsigned int clock = cea_mode->clock; in cea_mode_alternate_clock()
4213 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) in cea_mode_alternate_clock()
4233 BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 || in cea_mode_alternate_timings()
4234 cea_mode_for_vic(9)->vtotal != 262 || in cea_mode_alternate_timings()
4235 cea_mode_for_vic(12)->vtotal != 262 || in cea_mode_alternate_timings()
4236 cea_mode_for_vic(13)->vtotal != 262 || in cea_mode_alternate_timings()
4237 cea_mode_for_vic(23)->vtotal != 312 || in cea_mode_alternate_timings()
4238 cea_mode_for_vic(24)->vtotal != 312 || in cea_mode_alternate_timings()
4239 cea_mode_for_vic(27)->vtotal != 312 || in cea_mode_alternate_timings()
4240 cea_mode_for_vic(28)->vtotal != 312); in cea_mode_alternate_timings()
4243 vic == 12 || vic == 13) && mode->vtotal < 263) || in cea_mode_alternate_timings()
4245 vic == 27 || vic == 28) && mode->vtotal < 314)) { in cea_mode_alternate_timings()
4246 mode->vsync_start++; in cea_mode_alternate_timings()
4247 mode->vsync_end++; in cea_mode_alternate_timings()
4248 mode->vtotal++; in cea_mode_alternate_timings()
4262 if (!to_match->clock) in drm_match_cea_mode_clock_tolerance()
4265 if (to_match->picture_aspect_ratio) in drm_match_cea_mode_clock_tolerance()
4278 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_cea_mode_clock_tolerance()
4279 abs(to_match->clock - clock2) > clock_tolerance) in drm_match_cea_mode_clock_tolerance()
4292 * drm_match_cea_mode - look for a CEA mode matching given mode
4293 * @to_match: display mode
4295 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
4303 if (!to_match->clock) in drm_match_cea_mode()
4306 if (to_match->picture_aspect_ratio) in drm_match_cea_mode()
4319 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) && in drm_match_cea_mode()
4320 KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2)) in drm_match_cea_mode()
4343 return mode->picture_aspect_ratio; in drm_get_cea_aspect_ratio()
4369 if (!to_match->clock) in drm_match_hdmi_mode_clock_tolerance()
4372 if (to_match->picture_aspect_ratio) in drm_match_hdmi_mode_clock_tolerance()
4380 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode_clock_tolerance()
4383 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_hdmi_mode_clock_tolerance()
4384 abs(to_match->clock - clock2) > clock_tolerance) in drm_match_hdmi_mode_clock_tolerance()
4395 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
4396 * @to_match: display mode
4407 if (!to_match->clock) in drm_match_hdmi_mode()
4410 if (to_match->picture_aspect_ratio) in drm_match_hdmi_mode()
4418 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode()
4421 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || in drm_match_hdmi_mode()
4422 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && in drm_match_hdmi_mode()
4437 struct drm_device *dev = connector->dev; in add_alternate_cea_modes()
4450 list_for_each_entry(mode, &connector->probed_modes, head) { in add_alternate_cea_modes()
4470 clock1 = cea_mode->clock; in add_alternate_cea_modes()
4475 if (mode->clock != clock1 && mode->clock != clock2) in add_alternate_cea_modes()
4483 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK; in add_alternate_cea_modes()
4489 if (mode->clock != clock1) in add_alternate_cea_modes()
4490 newmode->clock = clock1; in add_alternate_cea_modes()
4492 newmode->clock = clock2; in add_alternate_cea_modes()
4494 list_add_tail(&newmode->head, &list); in add_alternate_cea_modes()
4498 list_del(&mode->head); in add_alternate_cea_modes()
4508 /* 0-6 bit vic, 7th bit native mode indicator */ in svd_to_vic()
4516 * Return a display mode for the 0-based vic_index'th VIC across all CTA VDBs in
4522 const struct drm_display_info *info = &connector->display_info; in drm_display_mode_from_vic_index()
4523 struct drm_device *dev = connector->dev; in drm_display_mode_from_vic_index()
4525 if (!info->vics || vic_index >= info->vics_len || !info->vics[vic_index]) in drm_display_mode_from_vic_index()
4528 return drm_display_mode_from_cea_vic(dev, info->vics[vic_index]); in drm_display_mode_from_vic_index()
4532 * do_y420vdb_modes - Parse YCBCR 420 only modes
4537 * Parse the CEA-861-F YCBCR 420 Video Data Block (Y420VDB)
4544 struct drm_device *dev = connector->dev; in do_y420vdb_modes()
4565 * drm_display_mode_from_cea_vic() - return a mode for CEA VIC
4595 const struct drm_display_info *info = &connector->display_info; in add_cta_vdb_modes()
4598 if (!info->vics) in add_cta_vdb_modes()
4601 for (i = 0; i < info->vics_len; i++) { in add_cta_vdb_modes()
4615 int width, height, vrefresh; member
4636 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; in stereo_match_mandatory()
4638 return mode->hdisplay == stereo_mode->width && in stereo_match_mandatory()
4639 mode->vdisplay == stereo_mode->height && in stereo_match_mandatory()
4640 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) && in stereo_match_mandatory()
4641 drm_mode_vrefresh(mode) == stereo_mode->vrefresh; in stereo_match_mandatory()
4646 struct drm_device *dev = connector->dev; in add_hdmi_mandatory_stereo_modes()
4653 list_for_each_entry(mode, &connector->probed_modes, head) { in add_hdmi_mandatory_stereo_modes()
4667 new_mode->flags |= mandatory->flags; in add_hdmi_mandatory_stereo_modes()
4668 list_add_tail(&new_mode->head, &stereo_modes); in add_hdmi_mandatory_stereo_modes()
4673 list_splice_tail(&stereo_modes, &connector->probed_modes); in add_hdmi_mandatory_stereo_modes()
4680 struct drm_device *dev = connector->dev; in add_hdmi_mode()
4684 drm_err(connector->dev, "[CONNECTOR:%d:%s] Unknown HDMI VIC: %d\n", in add_hdmi_mode()
4685 connector->base.id, connector->name, vic); in add_hdmi_mode()
4707 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING; in add_3d_struct_modes()
4715 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; in add_3d_struct_modes()
4723 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; in add_3d_struct_modes()
4753 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
4811 if (len < (8 + offset + hdmi_3d_len - 1)) in do_hdmi_vsdb_modes()
4836 for (i = 0; i < (hdmi_3d_len - multi_len); i++) { in do_hdmi_vsdb_modes()
4844 if (detail_present && (i + 1 == hdmi_3d_len - multi_len)) in do_hdmi_vsdb_modes()
4870 newmode->flags |= newflag; in do_hdmi_vsdb_modes()
4926 /* CTA-861-H section 7.4 CTA Data BLock Collection */
4934 return db->tag_length >> 5; in cea_db_tag()
4942 return db->tag_length & 0x1f; in cea_db_payload_len()
4947 return db->data; in cea_db_data()
4954 db->data[0] == tag; in cea_db_is_extended_tag()
4971 drm_edid_iter_begin(drm_edid, &iter->edid_iter); in cea_db_iter_edid_begin()
4972 displayid_iter_edid_begin(drm_edid, &iter->displayid_iter); in cea_db_iter_edid_begin()
4980 if (!iter->collection) in __cea_db_iter_current_block()
4983 db = (const struct cea_db *)&iter->collection[iter->index]; in __cea_db_iter_current_block()
4985 if (iter->index + sizeof(*db) <= iter->end && in __cea_db_iter_current_block()
4986 iter->index + sizeof(*db) + cea_db_payload_len(db) <= iter->end) in __cea_db_iter_current_block()
4994 * - CTA-861-H section 7.3.3 CTA Extension Version 3
5003 return d - 4; in cea_db_collection_size()
5008 * - VESA E-EDID v1.4
5009 * - CTA-861-H section 7.3.3 CTA Extension Version 3
5015 drm_edid_iter_for_each(ext, &iter->edid_iter) { in __cea_db_iter_edid_next()
5026 iter->index = 4; in __cea_db_iter_edid_next()
5027 iter->end = iter->index + size; in __cea_db_iter_edid_next()
5037 * - DisplayID v1.3 Appendix C: CEA Data Block within a DisplayID Data Block
5038 * - DisplayID v2.0 section 4.10 CTA DisplayID Data Block
5047 displayid_iter_for_each(block, &iter->displayid_iter) { in __cea_db_iter_displayid_next()
5048 if (block->tag != DATA_BLOCK_CTA) in __cea_db_iter_displayid_next()
5055 iter->index = sizeof(*block); in __cea_db_iter_displayid_next()
5056 iter->end = iter->index + block->num_bytes; in __cea_db_iter_displayid_next()
5068 if (iter->collection) { in __cea_db_iter_next()
5072 iter->collection = NULL; in __cea_db_iter_next()
5077 iter->index += sizeof(*db) + cea_db_payload_len(db); in __cea_db_iter_next()
5093 iter->collection = __cea_db_iter_edid_next(iter); in __cea_db_iter_next()
5094 if (!iter->collection) in __cea_db_iter_next()
5095 iter->collection = __cea_db_iter_displayid_next(iter); in __cea_db_iter_next()
5097 if (!iter->collection) in __cea_db_iter_next()
5111 displayid_iter_end(&iter->displayid_iter); in cea_db_iter_end()
5112 drm_edid_iter_end(&iter->edid_iter); in cea_db_iter_end()
5170 * Get the HF-EEODB override extension block count from EDID.
5180 * - HDMI 2.1 section 10.3.6 HDMI Forum EDID Extension Override Data Block
5186 /* No extensions according to base block, no HF-EEODB. */ in edid_hfeeodb_extension_block_count()
5190 /* HF-EEODB is always in the first EDID extension block only */ in edid_hfeeodb_extension_block_count()
5200 * Sinks that include the HF-EEODB in their E-EDID shall include one and in edid_hfeeodb_extension_block_count()
5201 * only one instance of the HF-EEODB in the E-EDID, occupying bytes 4 in edid_hfeeodb_extension_block_count()
5202 * through 6 of Block 1 of the E-EDID. in edid_hfeeodb_extension_block_count()
5211 * CTA-861 YCbCr 4:2:0 Capability Map Data Block (CTA Y420CMDB)
5221 struct drm_display_info *info = &connector->display_info; in parse_cta_y420cmdb()
5222 int i, map_len = cea_db_payload_len(db) - 1; in parse_cta_y420cmdb()
5252 info->color_formats |= DRM_COLOR_FORMAT_YCBCR420; in parse_cta_y420cmdb()
5277 cea_db_payload_len(db) - 1); in add_cea_modes()
5301 clock1 = cea_mode->clock; in fixup_detailed_cea_mode_clock()
5308 clock1 = cea_mode->clock; in fixup_detailed_cea_mode_clock()
5316 if (abs(mode->clock - clock1) < abs(mode->clock - clock2)) in fixup_detailed_cea_mode_clock()
5321 if (mode->clock == clock) in fixup_detailed_cea_mode_clock()
5324 drm_dbg_kms(connector->dev, in fixup_detailed_cea_mode_clock()
5325 "[CONNECTOR:%d:%s] detailed mode matches %s VIC %d, adjusting clock %d -> %d\n", in fixup_detailed_cea_mode_clock()
5326 connector->base.id, connector->name, in fixup_detailed_cea_mode_clock()
5327 type, vic, mode->clock, clock); in fixup_detailed_cea_mode_clock()
5328 mode->clock = clock; in fixup_detailed_cea_mode_clock()
5333 struct hdr_static_metadata *hdr_metadata = &connector->hdr_sink_metadata.hdmi_type1; in drm_calculate_luminance_range()
5335 &connector->display_info.luminance_range; in drm_calculate_luminance_range()
5342 if (!(hdr_metadata->metadata_type & BIT(HDMI_STATIC_METADATA_TYPE1))) in drm_calculate_luminance_range()
5345 max_avg = hdr_metadata->max_fall; in drm_calculate_luminance_range()
5346 min_cll = hdr_metadata->min_cll; in drm_calculate_luminance_range()
5349 * From the specification (CTA-861-G), for calculating the maximum in drm_calculate_luminance_range()
5352 * Where CV is a one-byte value. in drm_calculate_luminance_range()
5358 * need to pre-compute the value of r/32. For pre-computing the values in drm_calculate_luminance_range()
5372 luminance_range->min_luminance = min; in drm_calculate_luminance_range()
5373 luminance_range->max_luminance = max; in drm_calculate_luminance_range()
5398 connector->hdr_sink_metadata.hdmi_type1.eotf = in drm_parse_hdr_metadata_block()
5400 connector->hdr_sink_metadata.hdmi_type1.metadata_type = in drm_parse_hdr_metadata_block()
5404 connector->hdr_sink_metadata.hdmi_type1.max_cll = db[4]; in drm_parse_hdr_metadata_block()
5406 connector->hdr_sink_metadata.hdmi_type1.max_fall = db[5]; in drm_parse_hdr_metadata_block()
5408 connector->hdr_sink_metadata.hdmi_type1.min_cll = db[6]; in drm_parse_hdr_metadata_block()
5415 /* HDMI Vendor-Specific Data Block (HDMI VSDB, H14b-VSDB) */
5422 connector->eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_SUPPORTS_AI; in drm_parse_hdmi_vsdb_audio()
5425 connector->latency_present[0] = true; in drm_parse_hdmi_vsdb_audio()
5426 connector->video_latency[0] = db[9]; in drm_parse_hdmi_vsdb_audio()
5427 connector->audio_latency[0] = db[10]; in drm_parse_hdmi_vsdb_audio()
5431 connector->latency_present[1] = true; in drm_parse_hdmi_vsdb_audio()
5432 connector->video_latency[1] = db[11]; in drm_parse_hdmi_vsdb_audio()
5433 connector->audio_latency[1] = db[12]; in drm_parse_hdmi_vsdb_audio()
5436 drm_dbg_kms(connector->dev, in drm_parse_hdmi_vsdb_audio()
5438 connector->base.id, connector->name, in drm_parse_hdmi_vsdb_audio()
5439 connector->latency_present[0], connector->latency_present[1], in drm_parse_hdmi_vsdb_audio()
5440 connector->video_latency[0], connector->video_latency[1], in drm_parse_hdmi_vsdb_audio()
5441 connector->audio_latency[0], connector->audio_latency[1]); in drm_parse_hdmi_vsdb_audio()
5452 *res = timing->data.other_data.data.str.str; in monitor_name()
5475 * drm_edid_get_monitor_name - fetch the monitor name from the edid
5478 * @bufsize: The size of the name buffer (should be at least 14 chars.)
5495 name_length = min(get_monitor_name(&drm_edid, buf), bufsize - 1); in drm_edid_get_monitor_name()
5505 memset(connector->eld, 0, sizeof(connector->eld)); in clear_eld()
5507 connector->latency_present[0] = false; in clear_eld()
5508 connector->latency_present[1] = false; in clear_eld()
5509 connector->video_latency[0] = 0; in clear_eld()
5510 connector->audio_latency[0] = 0; in clear_eld()
5511 connector->video_latency[1] = 0; in clear_eld()
5512 connector->audio_latency[1] = 0; in clear_eld()
5516 * Get 3-byte SAD buffer from struct cea_sad.
5520 sad[0] = cta_sad->format << 3 | cta_sad->channels; in drm_edid_cta_sad_get()
5521 sad[1] = cta_sad->freq; in drm_edid_cta_sad_get()
5522 sad[2] = cta_sad->byte2; in drm_edid_cta_sad_get()
5526 * Set struct cea_sad from 3-byte SAD buffer.
5530 cta_sad->format = (sad[0] & 0x78) >> 3; in drm_edid_cta_sad_set()
5531 cta_sad->channels = sad[0] & 0x07; in drm_edid_cta_sad_set()
5532 cta_sad->freq = sad[1] & 0x7f; in drm_edid_cta_sad_set()
5533 cta_sad->byte2 = sad[2]; in drm_edid_cta_sad_set()
5537 * drm_edid_to_eld - build ELD from EDID
5541 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
5547 const struct drm_display_info *info = &connector->display_info; in drm_edid_to_eld()
5550 uint8_t *eld = connector->eld; in drm_edid_to_eld()
5558 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] ELD monitor %s\n", in drm_edid_to_eld()
5559 connector->base.id, connector->name, in drm_edid_to_eld()
5562 eld[DRM_ELD_CEA_EDID_VER_MNL] = info->cea_rev << DRM_ELD_CEA_EDID_VER_SHIFT; in drm_edid_to_eld()
5567 eld[DRM_ELD_MANUFACTURER_NAME0] = drm_edid->edid->mfg_id[0]; in drm_edid_to_eld()
5568 eld[DRM_ELD_MANUFACTURER_NAME1] = drm_edid->edid->mfg_id[1]; in drm_edid_to_eld()
5569 eld[DRM_ELD_PRODUCT_CODE0] = drm_edid->edid->prod_code[0]; in drm_edid_to_eld()
5570 eld[DRM_ELD_PRODUCT_CODE1] = drm_edid->edid->prod_code[1]; in drm_edid_to_eld()
5581 sad_count = min(len / 3, 15 - total_sad_count); in drm_edid_to_eld()
5593 /* HDMI Vendor-Specific Data Block */ in drm_edid_to_eld()
5605 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || in drm_edid_to_eld()
5606 connector->connector_type == DRM_MODE_CONNECTOR_eDP) in drm_edid_to_eld()
5614 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] ELD size %d, SAD count %d\n", in drm_edid_to_eld()
5615 connector->base.id, connector->name, in drm_edid_to_eld()
5636 return -ENOMEM; in _drm_edid_to_sad()
5638 drm_edid_cta_sad_set(&sads[i], &db->data[i * 3]); in _drm_edid_to_sad()
5650 * drm_edid_to_sad - extracts SADs from EDID
5679 *sadb = kmemdup(db->data, cea_db_payload_len(db), in _drm_edid_to_speaker_allocation()
5682 return -ENOMEM; in _drm_edid_to_speaker_allocation()
5695 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
5716 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
5718 * @mode: the display mode
5720 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
5726 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); in drm_av_sync_delay()
5729 if (!connector->latency_present[0]) in drm_av_sync_delay()
5731 if (!connector->latency_present[1]) in drm_av_sync_delay()
5734 a = connector->audio_latency[i]; in drm_av_sync_delay()
5735 v = connector->video_latency[i]; in drm_av_sync_delay()
5748 a = min(2 * (a - 1), 500); in drm_av_sync_delay()
5750 v = min(2 * (v - 1), 500); in drm_av_sync_delay()
5752 return max(v - a, 0); in drm_av_sync_delay()
5779 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
5782 * Parse the CEA extension according to CEA-861-B.
5840 * drm_detect_monitor_audio - check monitor audio capability
5861 * drm_default_rgb_quant_range - default RGB quantization range
5862 * @mode: display mode
5865 * as specified in CEA-861.
5879 /* CTA-861 Video Data Block (CTA VDB) */
5882 struct drm_display_info *info = &connector->display_info; in parse_cta_vdb()
5891 vics = krealloc(info->vics, info->vics_len + len, GFP_KERNEL); in parse_cta_vdb()
5895 vic_index = info->vics_len; in parse_cta_vdb()
5896 info->vics_len += len; in parse_cta_vdb()
5897 info->vics = vics; in parse_cta_vdb()
5905 info->vics[vic_index++] = vic; in parse_cta_vdb()
5917 struct drm_display_info *info = &connector->display_info; in update_cta_y420cmdb()
5918 struct drm_hdmi_info *hdmi = &info->hdmi; in update_cta_y420cmdb()
5919 int i, len = min_t(int, info->vics_len, BITS_PER_TYPE(y420cmdb_map)); in update_cta_y420cmdb()
5922 u8 vic = info->vics[i]; in update_cta_y420cmdb()
5925 bitmap_set(hdmi->y420_cmdb_modes, vic, 1); in update_cta_y420cmdb()
5931 const struct drm_display_info *info = &connector->display_info; in cta_vdb_has_vic()
5934 if (!vic || !info->vics) in cta_vdb_has_vic()
5937 for (i = 0; i < info->vics_len; i++) { in cta_vdb_has_vic()
5938 if (info->vics[i] == vic) in cta_vdb_has_vic()
5945 /* CTA-861-H YCbCr 4:2:0 Video Data Block (CTA Y420VDB) */
5949 struct drm_display_info *info = &connector->display_info; in parse_cta_y420vdb()
5950 struct drm_hdmi_info *hdmi = &info->hdmi; in parse_cta_y420vdb()
5954 for (i = 0; i < cea_db_payload_len(db) - 1; i++) { in parse_cta_y420vdb()
5960 bitmap_set(hdmi->y420_vdb_modes, vic, 1); in parse_cta_y420vdb()
5961 info->color_formats |= DRM_COLOR_FORMAT_YCBCR420; in parse_cta_y420vdb()
5967 struct drm_display_info *info = &connector->display_info; in drm_parse_vcdb()
5969 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] CEA VCDB 0x%02x\n", in drm_parse_vcdb()
5970 connector->base.id, connector->name, db[2]); in drm_parse_vcdb()
5973 info->rgb_quant_range_selectable = true; in drm_parse_vcdb()
6015 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_parse_ycbcr420_deep_color_info()
6018 hdmi->y420_dc_modes = dc_mask; in drm_parse_ycbcr420_deep_color_info()
6024 hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2; in drm_parse_dsc_info()
6026 if (!hdmi_dsc->v_1p2) in drm_parse_dsc_info()
6029 hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420; in drm_parse_dsc_info()
6030 hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP; in drm_parse_dsc_info()
6033 hdmi_dsc->bpc_supported = 16; in drm_parse_dsc_info()
6035 hdmi_dsc->bpc_supported = 12; in drm_parse_dsc_info()
6037 hdmi_dsc->bpc_supported = 10; in drm_parse_dsc_info()
6040 hdmi_dsc->bpc_supported = 8; in drm_parse_dsc_info()
6047 drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, in drm_parse_dsc_info()
6048 &hdmi_dsc->max_frl_rate_per_lane); in drm_parse_dsc_info()
6054 hdmi_dsc->max_slices = 1; in drm_parse_dsc_info()
6055 hdmi_dsc->clk_per_slice = 340; in drm_parse_dsc_info()
6058 hdmi_dsc->max_slices = 2; in drm_parse_dsc_info()
6059 hdmi_dsc->clk_per_slice = 340; in drm_parse_dsc_info()
6062 hdmi_dsc->max_slices = 4; in drm_parse_dsc_info()
6063 hdmi_dsc->clk_per_slice = 340; in drm_parse_dsc_info()
6066 hdmi_dsc->max_slices = 8; in drm_parse_dsc_info()
6067 hdmi_dsc->clk_per_slice = 340; in drm_parse_dsc_info()
6070 hdmi_dsc->max_slices = 8; in drm_parse_dsc_info()
6071 hdmi_dsc->clk_per_slice = 400; in drm_parse_dsc_info()
6074 hdmi_dsc->max_slices = 12; in drm_parse_dsc_info()
6075 hdmi_dsc->clk_per_slice = 400; in drm_parse_dsc_info()
6078 hdmi_dsc->max_slices = 16; in drm_parse_dsc_info()
6079 hdmi_dsc->clk_per_slice = 400; in drm_parse_dsc_info()
6083 hdmi_dsc->max_slices = 0; in drm_parse_dsc_info()
6084 hdmi_dsc->clk_per_slice = 0; in drm_parse_dsc_info()
6089 hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES; in drm_parse_dsc_info()
6096 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_forum_scds()
6097 struct drm_hdmi_info *hdmi = &info->hdmi; in drm_parse_hdmi_forum_scds()
6098 struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap; in drm_parse_hdmi_forum_scds()
6103 info->has_hdmi_infoframe = true; in drm_parse_hdmi_forum_scds()
6106 hdmi->scdc.supported = true; in drm_parse_hdmi_forum_scds()
6108 hdmi->scdc.read_request = true; in drm_parse_hdmi_forum_scds()
6114 * * Availability of a HF-VSDB block in EDID (check) in drm_parse_hdmi_forum_scds()
6115 * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check) in drm_parse_hdmi_forum_scds()
6121 struct drm_scdc *scdc = &hdmi->scdc; in drm_parse_hdmi_forum_scds()
6127 info->max_tmds_clock = max_tmds_clock; in drm_parse_hdmi_forum_scds()
6130 if (scdc->supported) { in drm_parse_hdmi_forum_scds()
6131 scdc->scrambling.supported = true; in drm_parse_hdmi_forum_scds()
6135 scdc->scrambling.low_rates = true; in drm_parse_hdmi_forum_scds()
6141 drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, in drm_parse_hdmi_forum_scds()
6142 &hdmi->max_frl_rate_per_lane); in drm_parse_hdmi_forum_scds()
6152 drm_dbg_kms(connector->dev, in drm_parse_hdmi_forum_scds()
6153 … "[CONNECTOR:%d:%s] HF-VSDB: max TMDS clock: %d KHz, HDMI 2.1 support: %s, DSC 1.2 support: %s\n", in drm_parse_hdmi_forum_scds()
6154 connector->base.id, connector->name, in drm_parse_hdmi_forum_scds()
6161 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_deep_color_info()
6165 info->bpc = 8; in drm_parse_hdmi_deep_color_info()
6172 info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_30; in drm_parse_hdmi_deep_color_info()
6173 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI sink does deep color 30.\n", in drm_parse_hdmi_deep_color_info()
6174 connector->base.id, connector->name); in drm_parse_hdmi_deep_color_info()
6179 info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_36; in drm_parse_hdmi_deep_color_info()
6180 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI sink does deep color 36.\n", in drm_parse_hdmi_deep_color_info()
6181 connector->base.id, connector->name); in drm_parse_hdmi_deep_color_info()
6186 info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_48; in drm_parse_hdmi_deep_color_info()
6187 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI sink does deep color 48.\n", in drm_parse_hdmi_deep_color_info()
6188 connector->base.id, connector->name); in drm_parse_hdmi_deep_color_info()
6192 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] No deep color support on this HDMI sink.\n", in drm_parse_hdmi_deep_color_info()
6193 connector->base.id, connector->name); in drm_parse_hdmi_deep_color_info()
6197 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Assigning HDMI sink color depth as %d bpc.\n", in drm_parse_hdmi_deep_color_info()
6198 connector->base.id, connector->name, dc_bpc); in drm_parse_hdmi_deep_color_info()
6199 info->bpc = dc_bpc; in drm_parse_hdmi_deep_color_info()
6203 info->edid_hdmi_ycbcr444_dc_modes = info->edid_hdmi_rgb444_dc_modes; in drm_parse_hdmi_deep_color_info()
6204 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI sink does YCRCB444 in deep color.\n", in drm_parse_hdmi_deep_color_info()
6205 connector->base.id, connector->name); in drm_parse_hdmi_deep_color_info()
6213 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI sink should do DC_36, but does not!\n", in drm_parse_hdmi_deep_color_info()
6214 connector->base.id, connector->name); in drm_parse_hdmi_deep_color_info()
6218 /* HDMI Vendor-Specific Data Block (HDMI VSDB, H14b-VSDB) */
6222 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_vsdb_video()
6225 info->is_hdmi = true; in drm_parse_hdmi_vsdb_video()
6227 info->source_physical_address = (db[4] << 8) | db[5]; in drm_parse_hdmi_vsdb_video()
6230 info->dvi_dual = db[6] & 1; in drm_parse_hdmi_vsdb_video()
6232 info->max_tmds_clock = db[7] * 5000; in drm_parse_hdmi_vsdb_video()
6241 info->has_hdmi_infoframe = true; in drm_parse_hdmi_vsdb_video()
6243 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] HDMI: DVI dual %d, max TMDS clock %d kHz\n", in drm_parse_hdmi_vsdb_video()
6244 connector->base.id, connector->name, in drm_parse_hdmi_vsdb_video()
6245 info->dvi_dual, info->max_tmds_clock); in drm_parse_hdmi_vsdb_video()
6251 * See EDID extension for head-mounted and specialized monitors, specified at:
6252 …* https://docs.microsoft.com/en-us/windows-hardware/drivers/display/specialized-monitors-edid-exte…
6257 struct drm_display_info *info = &connector->display_info; in drm_parse_microsoft_vsdb()
6263 info->non_desktop = true; in drm_parse_microsoft_vsdb()
6265 drm_dbg_kms(connector->dev, in drm_parse_microsoft_vsdb()
6266 "[CONNECTOR:%d:%s] HMD or specialized display VSDB version %u: 0x%02x\n", in drm_parse_microsoft_vsdb()
6267 connector->base.id, connector->name, version, db[5]); in drm_parse_microsoft_vsdb()
6273 struct drm_display_info *info = &connector->display_info; in drm_parse_cea_ext()
6285 if (!info->cea_rev) in drm_parse_cea_ext()
6286 info->cea_rev = edid_ext[1]; in drm_parse_cea_ext()
6288 if (info->cea_rev != edid_ext[1]) in drm_parse_cea_ext()
6289 drm_dbg_kms(connector->dev, in drm_parse_cea_ext()
6291 connector->base.id, connector->name, in drm_parse_cea_ext()
6292 info->cea_rev, edid_ext[1]); in drm_parse_cea_ext()
6295 info->color_formats = DRM_COLOR_FORMAT_RGB444; in drm_parse_cea_ext()
6297 info->color_formats |= DRM_COLOR_FORMAT_YCBCR444; in drm_parse_cea_ext()
6299 info->color_formats |= DRM_COLOR_FORMAT_YCBCR422; in drm_parse_cea_ext()
6301 info->has_audio = true; in drm_parse_cea_ext()
6329 info->has_audio = true; in drm_parse_cea_ext()
6341 struct drm_display_info *info = &closure->connector->display_info; in get_monitor_range()
6342 struct drm_monitor_range_info *monitor_range = &info->monitor_range; in get_monitor_range()
6343 const struct detailed_non_pixel *data = &timing->data.other_data; in get_monitor_range()
6344 const struct detailed_data_monitor_range *range = &data->data.range; in get_monitor_range()
6345 const struct edid *edid = closure->drm_edid->edid; in get_monitor_range()
6359 if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) in get_monitor_range()
6362 monitor_range->min_vfreq = range->min_vfreq; in get_monitor_range()
6363 monitor_range->max_vfreq = range->max_vfreq; in get_monitor_range()
6365 if (edid->revision >= 4) { in get_monitor_range()
6366 if (data->pad2 & DRM_EDID_RANGE_OFFSET_MIN_VFREQ) in get_monitor_range()
6367 monitor_range->min_vfreq += 255; in get_monitor_range()
6368 if (data->pad2 & DRM_EDID_RANGE_OFFSET_MAX_VFREQ) in get_monitor_range()
6369 monitor_range->max_vfreq += 255; in get_monitor_range()
6376 const struct drm_display_info *info = &connector->display_info; in drm_get_monitor_range()
6382 if (drm_edid->edid->revision < 4) in drm_get_monitor_range()
6385 if (!(drm_edid->edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ)) in drm_get_monitor_range()
6390 drm_dbg_kms(connector->dev, in drm_get_monitor_range()
6391 "[CONNECTOR:%d:%s] Supported Monitor Refresh rate range is %d Hz - %d Hz\n", in drm_get_monitor_range()
6392 connector->base.id, connector->name, in drm_get_monitor_range()
6393 info->monitor_range.min_vfreq, info->monitor_range.max_vfreq); in drm_get_monitor_range()
6401 struct drm_display_info *info = &connector->display_info; in drm_parse_vesa_mso_data()
6403 if (block->num_bytes < 3) { in drm_parse_vesa_mso_data()
6404 drm_dbg_kms(connector->dev, in drm_parse_vesa_mso_data()
6406 connector->base.id, connector->name, block->num_bytes); in drm_parse_vesa_mso_data()
6410 if (oui(vesa->oui[0], vesa->oui[1], vesa->oui[2]) != VESA_IEEE_OUI) in drm_parse_vesa_mso_data()
6413 if (sizeof(*vesa) != sizeof(*block) + block->num_bytes) { in drm_parse_vesa_mso_data()
6414 drm_dbg_kms(connector->dev, in drm_parse_vesa_mso_data()
6416 connector->base.id, connector->name); in drm_parse_vesa_mso_data()
6420 switch (FIELD_GET(DISPLAYID_VESA_MSO_MODE, vesa->mso)) { in drm_parse_vesa_mso_data()
6422 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Reserved MSO mode value\n", in drm_parse_vesa_mso_data()
6423 connector->base.id, connector->name); in drm_parse_vesa_mso_data()
6426 info->mso_stream_count = 0; in drm_parse_vesa_mso_data()
6429 info->mso_stream_count = 2; /* 2 or 4 links */ in drm_parse_vesa_mso_data()
6432 info->mso_stream_count = 4; /* 4 links */ in drm_parse_vesa_mso_data()
6436 if (!info->mso_stream_count) { in drm_parse_vesa_mso_data()
6437 info->mso_pixel_overlap = 0; in drm_parse_vesa_mso_data()
6441 info->mso_pixel_overlap = FIELD_GET(DISPLAYID_VESA_MSO_OVERLAP, vesa->mso); in drm_parse_vesa_mso_data()
6442 if (info->mso_pixel_overlap > 8) { in drm_parse_vesa_mso_data()
6443 drm_dbg_kms(connector->dev, in drm_parse_vesa_mso_data()
6445 connector->base.id, connector->name, in drm_parse_vesa_mso_data()
6446 info->mso_pixel_overlap); in drm_parse_vesa_mso_data()
6447 info->mso_pixel_overlap = 8; in drm_parse_vesa_mso_data()
6450 drm_dbg_kms(connector->dev, in drm_parse_vesa_mso_data()
6452 connector->base.id, connector->name, in drm_parse_vesa_mso_data()
6453 info->mso_stream_count, info->mso_pixel_overlap); in drm_parse_vesa_mso_data()
6464 if (block->tag == DATA_BLOCK_2_VENDOR_SPECIFIC) in drm_update_mso()
6475 struct drm_display_info *info = &connector->display_info; in drm_reset_display_info()
6477 info->width_mm = 0; in drm_reset_display_info()
6478 info->height_mm = 0; in drm_reset_display_info()
6480 info->bpc = 0; in drm_reset_display_info()
6481 info->color_formats = 0; in drm_reset_display_info()
6482 info->cea_rev = 0; in drm_reset_display_info()
6483 info->max_tmds_clock = 0; in drm_reset_display_info()
6484 info->dvi_dual = false; in drm_reset_display_info()
6485 info->is_hdmi = false; in drm_reset_display_info()
6486 info->has_audio = false; in drm_reset_display_info()
6487 info->has_hdmi_infoframe = false; in drm_reset_display_info()
6488 info->rgb_quant_range_selectable = false; in drm_reset_display_info()
6489 memset(&info->hdmi, 0, sizeof(info->hdmi)); in drm_reset_display_info()
6491 info->edid_hdmi_rgb444_dc_modes = 0; in drm_reset_display_info()
6492 info->edid_hdmi_ycbcr444_dc_modes = 0; in drm_reset_display_info()
6494 info->non_desktop = 0; in drm_reset_display_info()
6495 memset(&info->monitor_range, 0, sizeof(info->monitor_range)); in drm_reset_display_info()
6496 memset(&info->luminance_range, 0, sizeof(info->luminance_range)); in drm_reset_display_info()
6498 info->mso_stream_count = 0; in drm_reset_display_info()
6499 info->mso_pixel_overlap = 0; in drm_reset_display_info()
6500 info->max_dsc_bpp = 0; in drm_reset_display_info()
6502 kfree(info->vics); in drm_reset_display_info()
6503 info->vics = NULL; in drm_reset_display_info()
6504 info->vics_len = 0; in drm_reset_display_info()
6506 info->quirks = 0; in drm_reset_display_info()
6508 info->source_physical_address = CEC_PHYS_ADDR_INVALID; in drm_reset_display_info()
6514 struct drm_display_info *info = &connector->display_info; in update_displayid_info()
6523 info->non_desktop = true; in update_displayid_info()
6537 struct drm_display_info *info = &connector->display_info; in update_display_info()
6546 edid = drm_edid->edid; in update_display_info()
6548 info->quirks = edid_get_quirks(drm_edid); in update_display_info()
6550 info->width_mm = edid->width_cm * 10; in update_display_info()
6551 info->height_mm = edid->height_cm * 10; in update_display_info()
6555 if (edid->revision < 3) in update_display_info()
6561 info->color_formats |= DRM_COLOR_FORMAT_RGB444; in update_display_info()
6573 if (info->bpc == 0 && edid->revision == 3 && in update_display_info()
6574 edid->input & DRM_EDID_DIGITAL_DFP_1_X) { in update_display_info()
6575 info->bpc = 8; in update_display_info()
6576 drm_dbg_kms(connector->dev, in update_display_info()
6578 connector->base.id, connector->name, info->bpc); in update_display_info()
6582 if (edid->revision < 4) in update_display_info()
6585 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { in update_display_info()
6587 info->bpc = 6; in update_display_info()
6590 info->bpc = 8; in update_display_info()
6593 info->bpc = 10; in update_display_info()
6596 info->bpc = 12; in update_display_info()
6599 info->bpc = 14; in update_display_info()
6602 info->bpc = 16; in update_display_info()
6606 info->bpc = 0; in update_display_info()
6610 drm_dbg_kms(connector->dev, in update_display_info()
6611 "[CONNECTOR:%d:%s] Assigning EDID-1.4 digital sink color depth as %d bpc.\n", in update_display_info()
6612 connector->base.id, connector->name, info->bpc); in update_display_info()
6614 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) in update_display_info()
6615 info->color_formats |= DRM_COLOR_FORMAT_YCBCR444; in update_display_info()
6616 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) in update_display_info()
6617 info->color_formats |= DRM_COLOR_FORMAT_YCBCR422; in update_display_info()
6622 if (info->quirks & EDID_QUIRK_NON_DESKTOP) { in update_display_info()
6623 drm_dbg_kms(connector->dev, "[CONNECTOR:%d:%s] Non-desktop display%s\n", in update_display_info()
6624 connector->base.id, connector->name, in update_display_info()
6625 info->non_desktop ? " (redundant quirk)" : ""); in update_display_info()
6626 info->non_desktop = true; in update_display_info()
6629 if (info->quirks & EDID_QUIRK_CAP_DSC_15BPP) in update_display_info()
6630 info->max_dsc_bpp = 15; in update_display_info()
6632 if (info->quirks & EDID_QUIRK_FORCE_6BPC) in update_display_info()
6633 info->bpc = 6; in update_display_info()
6635 if (info->quirks & EDID_QUIRK_FORCE_8BPC) in update_display_info()
6636 info->bpc = 8; in update_display_info()
6638 if (info->quirks & EDID_QUIRK_FORCE_10BPC) in update_display_info()
6639 info->bpc = 10; in update_display_info()
6641 if (info->quirks & EDID_QUIRK_FORCE_12BPC) in update_display_info()
6642 info->bpc = 12; in update_display_info()
6644 /* Depends on info->cea_rev set by drm_parse_cea_ext() above */ in update_display_info()
6653 unsigned pixel_clock = (timings->pixel_clock[0] | in drm_mode_displayid_detailed()
6654 (timings->pixel_clock[1] << 8) | in drm_mode_displayid_detailed()
6655 (timings->pixel_clock[2] << 16)) + 1; in drm_mode_displayid_detailed()
6656 unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1; in drm_mode_displayid_detailed()
6657 unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1; in drm_mode_displayid_detailed()
6658 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed()
6659 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1; in drm_mode_displayid_detailed()
6660 unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1; in drm_mode_displayid_detailed()
6661 unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1; in drm_mode_displayid_detailed()
6662 unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed()
6663 unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1; in drm_mode_displayid_detailed()
6664 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
6665 bool vsync_positive = (timings->vsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
6672 mode->clock = type_7 ? pixel_clock : pixel_clock * 10; in drm_mode_displayid_detailed()
6673 mode->hdisplay = hactive; in drm_mode_displayid_detailed()
6674 mode->hsync_start = mode->hdisplay + hsync; in drm_mode_displayid_detailed()
6675 mode->hsync_end = mode->hsync_start + hsync_width; in drm_mode_displayid_detailed()
6676 mode->htotal = mode->hdisplay + hblank; in drm_mode_displayid_detailed()
6678 mode->vdisplay = vactive; in drm_mode_displayid_detailed()
6679 mode->vsync_start = mode->vdisplay + vsync; in drm_mode_displayid_detailed()
6680 mode->vsync_end = mode->vsync_start + vsync_width; in drm_mode_displayid_detailed()
6681 mode->vtotal = mode->vdisplay + vblank; in drm_mode_displayid_detailed()
6683 mode->flags = 0; in drm_mode_displayid_detailed()
6684 mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; in drm_mode_displayid_detailed()
6685 mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; in drm_mode_displayid_detailed()
6686 mode->type = DRM_MODE_TYPE_DRIVER; in drm_mode_displayid_detailed()
6688 if (timings->flags & 0x80) in drm_mode_displayid_detailed()
6689 mode->type |= DRM_MODE_TYPE_PREFERRED; in drm_mode_displayid_detailed()
6703 bool type_7 = block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING; in add_displayid_detailed_1_modes()
6705 if (block->num_bytes % 20) in add_displayid_detailed_1_modes()
6708 num_timings = block->num_bytes / 20; in add_displayid_detailed_1_modes()
6710 struct displayid_detailed_timings_1 *timings = &det->timings[i]; in add_displayid_detailed_1_modes()
6712 newmode = drm_mode_displayid_detailed(connector->dev, timings, type_7); in add_displayid_detailed_1_modes()
6731 if (block->tag == DATA_BLOCK_TYPE_1_DETAILED_TIMING || in add_displayid_detailed_modes()
6732 block->tag == DATA_BLOCK_2_TYPE_7_DETAILED_TIMING) in add_displayid_detailed_modes()
6743 const struct drm_display_info *info = &connector->display_info; in _drm_edid_connector_add_modes()
6751 * - preferred detailed mode in _drm_edid_connector_add_modes()
6752 * - other detailed modes from base block in _drm_edid_connector_add_modes()
6753 * - detailed modes from extension blocks in _drm_edid_connector_add_modes()
6754 * - CVT 3-byte code modes in _drm_edid_connector_add_modes()
6755 * - standard timing codes in _drm_edid_connector_add_modes()
6756 * - established timing codes in _drm_edid_connector_add_modes()
6757 * - modes inferred from GTF or CVT range information in _drm_edid_connector_add_modes()
6770 if (drm_edid->edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) in _drm_edid_connector_add_modes()
6773 if (info->quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) in _drm_edid_connector_add_modes()
6785 struct drm_device *dev = connector->dev; in _drm_edid_connector_property_update()
6788 if (connector->edid_blob_ptr) { in _drm_edid_connector_property_update()
6789 const struct edid *old_edid = connector->edid_blob_ptr->data; in _drm_edid_connector_property_update()
6792 if (!drm_edid_are_equal(drm_edid ? drm_edid->edid : NULL, old_edid)) { in _drm_edid_connector_property_update()
6793 connector->epoch_counter++; in _drm_edid_connector_property_update()
6795 connector->base.id, connector->name, in _drm_edid_connector_property_update()
6796 connector->epoch_counter); in _drm_edid_connector_property_update()
6802 &connector->edid_blob_ptr, in _drm_edid_connector_property_update()
6803 drm_edid ? drm_edid->size : 0, in _drm_edid_connector_property_update()
6804 drm_edid ? drm_edid->edid : NULL, in _drm_edid_connector_property_update()
6805 &connector->base, in _drm_edid_connector_property_update()
6806 dev->mode_config.edid_property); in _drm_edid_connector_property_update()
6809 connector->base.id, connector->name, ret); in _drm_edid_connector_property_update()
6813 ret = drm_object_property_set_value(&connector->base, in _drm_edid_connector_property_update()
6814 dev->mode_config.non_desktop_property, in _drm_edid_connector_property_update()
6815 connector->display_info.non_desktop); in _drm_edid_connector_property_update()
6817 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Non-desktop property update failed (%d)\n", in _drm_edid_connector_property_update()
6818 connector->base.id, connector->name, ret); in _drm_edid_connector_property_update()
6825 connector->base.id, connector->name, ret); in _drm_edid_connector_property_update()
6834 * drm_edid_connector_update - Update connector information from EDID
6838 * Update the connector display info, ELD, HDR metadata, relevant properties,
6859 * drm_edid_connector_add_modes - Update probed modes from the EDID property
6875 if (connector->edid_blob_ptr) in drm_edid_connector_add_modes()
6876 drm_edid = drm_edid_alloc(connector->edid_blob_ptr->data, in drm_edid_connector_add_modes()
6877 connector->edid_blob_ptr->length); in drm_edid_connector_add_modes()
6888 * drm_connector_update_edid_property - update the edid property of a connector
6913 * drm_add_edid_modes - add modes from EDID data, if available
6931 drm_warn(connector->dev, "[CONNECTOR:%d:%s] EDID invalid.\n", in drm_add_edid_modes()
6932 connector->base.id, connector->name); in drm_add_edid_modes()
6945 * drm_add_modes_noedid - add modes for the connectors without EDID
6947 * @hdisplay: the horizontal display limit
6948 * @vdisplay: the vertical display limit
6960 struct drm_device *dev = connector->dev; in drm_add_modes_noedid()
6977 if (ptr->hdisplay > hdisplay || in drm_add_modes_noedid()
6978 ptr->vdisplay > vdisplay) in drm_add_modes_noedid()
6994 * drm_set_preferred_mode - Sets the preferred mode of a connector
7007 list_for_each_entry(mode, &connector->probed_modes, head) { in drm_set_preferred_mode()
7008 if (mode->hdisplay == hpref && in drm_set_preferred_mode()
7009 mode->vdisplay == vpref) in drm_set_preferred_mode()
7010 mode->type |= DRM_MODE_TYPE_PREFERRED; in drm_set_preferred_mode()
7018 * FIXME: sil-sii8620 doesn't have a connector around when in is_hdmi2_sink()
7024 return connector->display_info.hdmi.scdc.supported || in is_hdmi2_sink()
7025 connector->display_info.color_formats & DRM_COLOR_FORMAT_YCBCR420; in is_hdmi2_sink()
7032 connector->display_info.has_hdmi_infoframe : false; in drm_mode_hdmi_vic()
7038 if (mode->flags & DRM_MODE_FLAG_3D_MASK) in drm_mode_hdmi_vic()
7063 * HDMI 1.4 (CTA-861-D) VIC range: [1..64]
7064 * HDMI 2.0 (CTA-861-F) VIC range: [1..107]
7079 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
7080 * data from a DRM display mode
7083 * @mode: DRM display mode
7096 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
7100 if (mode->flags & DRM_MODE_FLAG_DBLCLK) in drm_hdmi_avi_infoframe_from_display_mode()
7101 frame->pixel_repeat = 1; in drm_hdmi_avi_infoframe_from_display_mode()
7106 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; in drm_hdmi_avi_infoframe_from_display_mode()
7113 frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS; in drm_hdmi_avi_infoframe_from_display_mode()
7114 frame->itc = 0; in drm_hdmi_avi_infoframe_from_display_mode()
7120 picture_aspect = mode->picture_aspect_ratio; in drm_hdmi_avi_infoframe_from_display_mode()
7136 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
7139 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
7141 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
7147 frame->video_code = vic_for_avi_infoframe(connector, vic); in drm_hdmi_avi_infoframe_from_display_mode()
7148 frame->picture_aspect = picture_aspect; in drm_hdmi_avi_infoframe_from_display_mode()
7149 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; in drm_hdmi_avi_infoframe_from_display_mode()
7150 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN; in drm_hdmi_avi_infoframe_from_display_mode()
7157 * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
7161 * @mode: DRM display mode
7170 const struct drm_display_info *info = &connector->display_info; in drm_hdmi_avi_infoframe_quant_range()
7173 * CEA-861: in drm_hdmi_avi_infoframe_quant_range()
7174 * "A Source shall not send a non-zero Q value that does not correspond in drm_hdmi_avi_infoframe_quant_range()
7179 * HDMI 2.0 recommends sending non-zero Q when it does match the in drm_hdmi_avi_infoframe_quant_range()
7182 if (info->rgb_quant_range_selectable || in drm_hdmi_avi_infoframe_quant_range()
7184 frame->quantization_range = rgb_quant_range; in drm_hdmi_avi_infoframe_quant_range()
7186 frame->quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; in drm_hdmi_avi_infoframe_quant_range()
7189 * CEA-861-F: in drm_hdmi_avi_infoframe_quant_range()
7191 * YQ-field to match the RGB Quantization Range being transmitted in drm_hdmi_avi_infoframe_quant_range()
7193 * set YQ=1) and the Sink shall ignore the YQ-field." in drm_hdmi_avi_infoframe_quant_range()
7196 * by non-zero YQ when receiving RGB. There doesn't seem to be any in drm_hdmi_avi_infoframe_quant_range()
7197 * good way to tell which version of CEA-861 the sink supports, so in drm_hdmi_avi_infoframe_quant_range()
7198 * we limit non-zero YQ to HDMI 2.0 sinks only as HDMI 2.0 is based in drm_hdmi_avi_infoframe_quant_range()
7199 * on CEA-861-F. in drm_hdmi_avi_infoframe_quant_range()
7203 frame->ycc_quantization_range = in drm_hdmi_avi_infoframe_quant_range()
7206 frame->ycc_quantization_range = in drm_hdmi_avi_infoframe_quant_range()
7214 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; in s3d_structure_from_display_mode()
7239 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
7240 * data from a DRM display mode
7243 * @mode: DRM display mode
7247 * function will return -EINVAL, error that can be safely ignored.
7257 * FIXME: sil-sii8620 doesn't have a connector around when in drm_hdmi_vendor_infoframe_from_display_mode()
7261 connector->display_info.has_hdmi_infoframe : false; in drm_hdmi_vendor_infoframe_from_display_mode()
7265 return -EINVAL; in drm_hdmi_vendor_infoframe_from_display_mode()
7268 return -EINVAL; in drm_hdmi_vendor_infoframe_from_display_mode()
7283 frame->vic = drm_mode_hdmi_vic(connector, mode); in drm_hdmi_vendor_infoframe_from_display_mode()
7284 frame->s3d_struct = s3d_structure_from_display_mode(mode); in drm_hdmi_vendor_infoframe_from_display_mode()
7299 w = tile->tile_size[0] | tile->tile_size[1] << 8; in drm_parse_tiled_block()
7300 h = tile->tile_size[2] | tile->tile_size[3] << 8; in drm_parse_tiled_block()
7302 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30); in drm_parse_tiled_block()
7303 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30); in drm_parse_tiled_block()
7304 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4); in drm_parse_tiled_block()
7305 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4); in drm_parse_tiled_block()
7307 connector->has_tile = true; in drm_parse_tiled_block()
7308 if (tile->tile_cap & 0x80) in drm_parse_tiled_block()
7309 connector->tile_is_single_monitor = true; in drm_parse_tiled_block()
7311 connector->num_h_tile = num_h_tile + 1; in drm_parse_tiled_block()
7312 connector->num_v_tile = num_v_tile + 1; in drm_parse_tiled_block()
7313 connector->tile_h_loc = tile_h_loc; in drm_parse_tiled_block()
7314 connector->tile_v_loc = tile_v_loc; in drm_parse_tiled_block()
7315 connector->tile_h_size = w + 1; in drm_parse_tiled_block()
7316 connector->tile_v_size = h + 1; in drm_parse_tiled_block()
7318 drm_dbg_kms(connector->dev, in drm_parse_tiled_block()
7320 connector->base.id, connector->name, in drm_parse_tiled_block()
7321 tile->tile_cap, in drm_parse_tiled_block()
7322 connector->tile_h_size, connector->tile_v_size, in drm_parse_tiled_block()
7323 connector->num_h_tile, connector->num_v_tile, in drm_parse_tiled_block()
7324 connector->tile_h_loc, connector->tile_v_loc, in drm_parse_tiled_block()
7325 tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]); in drm_parse_tiled_block()
7327 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id); in drm_parse_tiled_block()
7329 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id); in drm_parse_tiled_block()
7333 if (connector->tile_group != tg) { in drm_parse_tiled_block()
7336 if (connector->tile_group) in drm_parse_tiled_block()
7337 drm_mode_put_tile_group(connector->dev, connector->tile_group); in drm_parse_tiled_block()
7338 connector->tile_group = tg; in drm_parse_tiled_block()
7341 drm_mode_put_tile_group(connector->dev, tg); in drm_parse_tiled_block()
7349 block->tag == DATA_BLOCK_TILED_DISPLAY) || in displayid_is_tiled_block()
7351 block->tag == DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY); in displayid_is_tiled_block()
7360 connector->has_tile = false; in _drm_update_tile_info()
7369 if (!connector->has_tile && connector->tile_group) { in _drm_update_tile_info()
7370 drm_mode_put_tile_group(connector->dev, connector->tile_group); in _drm_update_tile_info()
7371 connector->tile_group = NULL; in _drm_update_tile_info()
7376 * drm_edid_is_digital - is digital?
7383 return drm_edid && drm_edid->edid && in drm_edid_is_digital()
7384 drm_edid->edid->input & DRM_EDID_INPUT_DIGITAL; in drm_edid_is_digital()