Lines Matching full:7
35 #define BIT_SYS_CTRL1_OTPVMUTEOVR_SET BIT(7)
46 #define BIT_DPD_PWRON_PLL BIT(7)
56 #define BIT_DCTL_TDM_LCLK_PHASE BIT(7)
67 #define BIT_PWD_SRST_COC_DOC_RST BIT(7)
88 #define BIT_VID_OVRRD_PP_AUTO_DISABLE BIT(7)
103 #define LEN_FAST_INTR_STAT 7
133 #define BIT_INT_CTRL_SOFTWARE_WP BIT(7)
169 #define BIT_HPD_CTRL_HPD_DS_SIGNAL BIT(7)
180 #define BIT_CTRL_GPIO_I_5 BIT(7)
189 /* Interrupt Source 7, default value: 0x00 */
195 /* Interrupt #7 Mask, default value: 0x00 */
214 #define BIT_RXBIST_VGB_EN BIT(7)
245 #define BIT_LM_DDC_SW_TPI_EN_DISABLED BIT(7)
254 #define BIT_DDC_MANUAL_MAN_DDC BIT(7)
306 #define BIT_DDC_DOUT_CNT_DDC_DELAY_CNT_8 BIT(7)
314 #define BIT_TEST_TXCTRL_RCLK_REF_SEL BIT(7)
366 #define BIT_TTXINTL_TTX_INTR7 BIT(7)
377 #define BIT_TTXINTH_TTX_INTR15 BIT(7)
488 #define BIT_BGR_BIAS_BGR_EN BIT(7)
496 #define BIT_ALICE0_ZONE_CTRL_ICRST_N BIT(7)
513 #define BIT_PKT_FILTER_0_DROP_CEA_GAMUT_PKT BIT(7)
524 #define BIT_PKT_FILTER_1_VSI_OVERRIDE_DIS BIT(7)
533 #define BIT_TMDS_CSTAT_P3_RX_HDMI_CP_CLR_MUTE BIT(7)
591 #define BIT_TPI_CBUS_START_RCP_REQ_START BIT(7)
602 #define BIT_EDID_CTRL_EDID_PRIME_VALID BIT(7)
650 #define BIT_GENCTL_SPEC_TRANS_DIS BIT(7)
661 #define BIT_COMMECNT_I2C_TO_EMSC_EN BIT(7)
673 #define BIT_SPIBURSTSTAT_SPI_HDCPRST BIT(7)
680 #define BIT_EMSCINTR_EMSC_XFIFO_EMPTY BIT(7)
708 #define BIT_MHL_TOP_CTL_MHL3_DOC_SEL BIT(7)
714 #define BIT_MHL_DP_CTL0_DP_OE BIT(7)
725 #define BIT_MHL_DP_CTL2_CLK_BYPASS_EN BIT(7)
742 #define BIT_MHL_DP_CTL5_RSEN_EN_OVR BIT(7)
750 #define BIT_MHL_PLL_CTL0_AUD_CLK_EN BIT(7)
773 #define BIT_MHL_PLL_CTL2_CLKDETECT_EN BIT(7)
780 #define BIT_MHL_CBUS_CTL0_CBUS_RGND_TEST_MODE BIT(7)
805 #define BIT_MHL_COC_CTL0_COC_BIAS_EN BIT(7)
811 #define BIT_MHL_COC_CTL1_COC_EN BIT(7)
828 #define BIT_MHL_DOC_CTL0_DOC_RXDATA_EN BIT(7)
833 /* MHL DataPath 7th Ctl, default value: 0x2a */
855 #define BIT_MHL3_TX_ZONE_CTL_MHL2_INTPLT_ZONE_MANU_EN BIT(7)
881 #define BIT_HDCP2X_CTRL_0_HDCP2X_ENCRYPT_EN BIT(7)
1001 #define BIT_TPI_INPUT_EXTENDEDBITMODE BIT(7)
1017 #define BIT_TPI_SC_TPI_UPDATE_FLG BIT(7)
1028 #define BIT_TPI_COPP_DATA1_COPP_GPROT BIT(7)
1054 #define BIT_TPI_INTR_ST0_TPI_AUTH_CHNGE_STAT BIT(7)
1067 #define BIT_TPI_BSTATUS1_DS_DEV_EXCEED BIT(7)
1079 #define BIT_TPI_HW_OPT3_DDC_DEBUG BIT(7)
1086 #define BIT_TPI_INFO_FSEL_EN BIT(7)
1103 #define BIT_COC_STAT_0_PLL_LOCKED BIT(7)
1127 #define BIT_COC_CTL3_COC_CTRL3_7 BIT(7)
1130 /* CoC 7th Ctl, default value: 0x00 */
1132 #define BIT_COC_CTL6_COC_CTRL6_7 BIT(7)
1138 #define BIT_COC_CTL7_COC_CTRL7_7 BIT(7)
1158 #define BIT_COC_CTLD_COC_CTRLD_7 BIT(7)
1163 #define BIT_COC_CTLE_COC_CTRLE_7 BIT(7)
1183 #define BIT_COC_CTL15_COC_CTRL15_7 BIT(7)
1197 #define BIT_COC_MISC_CTL0_FSM_MON BIT(7)
1232 /* DoC 7th Ctl, default value: 0x00 */
1234 #define BIT_DOC_CTL6_DOC_CTRL6_7 BIT(7)
1241 #define BIT_DOC_CTL7_DOC_CTRL7_7 BIT(7)
1249 #define BIT_DOC_CTL8_DOC_CTRL8_7 BIT(7)
1262 #define BIT_DOC_CTLE_DOC_CTRLE_7 BIT(7)
1287 #define BIT_MDT_RCV_CTRL_MDT_RCV_EN BIT(7)
1300 #define BIT_MDT_XMIT_CTRL_EN BIT(7)
1339 #define BIT_MDT_XMIT_SM_ERROR BIT(7)
1357 #define BIT_CBUS_MSC_MT_DONE_NACK BIT(7)
1437 #define BIT_MSC_HEARTBEAT_CTRL_MSC_HB_EN BIT(7)
1443 #define BIT_CBUS_MSC_COMPAT_CTRL_XDEVCAP_EN BIT(7)
1458 #define BIT_DISC_CTRL1_CBUS_INTR_EN BIT(7)
1481 #define BIT_DISC_CTRL8_NOMHLINT_CLR_BYPASS BIT(7)
1486 #define BIT_DISC_CTRL9_MHL3_RSEN_BYP BIT(7)