Lines Matching full:reg
28 u32 reg; in analogix_dp_enable_video_mute() local
31 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
32 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
33 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
36 reg &= ~HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
43 u32 reg; in analogix_dp_stop_video() local
45 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
46 reg &= ~VIDEO_EN; in analogix_dp_stop_video()
47 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
52 u32 reg; in analogix_dp_lane_swap() local
55 reg = LANE3_MAP_LOGIC_LANE_0 | LANE2_MAP_LOGIC_LANE_1 | in analogix_dp_lane_swap()
58 reg = LANE3_MAP_LOGIC_LANE_3 | LANE2_MAP_LOGIC_LANE_2 | in analogix_dp_lane_swap()
61 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_MAP); in analogix_dp_lane_swap()
66 u32 reg; in analogix_dp_init_analog_param() local
68 reg = TX_TERMINAL_CTRL_50_OHM; in analogix_dp_init_analog_param()
69 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_1); in analogix_dp_init_analog_param()
71 reg = SEL_24M | TX_DVDD_BIT_1_0625V; in analogix_dp_init_analog_param()
72 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2); in analogix_dp_init_analog_param()
75 reg = REF_CLK_24M; in analogix_dp_init_analog_param()
77 reg ^= REF_CLK_MASK; in analogix_dp_init_analog_param()
79 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1); in analogix_dp_init_analog_param()
86 reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO; in analogix_dp_init_analog_param()
87 writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_3); in analogix_dp_init_analog_param()
89 reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM | in analogix_dp_init_analog_param()
91 writel(reg, dp->reg_base + ANALOGIX_DP_PLL_FILTER_CTL_1); in analogix_dp_init_analog_param()
93 reg = CH3_AMP_400_MV | CH2_AMP_400_MV | in analogix_dp_init_analog_param()
95 writel(reg, dp->reg_base + ANALOGIX_DP_TX_AMP_TUNING_CTL); in analogix_dp_init_analog_param()
120 u32 reg; in analogix_dp_reset() local
126 reg = RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N | in analogix_dp_reset()
129 reg = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N | in analogix_dp_reset()
133 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_reset()
135 reg = SSC_FUNC_EN_N | AUX_FUNC_EN_N | in analogix_dp_reset()
138 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset()
175 u32 reg; in analogix_dp_config_interrupt() local
178 reg = COMMON_INT_MASK_1; in analogix_dp_config_interrupt()
179 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_1); in analogix_dp_config_interrupt()
181 reg = COMMON_INT_MASK_2; in analogix_dp_config_interrupt()
182 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_2); in analogix_dp_config_interrupt()
184 reg = COMMON_INT_MASK_3; in analogix_dp_config_interrupt()
185 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_3); in analogix_dp_config_interrupt()
187 reg = COMMON_INT_MASK_4; in analogix_dp_config_interrupt()
188 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_config_interrupt()
190 reg = INT_STA_MASK; in analogix_dp_config_interrupt()
191 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_config_interrupt()
196 u32 reg; in analogix_dp_mute_hpd_interrupt() local
199 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
200 reg &= ~COMMON_INT_MASK_4; in analogix_dp_mute_hpd_interrupt()
201 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
203 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
204 reg &= ~INT_STA_MASK; in analogix_dp_mute_hpd_interrupt()
205 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
210 u32 reg; in analogix_dp_unmute_hpd_interrupt() local
213 reg = COMMON_INT_MASK_4; in analogix_dp_unmute_hpd_interrupt()
214 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_unmute_hpd_interrupt()
216 reg = INT_STA_MASK; in analogix_dp_unmute_hpd_interrupt()
217 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_unmute_hpd_interrupt()
222 u32 reg; in analogix_dp_get_pll_lock_status() local
224 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_get_pll_lock_status()
225 if (reg & PLL_LOCK) in analogix_dp_get_pll_lock_status()
233 u32 reg; in analogix_dp_set_pll_power_down() local
242 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
244 reg |= mask; in analogix_dp_set_pll_power_down()
246 reg &= ~mask; in analogix_dp_set_pll_power_down()
247 writel(reg, dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
254 u32 reg; in analogix_dp_set_analog_power_down() local
268 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
270 reg |= mask; in analogix_dp_set_analog_power_down()
272 reg &= ~mask; in analogix_dp_set_analog_power_down()
273 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
277 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
280 reg |= mask; in analogix_dp_set_analog_power_down()
282 reg &= ~mask; in analogix_dp_set_analog_power_down()
283 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
287 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
290 reg |= mask; in analogix_dp_set_analog_power_down()
292 reg &= ~mask; in analogix_dp_set_analog_power_down()
293 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
297 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
300 reg |= mask; in analogix_dp_set_analog_power_down()
302 reg &= ~mask; in analogix_dp_set_analog_power_down()
303 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
307 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
310 reg |= mask; in analogix_dp_set_analog_power_down()
312 reg &= ~mask; in analogix_dp_set_analog_power_down()
313 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
326 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
328 reg |= mask; in analogix_dp_set_analog_power_down()
330 reg &= ~mask; in analogix_dp_set_analog_power_down()
332 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
338 reg = DP_ALL_PD; in analogix_dp_set_analog_power_down()
339 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
341 reg = DP_ALL_PD; in analogix_dp_set_analog_power_down()
342 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
344 reg &= ~DP_INC_BG; in analogix_dp_set_analog_power_down()
345 writel(reg, dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
358 u32 reg; in analogix_dp_init_analog_func() local
363 reg = PLL_LOCK_CHG; in analogix_dp_init_analog_func()
364 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_analog_func()
366 reg = readl(dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
367 reg &= ~(F_PLL_LOCK | PLL_LOCK_CTRL); in analogix_dp_init_analog_func()
368 writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL); in analogix_dp_init_analog_func()
385 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
386 reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N in analogix_dp_init_analog_func()
388 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_analog_func()
394 u32 reg; in analogix_dp_clear_hotplug_interrupts() local
399 reg = HOTPLUG_CHG | HPD_LOST | PLUG; in analogix_dp_clear_hotplug_interrupts()
400 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_clear_hotplug_interrupts()
402 reg = INT_HPD; in analogix_dp_clear_hotplug_interrupts()
403 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_clear_hotplug_interrupts()
408 u32 reg; in analogix_dp_init_hpd() local
415 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
416 reg &= ~(F_HPD | HPD_CTRL); in analogix_dp_init_hpd()
417 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_hpd()
422 u32 reg; in analogix_dp_force_hpd() local
424 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
425 reg = (F_HPD | HPD_CTRL); in analogix_dp_force_hpd()
426 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_force_hpd()
431 u32 reg; in analogix_dp_get_irq_type() local
434 reg = gpiod_get_value(dp->hpd_gpiod); in analogix_dp_get_irq_type()
435 if (reg) in analogix_dp_get_irq_type()
441 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_4); in analogix_dp_get_irq_type()
443 if (reg & PLUG) in analogix_dp_get_irq_type()
446 if (reg & HPD_LOST) in analogix_dp_get_irq_type()
449 if (reg & HOTPLUG_CHG) in analogix_dp_get_irq_type()
458 u32 reg; in analogix_dp_reset_aux() local
461 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
462 reg |= AUX_FUNC_EN_N; in analogix_dp_reset_aux()
463 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_reset_aux()
468 u32 reg; in analogix_dp_init_aux() local
471 reg = RPLY_RECEIV | AUX_ERR; in analogix_dp_init_aux()
472 writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_init_aux()
482 reg = 0; in analogix_dp_init_aux()
484 reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3); in analogix_dp_init_aux()
487 reg |= AUX_HW_RETRY_COUNT_SEL(0) | in analogix_dp_init_aux()
490 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_HW_RETRY_CTL); in analogix_dp_init_aux()
493 reg = DEFER_CTRL_EN | DEFER_COUNT(1); in analogix_dp_init_aux()
494 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_DEFER_CTL); in analogix_dp_init_aux()
497 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
498 reg &= ~AUX_FUNC_EN_N; in analogix_dp_init_aux()
499 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_2); in analogix_dp_init_aux()
504 u32 reg; in analogix_dp_get_plug_in_status() local
510 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_get_plug_in_status()
511 if (reg & HPD_STATUS) in analogix_dp_get_plug_in_status()
520 u32 reg; in analogix_dp_enable_sw_function() local
522 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
523 reg &= ~SW_FUNC_EN_N; in analogix_dp_enable_sw_function()
524 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_enable_sw_function()
529 u32 reg; in analogix_dp_set_link_bandwidth() local
531 reg = bwtype; in analogix_dp_set_link_bandwidth()
533 writel(reg, dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_set_link_bandwidth()
538 u32 reg; in analogix_dp_get_link_bandwidth() local
540 reg = readl(dp->reg_base + ANALOGIX_DP_LINK_BW_SET); in analogix_dp_get_link_bandwidth()
541 *bwtype = reg; in analogix_dp_get_link_bandwidth()
546 u32 reg; in analogix_dp_set_lane_count() local
548 reg = count; in analogix_dp_set_lane_count()
549 writel(reg, dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_set_lane_count()
554 u32 reg; in analogix_dp_get_lane_count() local
556 reg = readl(dp->reg_base + ANALOGIX_DP_LANE_COUNT_SET); in analogix_dp_get_lane_count()
557 *count = reg; in analogix_dp_get_lane_count()
563 u32 reg; in analogix_dp_enable_enhanced_mode() local
566 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
567 reg |= ENHANCED; in analogix_dp_enable_enhanced_mode()
568 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
570 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
571 reg &= ~ENHANCED; in analogix_dp_enable_enhanced_mode()
572 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_enable_enhanced_mode()
579 u32 reg; in analogix_dp_set_training_pattern() local
583 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_PRBS7; in analogix_dp_set_training_pattern()
584 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
587 reg = SCRAMBLING_ENABLE | LINK_QUAL_PATTERN_SET_D10_2; in analogix_dp_set_training_pattern()
588 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
591 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN1; in analogix_dp_set_training_pattern()
592 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
595 reg = SCRAMBLING_DISABLE | SW_TRAINING_PATTERN_SET_PTN2; in analogix_dp_set_training_pattern()
596 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
599 reg = SCRAMBLING_ENABLE | in analogix_dp_set_training_pattern()
602 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_set_training_pattern()
612 u32 reg; in analogix_dp_set_lane0_pre_emphasis() local
614 reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
615 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane0_pre_emphasis()
616 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane0_pre_emphasis()
617 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_pre_emphasis()
623 u32 reg; in analogix_dp_set_lane1_pre_emphasis() local
625 reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
626 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane1_pre_emphasis()
627 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane1_pre_emphasis()
628 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_pre_emphasis()
634 u32 reg; in analogix_dp_set_lane2_pre_emphasis() local
636 reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
637 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane2_pre_emphasis()
638 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane2_pre_emphasis()
639 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_pre_emphasis()
645 u32 reg; in analogix_dp_set_lane3_pre_emphasis() local
647 reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
648 reg &= ~PRE_EMPHASIS_SET_MASK; in analogix_dp_set_lane3_pre_emphasis()
649 reg |= level << PRE_EMPHASIS_SET_SHIFT; in analogix_dp_set_lane3_pre_emphasis()
650 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_pre_emphasis()
656 u32 reg; in analogix_dp_set_lane0_link_training() local
658 reg = training_lane; in analogix_dp_set_lane0_link_training()
659 writel(reg, dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL); in analogix_dp_set_lane0_link_training()
665 u32 reg; in analogix_dp_set_lane1_link_training() local
667 reg = training_lane; in analogix_dp_set_lane1_link_training()
668 writel(reg, dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL); in analogix_dp_set_lane1_link_training()
674 u32 reg; in analogix_dp_set_lane2_link_training() local
676 reg = training_lane; in analogix_dp_set_lane2_link_training()
677 writel(reg, dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL); in analogix_dp_set_lane2_link_training()
683 u32 reg; in analogix_dp_set_lane3_link_training() local
685 reg = training_lane; in analogix_dp_set_lane3_link_training()
686 writel(reg, dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL); in analogix_dp_set_lane3_link_training()
711 u32 reg; in analogix_dp_reset_macro() local
713 reg = readl(dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
714 reg |= MACRO_RST; in analogix_dp_reset_macro()
715 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
720 reg &= ~MACRO_RST; in analogix_dp_reset_macro()
721 writel(reg, dp->reg_base + ANALOGIX_DP_PHY_TEST); in analogix_dp_reset_macro()
726 u32 reg; in analogix_dp_init_video() local
728 reg = VSYNC_DET | VID_FORMAT_CHG | VID_CLK_CHG; in analogix_dp_init_video()
729 writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_STA_1); in analogix_dp_init_video()
731 reg = 0x0; in analogix_dp_init_video()
732 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_init_video()
734 reg = CHA_CRI(4) | CHA_CTRL; in analogix_dp_init_video()
735 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_init_video()
737 reg = 0x0; in analogix_dp_init_video()
738 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_init_video()
740 reg = VID_HRES_TH(2) | VID_VRES_TH(0); in analogix_dp_init_video()
741 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_8); in analogix_dp_init_video()
746 u32 reg; in analogix_dp_set_video_color_format() local
749 reg = (dp->video_info.dynamic_range << IN_D_RANGE_SHIFT) | in analogix_dp_set_video_color_format()
752 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_2); in analogix_dp_set_video_color_format()
755 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
756 reg &= ~IN_YC_COEFFI_MASK; in analogix_dp_set_video_color_format()
758 reg |= IN_YC_COEFFI_ITU709; in analogix_dp_set_video_color_format()
760 reg |= IN_YC_COEFFI_ITU601; in analogix_dp_set_video_color_format()
761 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_3); in analogix_dp_set_video_color_format()
766 u32 reg; in analogix_dp_is_slave_video_stream_clock_on() local
768 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
769 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
771 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_1); in analogix_dp_is_slave_video_stream_clock_on()
773 if (!(reg & DET_STA)) { in analogix_dp_is_slave_video_stream_clock_on()
778 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
779 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
781 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_2); in analogix_dp_is_slave_video_stream_clock_on()
784 if (reg & CHA_STA) { in analogix_dp_is_slave_video_stream_clock_on()
796 u32 reg; in analogix_dp_set_video_cr_mn() local
799 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
800 reg |= FIX_M_VID; in analogix_dp_set_video_cr_mn()
801 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
802 reg = m_value & 0xff; in analogix_dp_set_video_cr_mn()
803 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_0); in analogix_dp_set_video_cr_mn()
804 reg = (m_value >> 8) & 0xff; in analogix_dp_set_video_cr_mn()
805 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_1); in analogix_dp_set_video_cr_mn()
806 reg = (m_value >> 16) & 0xff; in analogix_dp_set_video_cr_mn()
807 writel(reg, dp->reg_base + ANALOGIX_DP_M_VID_2); in analogix_dp_set_video_cr_mn()
809 reg = n_value & 0xff; in analogix_dp_set_video_cr_mn()
810 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_0); in analogix_dp_set_video_cr_mn()
811 reg = (n_value >> 8) & 0xff; in analogix_dp_set_video_cr_mn()
812 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_1); in analogix_dp_set_video_cr_mn()
813 reg = (n_value >> 16) & 0xff; in analogix_dp_set_video_cr_mn()
814 writel(reg, dp->reg_base + ANALOGIX_DP_N_VID_2); in analogix_dp_set_video_cr_mn()
816 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
817 reg &= ~FIX_M_VID; in analogix_dp_set_video_cr_mn()
818 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_4); in analogix_dp_set_video_cr_mn()
828 u32 reg; in analogix_dp_set_video_timing_mode() local
831 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
832 reg &= ~FORMAT_SEL; in analogix_dp_set_video_timing_mode()
833 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
835 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
836 reg |= FORMAT_SEL; in analogix_dp_set_video_timing_mode()
837 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_set_video_timing_mode()
843 u32 reg; in analogix_dp_enable_video_master() local
846 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
847 reg &= ~VIDEO_MODE_MASK; in analogix_dp_enable_video_master()
848 reg |= VIDEO_MASTER_MODE_EN | VIDEO_MODE_MASTER_MODE; in analogix_dp_enable_video_master()
849 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
851 reg = readl(dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
852 reg &= ~VIDEO_MODE_MASK; in analogix_dp_enable_video_master()
853 reg |= VIDEO_MODE_SLAVE_MODE; in analogix_dp_enable_video_master()
854 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_enable_video_master()
860 u32 reg; in analogix_dp_start_video() local
862 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
863 reg |= VIDEO_EN; in analogix_dp_start_video()
864 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_start_video()
869 u32 reg; in analogix_dp_is_video_stream_on() local
871 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
872 writel(reg, dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
874 reg = readl(dp->reg_base + ANALOGIX_DP_SYS_CTL_3); in analogix_dp_is_video_stream_on()
875 if (!(reg & STRM_VALID)) { in analogix_dp_is_video_stream_on()
885 u32 reg; in analogix_dp_config_video_slave_mode() local
887 reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
889 reg &= ~(RK_VID_CAP_FUNC_EN_N | RK_VID_FIFO_FUNC_EN_N); in analogix_dp_config_video_slave_mode()
891 reg &= ~(MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N); in analogix_dp_config_video_slave_mode()
892 reg |= MASTER_VID_FUNC_EN_N; in analogix_dp_config_video_slave_mode()
894 writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1); in analogix_dp_config_video_slave_mode()
896 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
897 reg &= ~INTERACE_SCAN_CFG; in analogix_dp_config_video_slave_mode()
898 reg |= (dp->video_info.interlaced << 2); in analogix_dp_config_video_slave_mode()
899 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
901 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
902 reg &= ~VSYNC_POLARITY_CFG; in analogix_dp_config_video_slave_mode()
903 reg |= (dp->video_info.v_sync_polarity << 1); in analogix_dp_config_video_slave_mode()
904 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
906 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
907 reg &= ~HSYNC_POLARITY_CFG; in analogix_dp_config_video_slave_mode()
908 reg |= (dp->video_info.h_sync_polarity << 0); in analogix_dp_config_video_slave_mode()
909 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_10); in analogix_dp_config_video_slave_mode()
911 reg = AUDIO_MODE_SPDIF_MODE | VIDEO_MODE_SLAVE_MODE; in analogix_dp_config_video_slave_mode()
912 writel(reg, dp->reg_base + ANALOGIX_DP_SOC_GENERAL_CTL); in analogix_dp_config_video_slave_mode()
917 u32 reg; in analogix_dp_enable_scrambling() local
919 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
920 reg &= ~SCRAMBLING_DISABLE; in analogix_dp_enable_scrambling()
921 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_enable_scrambling()
926 u32 reg; in analogix_dp_disable_scrambling() local
928 reg = readl(dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
929 reg |= SCRAMBLING_DISABLE; in analogix_dp_disable_scrambling()
930 writel(reg, dp->reg_base + ANALOGIX_DP_TRAINING_PTN_SET); in analogix_dp_disable_scrambling()
1026 u32 reg; in analogix_dp_transfer() local
1038 reg = BUF_CLR; in analogix_dp_transfer()
1039 writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL); in analogix_dp_transfer()
1043 reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_I2C_TRANSACTION; in analogix_dp_transfer()
1045 reg |= AUX_TX_COMM_MOT; in analogix_dp_transfer()
1049 reg = AUX_TX_COMM_READ | AUX_TX_COMM_I2C_TRANSACTION; in analogix_dp_transfer()
1051 reg |= AUX_TX_COMM_MOT; in analogix_dp_transfer()
1055 reg = AUX_TX_COMM_WRITE | AUX_TX_COMM_DP_TRANSACTION; in analogix_dp_transfer()
1059 reg = AUX_TX_COMM_READ | AUX_TX_COMM_DP_TRANSACTION; in analogix_dp_transfer()
1066 reg |= AUX_LENGTH(msg->size); in analogix_dp_transfer()
1067 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1); in analogix_dp_transfer()
1070 reg = AUX_ADDR_7_0(msg->address); in analogix_dp_transfer()
1071 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0); in analogix_dp_transfer()
1072 reg = AUX_ADDR_15_8(msg->address); in analogix_dp_transfer()
1073 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8); in analogix_dp_transfer()
1074 reg = AUX_ADDR_19_16(msg->address); in analogix_dp_transfer()
1075 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16); in analogix_dp_transfer()
1079 reg = buffer[i]; in analogix_dp_transfer()
1080 writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1087 reg = AUX_EN; in analogix_dp_transfer()
1091 reg |= ADDR_ONLY; in analogix_dp_transfer()
1093 writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2); in analogix_dp_transfer()
1096 reg, !(reg & AUX_EN), 25, 500 * 1000); in analogix_dp_transfer()
1105 reg, reg & RPLY_RECEIV, 10, 20 * 1000); in analogix_dp_transfer()
1115 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA); in analogix_dp_transfer()
1117 if ((reg & AUX_ERR) || (status_reg & AUX_STATUS_MASK)) { in analogix_dp_transfer()
1121 status_reg & AUX_STATUS_MASK, !!(reg & AUX_ERR)); in analogix_dp_transfer()
1127 reg = readl(dp->reg_base + ANALOGIX_DP_BUF_DATA_0 + in analogix_dp_transfer()
1129 buffer[i] = (unsigned char)reg; in analogix_dp_transfer()
1135 reg = readl(dp->reg_base + ANALOGIX_DP_AUX_RX_COMM); in analogix_dp_transfer()
1136 if (reg == AUX_RX_COMM_AUX_DEFER) in analogix_dp_transfer()
1138 else if (reg == AUX_RX_COMM_I2C_DEFER) in analogix_dp_transfer()